Vm-dev November 2015

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VM Maker: VMMaker.oscog-rmacnak.1532.mcz
by commits＠source.squeak.org 24 Nov '15

24 Nov '15

Ryan Macnak uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-rmacnak.1532.mcz ==================== Summary ==================== Name: VMMaker.oscog-rmacnak.1532 Author: rmacnak Time: 23 November 2015, 8:07:29.718 pm UUID: 20303656-4854-4e5b-8bcd-eeff8cf5d262 Ancestors: VMMaker.oscog-eem.1531 MIPS: Add multiply and divide instructions. Add some variants of add/sub with overflow checks. Adjust some CPIC patching for merged CmpC32R/JumpLongZero. Recast noteFollowingConditionalBranch: as N + M instead of N x M. Fix isJump. Mark concretizeJump<Cond> other than overflow as unreachable. =============== Diff against VMMaker.oscog-eem.1531 =============== Item was changed: CogAbstractInstruction subclass: #CogMIPSELCompiler instanceVariableNames: '' + classVariableNames: 'AddCheckOverflowCqR AddCheckOverflowRR BrEqualRR BrLongEqualRR BrLongNotEqualRR BrNotEqualRR BrSignedGreaterEqualRR BrSignedGreaterRR BrSignedLessEqualRR BrSignedLessRR BrUnsignedGreaterEqualRR BrUnsignedGreaterRR BrUnsignedLessEqualRR BrUnsignedLessRR BranchTemp Cmp ConcreteVarBaseReg DivRR MoveHighR MoveLowR MulCheckOverflowRR MulRR Overflow OverflowTemp1 OverflowTemp2 SubCheckOverflowCqR SubCheckOverflowRR TargetReg' - classVariableNames: 'AddCheckOverflowCqR AddCheckOverflowRR BrEqCqR BrEqRR BrGtzRR BrLezRR BrNeCqR BrNeRR Cmp CmpSGT CmpSLT CmpUGT CmpULT ConcreteVarBaseReg MulCheckOverflowRR MulRR Overflow OverflowTemp1 OverflowTemp2 SubCheckOverflowCqR SubCheckOverflowRR TargetReg' poolDictionaries: 'MIPSConstants' category: 'VMMaker-JIT'! + + !CogMIPSELCompiler commentStamp: 'rmacnak 11/23/2015 19:32:02' prior: 0! + Implemenation for 32-bit, little-endian MIPS running with the OABI (Debian port name 'mipsel').! Item was changed: ----- Method: CogMIPSELCompiler class>>initialize (in category 'class initialization') ----- initialize + "CogRTLOpcodes initialize. CogMIPSELCompiler initialize" - "CogMIPSELCompiler initialize" super initialize. ConcreteVarBaseReg := S6. - "Simulating a condition register." Cmp := T0. + - CmpSLT := T1. - CmpSGT := T2. - CmpULT := T3. - CmpUGT := T4. Overflow := T0. OverflowTemp1 := T1. OverflowTemp2 := T2. + + "Can't use AT, Cmp or Overflow because we may need to preserve them for sequences like + CmpCwR + JumpZero + JumpBelow" + BranchTemp := T1. "OABI position independent code expects T9 to have its entry point on entry?" self flag: #OABI. TargetReg := T9. "Specific instructions" + self initializeSpecificOpcodes: #( + MulRR + DivRR + MoveLowR + MoveHighR + AddCheckOverflowCqR + AddCheckOverflowRR + MulCheckOverflowRR + SubCheckOverflowCqR + SubCheckOverflowRR + BrEqualRR + BrNotEqualRR + BrUnsignedLessRR + BrUnsignedLessEqualRR + BrUnsignedGreaterRR + BrUnsignedGreaterEqualRR + BrSignedLessRR + BrSignedLessEqualRR + BrSignedGreaterRR + BrSignedGreaterEqualRR + BrLongEqualRR + BrLongNotEqualRR) + in: thisContext method + + ! - self - initializeSpecificOpcodes: #(MulRR - AddCheckOverflowCqR AddCheckOverflowRR MulCheckOverflowRR SubCheckOverflowCqR SubCheckOverflowRR - "Ryan, here are proposed opcodes for conditional branches." - BrEqRR BrNeRR BrLezRR BrGtzRR BrEqCqR BrNeCqR) - in: thisContext method! Item was added: + ----- Method: CogMIPSELCompiler>>canDivQuoRem (in category 'testing') ----- + canDivQuoRem + <inline: true> + ^true! Item was changed: ----- Method: CogMIPSELCompiler>>cmpC32RTempByteSize (in category 'accessing') ----- cmpC32RTempByteSize + ^8! - self flag: #todo. "value - reg or reg - value?" - self flag: #inefficient. "Cog RTL assumes we can do any kind of conditional branch after a Cmp." - ^28! Item was changed: ----- Method: CogMIPSELCompiler>>computeMaximumSize (in category 'generate machine code') ----- computeMaximumSize "Each MIPS instruction has 4 bytes. Many abstract opcodes need more than one instruction. Instructions that refer to constants and/or literals depend on literals being stored in-line or out-of-line. N.B. The ^N forms are to get around the bytecode compiler's long branch limits which are exceeded when each case jumps around the otherwise." opcode caseOf: { + [BrEqualRR] -> [^8]. + [BrNotEqualRR] -> [^8]. + [BrUnsignedLessRR] -> [^12]. + [BrUnsignedLessEqualRR] -> [^12]. + [BrUnsignedGreaterRR] -> [^12]. + [BrUnsignedGreaterEqualRR] -> [^12]. + [BrSignedLessRR] -> [^12]. + [BrSignedLessEqualRR] -> [^12]. + [BrSignedGreaterRR] -> [^12]. + [BrSignedGreaterEqualRR] -> [^12]. + [BrLongEqualRR] -> [^16]. + [BrLongNotEqualRR] -> [^16]. + [MulRR] -> [^4]. + [DivRR] -> [^4]. + [MoveLowR] -> [^4]. + [MoveHighR] -> [^4]. + "Noops & Pseudo Ops" [Label] -> [^0]. [Literal] -> [^4]. [AlignmentNops] -> [^(operands at: 0) - 4]. [Fill16] -> [^4]. [Fill32] -> [^4]. [FillFromWord] -> [^4]. [Nop] -> [^4]. "Control" [Call] -> [^self literalLoadInstructionBytes + 8]. [CallFull] -> [^self literalLoadInstructionBytes + 8]. [JumpR] -> [^8]. [Jump] -> [^8]. [JumpFull] -> [^self literalLoadInstructionBytes + 8]. [JumpLong] -> [^self literalLoadInstructionBytes + 8]. [JumpZero] -> [^8]. [JumpNonZero] -> [^8]. [JumpNegative] -> [^8]. [JumpNonNegative] -> [^8]. [JumpOverflow] -> [^8]. [JumpNoOverflow] -> [^8]. [JumpCarry] -> [^8]. [JumpNoCarry] -> [^8]. [JumpLess] -> [^8]. [JumpGreaterOrEqual] -> [^8]. [JumpGreater] -> [^8]. [JumpLessOrEqual] -> [^8]. [JumpBelow] -> [^8]. [JumpAboveOrEqual] -> [^8]. [JumpAbove] -> [^8]. [JumpBelowOrEqual] -> [^8]. [JumpLongZero] -> [^self literalLoadInstructionBytes + 8]. [JumpLongNonZero] -> [^self literalLoadInstructionBytes + 8]. [JumpFPEqual] -> [^8]. [JumpFPNotEqual] -> [^8]. [JumpFPLess] -> [^8]. [JumpFPGreaterOrEqual]-> [^8]. [JumpFPGreater] -> [^8]. [JumpFPLessOrEqual] -> [^8]. [JumpFPOrdered] -> [^8]. [JumpFPUnordered] -> [^8]. [RetN] -> [^8]. [Stop] -> [^4]. "Arithmetic" [AddCqR] -> [^12]. [AndCqR] -> [^16]. [AndCqRR] -> [^12]. [CmpCqR] -> [^28]. [OrCqR] -> [^12]. [SubCqR] -> [^12]. [TstCqR] -> [^12]. [XorCqR] -> [^12]. [AddCwR] -> [^12]. [AndCwR] -> [^12]. [CmpCwR] -> [^28]. [OrCwR] -> [^12]. [SubCwR] -> [^12]. [XorCwR] -> [^12]. [AddRR] -> [^4]. [AndRR] -> [^4]. [CmpRR] -> [^20]. [OrRR] -> [^4]. [XorRR] -> [^4]. [SubRR] -> [^4]. [NegateR] -> [^4]. [LoadEffectiveAddressMwrR] -> [^12]. [LogicalShiftLeftCqR] -> [^4]. [LogicalShiftRightCqR] -> [^4]. [ArithmeticShiftRightCqR] -> [^4]. [LogicalShiftLeftRR] -> [^4]. [LogicalShiftRightRR] -> [^4]. [ArithmeticShiftRightRR] -> [^4]. [AddRdRd] -> [^4]. [CmpRdRd] -> [^4]. [SubRdRd] -> [^4]. [MulRdRd] -> [^4]. [DivRdRd] -> [^4]. [SqrtRd] -> [^4]. + [AddCheckOverflowCqR] -> [^28]. + [AddCheckOverflowRR] -> [^20]. [SubCheckOverflowCqR] -> [^28]. + [SubCheckOverflowRR] -> [^20]. "Data Movement" [MoveCqR] -> [^8 "or 4"]. [MoveCwR] -> [^8]. [MoveRR] -> [^4]. [MoveRdRd] -> [^4]. [MoveAwR] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [4] ifFalse: [self literalLoadInstructionBytes + 4]]. [MoveRAw] -> [^(self isAddressRelativeToVarBase: (operands at: 1)) ifTrue: [4] ifFalse: [self literalLoadInstructionBytes + 4]]. [MoveAbR] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [4] ifFalse: [self literalLoadInstructionBytes + 4]]. [MoveRAb] -> [^(self isAddressRelativeToVarBase: (operands at: 1)) ifTrue: [4] ifFalse: [self literalLoadInstructionBytes + 4]]. [MoveRMwr] -> [^16]. [MoveRdM64r] -> [^self literalLoadInstructionBytes + 4]. [MoveMbrR] -> [^16]. [MoveRMbr] -> [^16]. [MoveM16rR] -> [^4]. [MoveM64rRd] -> [^self literalLoadInstructionBytes + 4]. [MoveMwrR] -> [^16]. + [MoveXbrRR] -> [^8]. + [MoveRXbrR] -> [^8]. - [MoveXbrRR] -> [^0]. - [MoveRXbrR] -> [^0]. [MoveXwrRR] -> [^12]. [MoveRXwrR] -> [^12]. [PopR] -> [^8]. [PushR] -> [^8]. [PushCw] -> [^16]. [PushCq] -> [^16]. [PrefetchAw] -> [^12]. "Conversion" [ConvertRRd] -> [^8]. }. ^0 "to keep C compiler quiet" ! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeAddCheckOverflowCqR (in category 'generate machine code - concretize') ----- + concretizeAddCheckOverflowCqR + | value reg | + value := operands at: 0. + reg := self concreteRegister: (operands at: 1). + self machineCodeAt: 0 put: (self luiR: AT C: (self high16BitsOf: value)). + self machineCodeAt: 4 put: (self oriR: AT R: AT C: (self low16BitsOf: value)). + + "Save original LHS" + self machineCodeAt: 8 put: (self adduR: OverflowTemp1 R: reg R: ZR). + + "The actual addition" + self machineCodeAt: 12 put: (self adduR: reg R: reg R: AT). + + "Set sign bit of OverflowTemp2 if sign of result differs from sign of RHS." + self machineCodeAt: 16 put: (self xorR: OverflowTemp2 R: reg R: AT). + "Set sign bit of OverflowTemp1 if sign of result differs from sign of LHS." + self machineCodeAt: 20 put: (self xorR: OverflowTemp1 R: reg R: OverflowTemp1). + "Set sign bit of Overflow if sign of result differs from both LHS and RHS, which indicates overflow." + self machineCodeAt: 24 put: (self andR: Overflow R: OverflowTemp1 R: OverflowTemp2). + ^machineCodeSize := 28! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeAddCheckOverflowRR (in category 'generate machine code - concretize') ----- + concretizeAddCheckOverflowRR + | leftReg rightReg | + leftReg := self concreteRegister: (operands at: 0). + rightReg := self concreteRegister: (operands at: 1). + + "Save original RHS" + self machineCodeAt: 0 put: (self adduR: OverflowTemp1 R: rightReg R: ZR). + + "The actual addition" + self machineCodeAt: 4 put: (self adduR: rightReg R: leftReg R: rightReg). + + "Set sign bit of OverflowTemp2 if sign of result differs from sign of RHS." + self machineCodeAt: 8 put: (self xorR: OverflowTemp2 R: rightReg R: leftReg). + "Set sign bit of OverflowTemp1 if sign of result differs from sign of LHS." + self machineCodeAt: 12 put: (self xorR: OverflowTemp1 R: rightReg R: OverflowTemp1). + "Set sign bit of Overflow if sign of result differs from both LHS and RHS, which indicates overflow." + self machineCodeAt: 16 put: (self andR: Overflow R: OverflowTemp1 R: OverflowTemp2). + ^machineCodeSize := 20! Item was changed: ----- Method: CogMIPSELCompiler>>concretizeAndCwR (in category 'generate machine code - concretize') ----- concretizeAndCwR | value reg | value := operands at: 0. reg := self concreteRegister: (operands at: 1). self machineCodeAt: 0 put: (self luiR: AT C: (self high16BitsOf: value)). self machineCodeAt: 4 put: (self oriR: AT R: AT C: (self low16BitsOf: value)). self machineCodeAt: 8 put: (self andR: reg R: reg R: AT). + ^machineCodeSize := 12! - self flag: #inefficient. "Cog RTL assumes we can do any kind of conditional branch after a Cmp." - self machineCodeAt: 12 put: (self andR: Cmp R: reg R: AT). - ^machineCodeSize := 16! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeAndRR (in category 'generate machine code - concretize') ----- + concretizeAndRR + | leftReg rightReg | + leftReg := self concreteRegister: (operands at: 0). + rightReg := self concreteRegister: (operands at: 1). + self machineCodeAt: 0 put: (self andR: rightReg R: leftReg R: rightReg). + ^machineCodeSize := 4! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeBrEqualRR (in category 'generate machine code - concretize') ----- + concretizeBrEqualRR + | offset leftReg rightReg | + offset := self computeJumpTargetOffsetPlus: 4. + leftReg := self concreteRegister: (operands at: 1). + rightReg := self concreteRegister: (operands at: 2). + self machineCodeAt: 0 put: (self beqR: leftReg R: rightReg offset: offset). + self machineCodeAt: 4 put: (self nop). "Delay slot" + ^machineCodeSize := 8! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeBrLongEqualRR (in category 'generate machine code - concretize') ----- + concretizeBrLongEqualRR + | jumpTarget leftReg rightReg | + <var: #jumpTarget type: #'AbstractInstruction *'> + jumpTarget := self longJumpTargetAddress. + self flag: #todo. "Check not crossing 256MB block." + jumpTarget := jumpTarget bitAnd: 16rFFFFFFF. + leftReg := self concreteRegister: (operands at: 1). + rightReg := self concreteRegister: (operands at: 2). + + self machineCodeAt: 0 put: (self bneR: leftReg R: rightReg offset: 12). + self machineCodeAt: 4 put: (self nop). "Delay slot" + self machineCodeAt: 8 put: (self jA: jumpTarget). + self machineCodeAt: 12 put: self nop. "Delay slot" + ^machineCodeSize := 16! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeBrLongNotEqualRR (in category 'generate machine code - concretize') ----- + concretizeBrLongNotEqualRR + | jumpTarget leftReg rightReg | + <var: #jumpTarget type: #'AbstractInstruction *'> + jumpTarget := self longJumpTargetAddress. + self flag: #todo. "Check not crossing 256MB block." + jumpTarget := jumpTarget bitAnd: 16rFFFFFFF. + leftReg := self concreteRegister: (operands at: 1). + rightReg := self concreteRegister: (operands at: 2). + + self machineCodeAt: 0 put: (self beqR: leftReg R: rightReg offset: 12). + self machineCodeAt: 4 put: (self nop). "Delay slot" + self machineCodeAt: 8 put: (self jA: jumpTarget). + self machineCodeAt: 12 put: self nop. "Delay slot" + ^machineCodeSize := 16! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeBrNotEqualRR (in category 'generate machine code - concretize') ----- + concretizeBrNotEqualRR + | offset leftReg rightReg | + offset := self computeJumpTargetOffsetPlus: 4. + leftReg := self concreteRegister: (operands at: 1). + rightReg := self concreteRegister: (operands at: 2). + self machineCodeAt: 0 put: (self bneR: leftReg R: rightReg offset: offset). + self machineCodeAt: 4 put: (self nop). "Delay slot" + ^machineCodeSize := 8! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeBrSignedGreaterEqualRR (in category 'generate machine code - concretize') ----- + concretizeBrSignedGreaterEqualRR + | offset leftReg rightReg | + offset := self computeJumpTargetOffsetPlus: 8. "Relative to delay slot" + leftReg := self concreteRegister: (operands at: 1). + rightReg := self concreteRegister: (operands at: 2). + self machineCodeAt: 0 put: (self sltR: BranchTemp R: leftReg R: rightReg). + self machineCodeAt: 4 put: (self beqR: BranchTemp R: ZR offset: offset). + self machineCodeAt: 8 put: (self nop). "Delay slot" + ^machineCodeSize := 12! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeBrSignedGreaterRR (in category 'generate machine code - concretize') ----- + concretizeBrSignedGreaterRR + | offset leftReg rightReg | + offset := self computeJumpTargetOffsetPlus: 8. "Relative to delay slot" + leftReg := self concreteRegister: (operands at: 1). + rightReg := self concreteRegister: (operands at: 2). + self machineCodeAt: 0 put: (self sltR: BranchTemp R: rightReg R: leftReg). + self machineCodeAt: 4 put: (self beqR: BranchTemp R: ZR offset: offset). + self machineCodeAt: 8 put: (self nop). "Delay slot" + ^machineCodeSize := 12! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeBrSignedLessEqualRR (in category 'generate machine code - concretize') ----- + concretizeBrSignedLessEqualRR + | offset leftReg rightReg | + offset := self computeJumpTargetOffsetPlus: 8. "Relative to delay slot" + leftReg := self concreteRegister: (operands at: 1). + rightReg := self concreteRegister: (operands at: 2). + self machineCodeAt: 0 put: (self sltR: BranchTemp R: rightReg R: leftReg). + self machineCodeAt: 4 put: (self bneR: BranchTemp R: ZR offset: offset). + self machineCodeAt: 8 put: (self nop). "Delay slot" + ^machineCodeSize := 12! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeBrSignedLessRR (in category 'generate machine code - concretize') ----- + concretizeBrSignedLessRR + | offset leftReg rightReg | + offset := self computeJumpTargetOffsetPlus: 8. "Relative to delay slot" + leftReg := self concreteRegister: (operands at: 1). + rightReg := self concreteRegister: (operands at: 2). + self machineCodeAt: 0 put: (self sltR: BranchTemp R: leftReg R: rightReg). + self machineCodeAt: 4 put: (self bneR: BranchTemp R: ZR offset: offset). + self machineCodeAt: 8 put: (self nop). "Delay slot" + ^machineCodeSize := 12! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeBrUnsignedGreaterEqualRR (in category 'generate machine code - concretize') ----- + concretizeBrUnsignedGreaterEqualRR + | offset leftReg rightReg | + offset := self computeJumpTargetOffsetPlus: 8. "Relative to delay slot" + leftReg := self concreteRegister: (operands at: 1). + rightReg := self concreteRegister: (operands at: 2). + self machineCodeAt: 0 put: (self sltuR: BranchTemp R: leftReg R: rightReg). + self machineCodeAt: 4 put: (self beqR: BranchTemp R: ZR offset: offset). + self machineCodeAt: 8 put: (self nop). "Delay slot" + ^machineCodeSize := 12! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeBrUnsignedGreaterRR (in category 'generate machine code - concretize') ----- + concretizeBrUnsignedGreaterRR + | offset leftReg rightReg | + offset := self computeJumpTargetOffsetPlus: 8. "Relative to delay slot" + leftReg := self concreteRegister: (operands at: 1). + rightReg := self concreteRegister: (operands at: 2). + self machineCodeAt: 0 put: (self sltuR: BranchTemp R: rightReg R: leftReg). + self machineCodeAt: 4 put: (self beqR: BranchTemp R: ZR offset: offset). + self machineCodeAt: 8 put: (self nop). "Delay slot" + ^machineCodeSize := 12! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeBrUnsignedLessEqualRR (in category 'generate machine code - concretize') ----- + concretizeBrUnsignedLessEqualRR + | offset leftReg rightReg | + offset := self computeJumpTargetOffsetPlus: 8. "Relative to delay slot" + leftReg := self concreteRegister: (operands at: 1). + rightReg := self concreteRegister: (operands at: 2). + self machineCodeAt: 0 put: (self sltuR: BranchTemp R: rightReg R: leftReg). + self machineCodeAt: 4 put: (self bneR: BranchTemp R: ZR offset: offset). + self machineCodeAt: 8 put: (self nop). "Delay slot" + ^machineCodeSize := 12! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeBrUnsignedLessRR (in category 'generate machine code - concretize') ----- + concretizeBrUnsignedLessRR + | offset leftReg rightReg | + offset := self computeJumpTargetOffsetPlus: 8. "Relative to delay slot" + leftReg := self concreteRegister: (operands at: 1). + rightReg := self concreteRegister: (operands at: 2). + self machineCodeAt: 0 put: (self sltuR: BranchTemp R: leftReg R: rightReg). + self machineCodeAt: 4 put: (self bneR: BranchTemp R: ZR offset: offset). + self machineCodeAt: 8 put: (self nop). "Delay slot" + ^machineCodeSize := 12! Item was changed: ----- Method: CogMIPSELCompiler>>concretizeCmpCwR (in category 'generate machine code - concretize') ----- concretizeCmpCwR + self unreachable. "Should have been rewritten by noteFollowingConditionalBranch:" + ^0! - | value reg | - value := operands at: 0. - reg := self concreteRegister: (operands at: 1). - self flag: #todo. "value - reg or reg - value?" - self flag: #inefficient. "Cog RTL assumes we can do any kind of conditional branch after a Cmp." - self machineCodeAt: 0 put: (self luiR: AT C: (self high16BitsOf: value)). - self machineCodeAt: 4 put: (self oriR: AT R: AT C: (self low16BitsOf: value)). - self machineCodeAt: 8 put: (self subuR: Cmp R: reg R: AT). - self machineCodeAt: 12 put: (self sltR: CmpSLT R: reg R: AT). - self machineCodeAt: 16 put: (self sltR: CmpSGT R: AT R: reg). - self machineCodeAt: 20 put: (self sltuR: CmpULT R: reg R: AT). - self machineCodeAt: 24 put: (self sltuR: CmpUGT R: AT R: reg). - ^machineCodeSize := 28! Item was changed: ----- Method: CogMIPSELCompiler>>concretizeCmpRR (in category 'generate machine code - concretize') ----- concretizeCmpRR + self unreachable. "Should have been rewritten by noteFollowingConditionalBranch:" + ^0! - | leftReg rightReg | - "CmpRR RHS LHS computes LHS - RHS, i.e. apparently reversed. You have to think subtract." - rightReg := self concreteRegister: (operands at: 0). - leftReg := self concreteRegister: (operands at: 1). - self flag: #inefficient. "Cog RTL assumes we can do any kind of conditional branch after a Cmp." - self machineCodeAt: 0 put: (self subuR: Cmp R: leftReg R: rightReg). - self machineCodeAt: 4 put: (self sltR: CmpSLT R: leftReg R: rightReg). - self machineCodeAt: 8 put: (self sltR: CmpSGT R: rightReg R: leftReg). - self machineCodeAt: 12 put: (self sltuR: CmpULT R: leftReg R: rightReg). - self machineCodeAt: 16 put: (self sltuR: CmpUGT R: rightReg R: leftReg). - ^machineCodeSize := 20! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeDivRR (in category 'generate machine code - concretize') ----- + concretizeDivRR + | dividendReg divisorReg | + dividendReg := self concreteRegister: (operands at: 0). + divisorReg := self concreteRegister: (operands at: 1). + self machineCodeAt: 0 put: (self divR: dividendReg R: divisorReg). + ^machineCodeSize := 4! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeFill32 (in category 'generate machine code - concretize') ----- + concretizeFill32 + "fill with operand 0 according to the processor's endianness" + | word | + <var: #word type: #'unsigned long'> + + self flag: #bogus. "Gaps in the instruction stream should be filled with the stop instruction." + + word := operands at: 0. + self machineCodeAt: 0 put: word. + ^machineCodeSize := 4! Item was changed: ----- Method: CogMIPSELCompiler>>concretizeJumpLongNonZero (in category 'generate machine code - concretize') ----- concretizeJumpLongNonZero + self unreachable. "Should have been rewritten by noteFollowingConditionalBranch:" + ^0! - | jumpTarget | - <var: #jumpTarget type: #'AbstractInstruction *'> - jumpTarget := self longJumpTargetAddress. - self flag: #todo. "Check not crossing 256MB block." - jumpTarget := jumpTarget bitAnd: 16rFFFFFFF. - self machineCodeAt: 0 put: (self beqR: Cmp R: ZR offset: 12). - self machineCodeAt: 4 put: self nop. "Delay slot" - self machineCodeAt: 8 put: (self jA: jumpTarget). - self machineCodeAt: 12 put: self nop. "Delay slot" - ^machineCodeSize := 16! Item was changed: ----- Method: CogMIPSELCompiler>>concretizeJumpLongZero (in category 'generate machine code - concretize') ----- concretizeJumpLongZero + self unreachable. "Should have been rewritten by noteFollowingConditionalBranch:" + ^0! - | jumpTarget | - <var: #jumpTarget type: #'AbstractInstruction *'> - jumpTarget := self longJumpTargetAddress. - self flag: #todo. "Check not crossing 256MB block." - jumpTarget := jumpTarget bitAnd: 16rFFFFFFF. - self machineCodeAt: 0 put: (self bneR: Cmp R: ZR offset: 12). - self machineCodeAt: 4 put: self nop. "Delay slot" - self machineCodeAt: 8 put: (self jA: jumpTarget). - self machineCodeAt: 12 put: self nop. "Delay slot" - ^machineCodeSize := 16! Item was changed: ----- Method: CogMIPSELCompiler>>concretizeJumpNonZero (in category 'generate machine code - concretize') ----- concretizeJumpNonZero + self unreachable. "Should have been rewritten by noteFollowingConditionalBranch:" + ^0! - | offset | - offset := self computeJumpTargetOffsetPlus: 4. - self flag: #BranchRange. - self machineCodeAt: 0 put: (self bneR: Cmp R: ZR offset: offset). - self machineCodeAt: 4 put: self nop. "Delay slot" - ^machineCodeSize := 8! Item was changed: ----- Method: CogMIPSELCompiler>>concretizeJumpSignedGreaterEqual (in category 'generate machine code - concretize') ----- concretizeJumpSignedGreaterEqual + self unreachable. "Should have been rewritten by noteFollowingConditionalBranch:" + ^0! - | offset | - offset := self computeJumpTargetOffsetPlus: 4. - self machineCodeAt: 0 put: (self bneR: CmpSLT R: ZR offset: offset). - self machineCodeAt: 4 put: (self nop). "Delay slot" - ^machineCodeSize := 8! Item was changed: ----- Method: CogMIPSELCompiler>>concretizeJumpSignedGreaterThan (in category 'generate machine code - concretize') ----- concretizeJumpSignedGreaterThan + self unreachable. "Should have been rewritten by noteFollowingConditionalBranch:" + ^0! - | offset | - offset := self computeJumpTargetOffsetPlus: 4. - self machineCodeAt: 0 put: (self bneR: CmpSGT R: ZR offset: offset). - self machineCodeAt: 4 put: (self nop). "Delay slot" - ^machineCodeSize := 8! Item was changed: ----- Method: CogMIPSELCompiler>>concretizeJumpSignedLessEqual (in category 'generate machine code - concretize') ----- concretizeJumpSignedLessEqual + self unreachable. "Should have been rewritten by noteFollowingConditionalBranch:" + ^0! - | offset | - offset := self computeJumpTargetOffsetPlus: 4. - self machineCodeAt: 0 put: (self beqR: CmpSGT R: ZR offset: offset). - self machineCodeAt: 4 put: (self nop). "Delay slot" - ^machineCodeSize := 8! Item was changed: ----- Method: CogMIPSELCompiler>>concretizeJumpSignedLessThan (in category 'generate machine code - concretize') ----- concretizeJumpSignedLessThan + self unreachable. "Should have been rewritten by noteFollowingConditionalBranch:" + ^0! - | offset | - offset := self computeJumpTargetOffsetPlus: 4. - self machineCodeAt: 0 put: (self bneR: CmpSLT R: ZR offset: offset). - self machineCodeAt: 4 put: (self nop). "Delay slot" - ^machineCodeSize := 8! Item was changed: ----- Method: CogMIPSELCompiler>>concretizeJumpUnsignedGreaterEqual (in category 'generate machine code - concretize') ----- concretizeJumpUnsignedGreaterEqual + self unreachable. "Should have been rewritten by noteFollowingConditionalBranch:" + ^0! - | offset | - offset := self computeJumpTargetOffsetPlus: 4. - self machineCodeAt: 0 put: (self bneR: CmpULT R: ZR offset: offset). - self machineCodeAt: 4 put: (self nop). "Delay slot" - ^machineCodeSize := 8! Item was changed: ----- Method: CogMIPSELCompiler>>concretizeJumpUnsignedGreaterThan (in category 'generate machine code - concretize') ----- concretizeJumpUnsignedGreaterThan + self unreachable. "Should have been rewritten by noteFollowingConditionalBranch:" + ^0! - | offset | - offset := self computeJumpTargetOffsetPlus: 4. - self machineCodeAt: 0 put: (self bneR: CmpUGT R: ZR offset: offset). - self machineCodeAt: 4 put: (self nop). "Delay slot" - ^machineCodeSize := 8! Item was changed: ----- Method: CogMIPSELCompiler>>concretizeJumpUnsignedLessEqual (in category 'generate machine code - concretize') ----- concretizeJumpUnsignedLessEqual + self unreachable. "Should have been rewritten by noteFollowingConditionalBranch:" + ^0! - | offset | - offset := self computeJumpTargetOffsetPlus: 4. - self machineCodeAt: 0 put: (self beqR: CmpUGT R: ZR offset: offset). - self machineCodeAt: 4 put: (self nop). "Delay slot" - ^machineCodeSize := 8! Item was changed: ----- Method: CogMIPSELCompiler>>concretizeJumpUnsignedLessThan (in category 'generate machine code - concretize') ----- concretizeJumpUnsignedLessThan + self unreachable. "Should have been rewritten by noteFollowingConditionalBranch:" + ^0! - | offset | - offset := self computeJumpTargetOffsetPlus: 4. - self machineCodeAt: 0 put: (self bneR: CmpULT R: ZR offset: offset). - self machineCodeAt: 4 put: (self nop). "Delay slot" - ^machineCodeSize := 8! Item was changed: ----- Method: CogMIPSELCompiler>>concretizeJumpZero (in category 'generate machine code - concretize') ----- concretizeJumpZero + self unreachable. "Should have been rewritten by noteFollowingConditionalBranch:" + ^0! - | offset | - offset := self computeJumpTargetOffsetPlus: 4. - self flag: #BranchRange. - self machineCodeAt: 0 put: (self beqR: Cmp R: ZR offset: offset). - self machineCodeAt: 4 put: self nop. "Delay slot" - ^machineCodeSize := 8! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeMoveHighR (in category 'generate machine code - concretize') ----- + concretizeMoveHighR + | destReg | + destReg := self concreteRegister: (operands at: 0). + self machineCodeAt: 0 put: (self mfhiR: destReg). + ^machineCodeSize := 4! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeMoveLowR (in category 'generate machine code - concretize') ----- + concretizeMoveLowR + | destReg | + destReg := self concreteRegister: (operands at: 0). + self machineCodeAt: 0 put: (self mfloR: destReg). + ^machineCodeSize := 4! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeMoveRXbrR (in category 'generate machine code - concretize') ----- + concretizeMoveRXbrR + | srcReg indexReg baseReg | + srcReg := self concreteRegister: (operands at: 0). + indexReg := self concreteRegister: (operands at: 1). + baseReg := self concreteRegister: (operands at: 2). + self machineCodeAt: 0 put: (self adduR: AT R: baseReg R: indexReg). + self machineCodeAt: 4 put: (self sbR: srcReg base: AT offset: 0). + ^machineCodeSize := 8! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeMoveXbrRR (in category 'generate machine code - concretize') ----- + concretizeMoveXbrRR + | indexReg baseReg destReg | + indexReg := self concreteRegister: (operands at: 0). "index is number of *bytes*" + baseReg := self concreteRegister: (operands at: 1). + destReg := self concreteRegister: (operands at: 2). + self machineCodeAt: 0 put: (self adduR: AT R: baseReg R: indexReg). + self machineCodeAt: 4 put: (self lbuR: destReg base: AT offset: 0). + ^machineCodeSize := 8! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeSubCheckOverflowRR (in category 'generate machine code - concretize') ----- + concretizeSubCheckOverflowRR + | leftReg rightReg | + leftReg := self concreteRegister: (operands at: 0). + rightReg := self concreteRegister: (operands at: 1). + + "Save original RHS" + self machineCodeAt: 0 put: (self adduR: OverflowTemp1 R: rightReg R: ZR). + + "The actual subtraction" + self machineCodeAt: 4 put: (self subuR: rightReg R: leftReg R: rightReg). + + "Set sign bit of OverflowTemp2 if sign of result differs from sign of RHS." + self machineCodeAt: 8 put: (self xorR: OverflowTemp2 R: rightReg R: leftReg). + "Set sign bit of OverflowTemp1 if sign of result differs from sign of LHS." + self machineCodeAt: 12 put: (self xorR: OverflowTemp1 R: rightReg R: OverflowTemp1). + "Set sign bit of Overflow if sign of result differs from both LHS and RHS, which indicates overflow." + self machineCodeAt: 16 put: (self andR: Overflow R: OverflowTemp1 R: OverflowTemp2). + ^machineCodeSize := 20! Item was added: + ----- Method: CogMIPSELCompiler>>concretizeXorRR (in category 'generate machine code - concretize') ----- + concretizeXorRR + | leftReg rightReg | + leftReg := self concreteRegister: (operands at: 0). + rightReg := self concreteRegister: (operands at: 1). + self machineCodeAt: 0 put: (self xorR: rightReg R: leftReg R: rightReg). + ^machineCodeSize := 4! Item was changed: ----- Method: CogMIPSELCompiler>>dispatchConcretize (in category 'generate machine code') ----- dispatchConcretize "Attempt to generate concrete machine code for the instruction at address. This is the inner dispatch of concretizeAt: actualAddress which exists only to get around the branch size limits in the SqueakV3 (blue book derived) bytecode set." <returnTypeC: #void> opcode caseOf: { + [BrEqualRR] -> [^self concretizeBrEqualRR]. + [BrNotEqualRR] -> [^self concretizeBrNotEqualRR]. + [BrUnsignedLessRR] -> [^self concretizeBrUnsignedLessRR]. + [BrUnsignedLessEqualRR] -> [^self concretizeBrUnsignedLessEqualRR]. + [BrUnsignedGreaterRR] -> [^self concretizeBrUnsignedGreaterRR]. + [BrUnsignedGreaterEqualRR] -> [^self concretizeBrUnsignedGreaterEqualRR]. + [BrSignedLessRR] -> [^self concretizeBrSignedLessRR]. + [BrSignedLessEqualRR] -> [^self concretizeBrSignedLessEqualRR]. + [BrSignedGreaterRR] -> [^self concretizeBrSignedGreaterRR]. + [BrSignedGreaterEqualRR] -> [^self concretizeBrSignedGreaterEqualRR]. + [BrLongEqualRR] -> [^self concretizeBrLongEqualRR]. + [BrLongNotEqualRR] -> [^self concretizeBrLongNotEqualRR]. + [MulRR] -> [^self concretizeMulRR]. + [DivRR] -> [^self concretizeDivRR]. + [MoveLowR] -> [^self concretizeMoveLowR]. + [MoveHighR] -> [^self concretizeMoveHighR]. + + "Noops & Pseudo Ops" [Label] -> [^self concretizeLabel]. [AlignmentNops] -> [^self concretizeAlignmentNops]. [Fill16] -> [^self concretizeFill16]. [Fill32] -> [^self concretizeFill32]. [FillFromWord] -> [^self concretizeFillFromWord]. [Nop] -> [^self concretizeNop]. "Control" [Call] -> [^self concretizeCall]. "call code within code space" [CallFull] -> [^self concretizeCallFull]. "call code anywhere in address space" [JumpR] -> [^self concretizeJumpR]. [JumpFull] -> [^self concretizeJumpFull]."jump within address space" [JumpLong] -> [^self concretizeJumpLong]."jumps witihn code space" [JumpLongZero] -> [^self concretizeJumpLongZero]. [JumpLongNonZero] -> [^self concretizeJumpLongNonZero]. [Jump] -> [^self concretizeJump]. [JumpZero] -> [^self concretizeJumpZero]. [JumpNonZero] -> [^self concretizeJumpNonZero]. [JumpNegative] -> [^self concretizeUnimplemented]. [JumpNonNegative] -> [^self concretizeUnimplemented]. + [JumpOverflow] -> [^self concretizeJumpOverflow]. - [JumpOverflow] -> [^self concretizeUnimplemented]. [JumpNoOverflow] -> [^self concretizeJumpNoOverflow]. [JumpCarry] -> [^self concretizeUnimplemented]. [JumpNoCarry] -> [^self concretizeUnimplemented]. [JumpLess] -> [^self concretizeJumpSignedLessThan]. [JumpGreaterOrEqual] -> [^self concretizeJumpSignedGreaterEqual]. [JumpGreater] -> [^self concretizeJumpSignedGreaterThan]. [JumpLessOrEqual] -> [^self concretizeJumpSignedLessEqual]. [JumpBelow] -> [^self concretizeJumpUnsignedLessThan]. [JumpAboveOrEqual] -> [^self concretizeJumpUnsignedGreaterEqual]. [JumpAbove] -> [^self concretizeJumpUnsignedGreaterThan]. [JumpBelowOrEqual] -> [^self concretizeJumpUnsignedLessEqual]. [JumpFPEqual] -> [^self concretizeUnimplemented]. [JumpFPNotEqual] -> [^self concretizeUnimplemented]. [JumpFPLess] -> [^self concretizeUnimplemented]. [JumpFPGreaterOrEqual] -> [^self concretizeUnimplemented]. [JumpFPGreater] -> [^self concretizeUnimplemented]. [JumpFPLessOrEqual] -> [^self concretizeUnimplemented]. [JumpFPOrdered] -> [^self concretizeUnimplemented]. [JumpFPUnordered] -> [^self concretizeUnimplemented]. [RetN] -> [^self concretizeRetN]. [Stop] -> [^self concretizeStop]. "Arithmetic" [AddCqR] -> [^self concretizeAddCqR]. [AndCqR] -> [^self concretizeAndCqR]. [AndCqRR] -> [^self concretizeAndCqRR]. [CmpCqR] -> [^self concretizeCmpCqR]. [OrCqR] -> [^self concretizeOrCqR]. [SubCqR] -> [^self concretizeSubCqR]. [TstCqR] -> [^self concretizeTstCqR]. [XorCqR] -> [^self concretizeXorCqR]. [AddCwR] -> [^self concretizeAddCwR]. [AndCwR] -> [^self concretizeAndCwR]. [CmpCwR] -> [^self concretizeCmpCwR]. [OrCwR] -> [^self concretizeOrCwR]. [SubCwR] -> [^self concretizeSubCwR]. [XorCwR] -> [^self concretizeXorCwR]. [AddRR] -> [^self concretizeAddRR]. [AndRR] -> [^self concretizeAndRR]. [CmpRR] -> [^self concretizeCmpRR]. [OrRR] -> [^self concretizeOrRR]. [SubRR] -> [^self concretizeSubRR]. + [XorRR] -> [^self concretizeXorRR]. - [XorRR] -> [^self concretizeUnimplemented]. [AddRdRd] -> [^self concretizeUnimplemented]. [CmpRdRd] -> [^self concretizeUnimplemented]. [DivRdRd] -> [^self concretizeUnimplemented]. [MulRdRd] -> [^self concretizeUnimplemented]. [SubRdRd] -> [^self concretizeUnimplemented]. [SqrtRd] -> [^self concretizeUnimplemented]. [NegateR] -> [^self concretizeNegateR]. [LoadEffectiveAddressMwrR] -> [^self concretizeLoadEffectiveAddressMwrR]. [ArithmeticShiftRightCqR] -> [^self concretizeArithmeticShiftRightCqR]. [LogicalShiftRightCqR] -> [^self concretizeLogicalShiftRightCqR]. [LogicalShiftLeftCqR] -> [^self concretizeLogicalShiftLeftCqR]. [ArithmeticShiftRightRR] -> [^self concretizeArithmeticShiftRightRR]. [LogicalShiftLeftRR] -> [^self concretizeLogicalShiftLeftRR]. [LogicalShiftRightRR] -> [^self concretizeLogicalShiftRightRR]. "Data Movement" [MoveCqR] -> [^self concretizeMoveCqR]. [MoveCwR] -> [^self concretizeMoveCwR]. [MoveRR] -> [^self concretizeMoveRR]. [MoveAwR] -> [^self concretizeMoveAwR]. [MoveRAw] -> [^self concretizeMoveRAw]. [MoveAbR] -> [^self concretizeMoveAbR]. [MoveRAb] -> [^self concretizeMoveRAb]. [MoveMbrR] -> [^self concretizeMoveMbrR]. + [MoveRMbr] -> [^self concretizeRMbr]. - [MoveRMbr] -> [^self concretizeUnimplemented]. [MoveM16rR] -> [^self concretizeMoveM16rR]. + [MoveM64rRd] -> [^self concretizeM64rRd]. - [MoveM64rRd] -> [^self concretizeUnimplemented]. [MoveMwrR] -> [^self concretizeMoveMwrR]. + [MoveXbrRR] -> [^self concretizeMoveXbrRR]. + [MoveRXbrR] -> [^self concretizeMoveRXbrR]. - [MoveXbrRR] -> [^self concretizeUnimplemented]. - [MoveRXbrR] -> [^self concretizeUnimplemented]. [MoveXwrRR] -> [^self concretizeMoveXwrRR]. [MoveRXwrR] -> [^self concretizeMoveRXwrR]. [MoveRMwr] -> [^self concretizeMoveRMwr]. + [MoveRdM64r] -> [^self concretizeRdM64r]. - [MoveRdM64r] -> [^self concretizeUnimplemented]. [PopR] -> [^self concretizePopR]. [PushR] -> [^self concretizePushR]. [PushCq] -> [^self concretizePushCq]. [PushCw] -> [^self concretizePushCw]. [PrefetchAw] -> [^self concretizePrefetchAw]. + [AddCheckOverflowCqR] -> [^self concretizeAddCheckOverflowCqR]. + [AddCheckOverflowRR] -> [^self concretizeAddCheckOverflowRR]. [SubCheckOverflowCqR] -> [^self concretizeSubCheckOverflowCqR]. + [SubCheckOverflowRR] -> [^self concretizeSubCheckOverflowRR]. "Conversion" [ConvertRRd] -> [^self concretizeUnimplemented]}! Item was added: + ----- Method: CogMIPSELCompiler>>divR:R: (in category 'encoding - arithmetic') ----- + divR: dividendReg R: divisorReg + self flag: #todo. "Ascertain what ISA revision adds this instruction" + ^self rtype: SPECIAL rs: dividendReg rt: divisorReg rd: 0 sa: 0 funct: DIV! Item was added: + ----- Method: CogMIPSELCompiler>>genDivR:R:Quo:Rem: (in category 'abstract instructions') ----- + genDivR: abstractRegDivisor R: abstractRegDividend Quo: abstractRegQuotient Rem: abstractRegRemainder + cogit gen: DivRR operand: abstractRegDividend operand: abstractRegDivisor. + cogit gen: MoveLowR operand: abstractRegQuotient. + cogit gen: MoveHighR operand: abstractRegRemainder. + ^0! Item was added: + ----- Method: CogMIPSELCompiler>>isJump (in category 'as yet unclassified') ----- + isJump + ^super isJump or: [opcode between: BrEqualRR and: BrLongNotEqualRR]! Item was changed: ----- Method: CogMIPSELCompiler>>literalBeforeFollowingAddress: (in category 'inline cacheing') ----- literalBeforeFollowingAddress: followingAddress "Answer the literal embedded in the instruction immediately preceding followingAddress. This is used in the MoveCwR, PushCwR and CmpCwR cases." "lui/ori, lui/ori/sw/addi, lui/ori/subu/slt/slt/sltu/sltu" | lastOpcode lastFunction oriAddress | lastOpcode := self opcodeAtAddress: followingAddress - 4. lastFunction := self functionAtAddress: followingAddress - 4. oriAddress := 0. lastOpcode = ORI ifTrue: [oriAddress := followingAddress - 4]. lastOpcode = ADDIU ifTrue: [oriAddress := followingAddress - 16]. + (lastOpcode = SPECIAL and: [lastFunction = SUBU]) ifTrue: [oriAddress := followingAddress - 8]. - (lastOpcode = SPECIAL and: [lastFunction = SLTU]) ifTrue: [oriAddress := followingAddress - 24]. self assert: oriAddress ~= 0. ^self literalAtAddress: oriAddress ! Item was added: + ----- Method: CogMIPSELCompiler>>mfhiR: (in category 'encoding - arithmetic') ----- + mfhiR: destReg + self flag: #todo. "Ascertain what ISA revision adds this instruction" + ^self rtype: SPECIAL rs: 0 rt: 0 rd: destReg sa: 0 funct: MFHI! Item was added: + ----- Method: CogMIPSELCompiler>>mfloR: (in category 'encoding - arithmetic') ----- + mfloR: destReg + self flag: #todo. "Ascertain what ISA revision adds this instruction" + ^self rtype: SPECIAL rs: 0 rt: 0 rd: destReg sa: 0 funct: MFLO! Item was added: + ----- Method: CogMIPSELCompiler>>multR:R: (in category 'encoding - arithmetic') ----- + multR: leftReg R: rightReg + self flag: #todo. "Ascertain what ISA revision adds this instruction" + ^self rtype: SPECIAL rs: leftReg rt: rightReg rd: 0 sa: 0 funct: MULT! Item was changed: ----- Method: CogMIPSELCompiler>>noteFollowingConditionalBranch: (in category 'abstract instructions') ----- noteFollowingConditionalBranch: branch "Support for processors without condition codes, such as the MIPS. Answer the branch opcode. Modify the receiver and the branch to implement a suitable conditional branch that doesn't depend on condition codes being set by the receiver." <var: #branch type: #'AbstractInstruction *'> + | newBranchLeft newBranchOpcode newBranchRight | + + ((branch opcode = JumpOverflow) or: [branch opcode = JumpNoOverflow]) ifTrue: + [opcode := opcode caseOf: { + [AddCqR] -> [AddCheckOverflowCqR]. + [AddRR] -> [AddCheckOverflowRR]. + [MulRR] -> [MulCheckOverflowRR]. + [SubCqR] -> [SubCheckOverflowCqR]. + [SubRR] -> [SubCheckOverflowRR]. + } otherwise: [self unreachable]. + ^branch]. + + newBranchOpcode := branch opcode caseOf: { + [JumpZero] -> [BrEqualRR]. + [JumpNonZero] -> [BrNotEqualRR]. + [JumpBelow] -> [BrUnsignedLessRR]. + [JumpBelowOrEqual] -> [BrUnsignedLessEqualRR]. + [JumpAbove] -> [BrUnsignedGreaterRR]. + [JumpAboveOrEqual] -> [BrUnsignedGreaterEqualRR]. + [JumpLess] -> [BrSignedLessRR]. + [JumpLessOrEqual] -> [BrSignedLessEqualRR]. + [JumpGreater] -> [BrSignedGreaterRR]. + [JumpGreaterOrEqual] -> [BrSignedGreaterEqualRR]. + [JumpLongZero] -> [BrLongEqualRR]. + [JumpLongNonZero] -> [BrLongNotEqualRR]. + } otherwise: [self unreachable]. + + opcode caseOf: { + [BrEqualRR] -> ["I.e., two jumps after a compare." + newBranchLeft := operands at: 1. + newBranchRight := operands at: 2]. + [CmpRR] -> [newBranchLeft := operands at: 0. + newBranchRight := operands at: 1. + opcode := Label]. + [CmpCqR] -> [newBranchLeft := AT. + newBranchRight := operands at: 1. + opcode := MoveCqR. + operands at: 1 put: AT]. + [CmpCwR] -> [newBranchLeft := AT. + newBranchRight := operands at: 1. + opcode := MoveCwR. + operands at: 1 put: AT]. + [TstCqR] -> [newBranchLeft := Cmp. + newBranchRight := ZR]. + [AndCqR] -> [newBranchLeft := operands at: 1. + newBranchRight := ZR]. + [AndCqRR] -> [newBranchLeft := operands at: 2. + newBranchRight := ZR]. + [OrRR] -> [newBranchLeft := operands at: 1. + newBranchRight := ZR]. + [XorRR] -> [newBranchLeft := operands at: 1. + newBranchRight := ZR]. + [SubCwR] -> [newBranchLeft := operands at: 1. + newBranchRight := ZR]. + [SubCqR] -> [newBranchLeft := operands at: 1. + newBranchRight := ZR]. + } otherwise: [self unreachable]. + + branch rewriteOpcode: newBranchOpcode with: newBranchLeft with: newBranchRight. - branch opcode caseOf: { - [JumpOverflow] -> [opcode := opcode caseOf: { - [AddCqR] -> [AddCheckOverflowCqR]. - [AddRR] -> [AddCheckOverflowRR]. - [MulRR] -> [MulCheckOverflowRR]. - [SubCqR] -> [SubCheckOverflowCqR]. - [SubRR] -> [SubCheckOverflowRR]. - }]. - [JumpNoOverflow] -> [opcode := opcode caseOf: { - [AddCqR] -> [AddCheckOverflowCqR]. - [AddRR] -> [AddCheckOverflowRR]. - [MulRR] -> [MulCheckOverflowRR]. - [SubCqR] -> [SubCheckOverflowCqR]. - [SubRR] -> [SubCheckOverflowRR]. - }]. - "Ryan, I'm imagining that all the other cases go in here, such as collapsing CmpRR; JumpZero to Label; BrEqRR. - This is obviously not nearly complete." - [JumpZero] -> [opcode caseOf: { - [CmpRR] -> [branch setOpcode: BrEqRR andOperandsFrom: self. - branch operands at: 2 put: (operands at: 1). - opcode := Label]. - }]. - [JumpNonZero] -> [opcode caseOf: { - [CmpRR] -> [branch setOpcode: BrNeRR andOperandsFrom: self. - branch operands at: 2 put: (operands at: 1). - opcode := Label]. - [CmpCqR] -> [branch setOpcode: BrNeCqR andOperandsFrom: self. - branch operands at: 2 put: (operands at: 1). - opcode := Label]. - }]. - [JumpLongZero] -> [opcode caseOf: { - [CmpRR] -> [branch setOpcode: BrNeRR andOperandsFrom: self. - "skip the following long branch" - branch operands at: 2 put: self jumpLongByteSize. - opcode := JumpLong]. - [CmpCqR] -> [branch setOpcode: BrNeCqR andOperandsFrom: self. - "skip the following long branch" - branch operands at: 2 put: self jumpLongByteSize. - opcode := JumpLong]. - }]. - [JumpLongNonZero] -> [opcode caseOf: { - [CmpRR] -> [branch setOpcode: BrEqRR andOperandsFrom: self. - "skip the following long branch" - branch operands at: 2 put: self jumpLongByteSize. - opcode := JumpLong]. - }]. - } - "No otherwise for now to catch all cases" - "otherwise: []". ^branch! Item was changed: ----- Method: CogMIPSELCompiler>>rewriteCallAt:target: (in category 'inline cacheing') ----- rewriteCallAt: callSiteReturnAddress target: callTargetAddress "Rewrite a call instruction to call a different target. This variant is used to link PICs in ceSendMiss et al,. Answer the extent of the code change which is used to compute the range of the icache to flush." <var: #callSiteReturnAddress type: #usqInt> <var: #callTargetAddress type: #usqInt> "lui t9, stub/targetHigh ori t9, t9, stub/targetLow jalr t9 nop (delay slot) ... <-- callSiteReturnAddress" - self assert: (self opcodeAtAddress: callSiteReturnAddress - 16) = LUI. self assert: (self opcodeAtAddress: callSiteReturnAddress - 12) = ORI. self assert: (self opcodeAtAddress: callSiteReturnAddress - 8) = SPECIAL. self assert: (self functionAtAddress: callSiteReturnAddress - 8) = JALR. self assert: (objectMemory longAt: callSiteReturnAddress - 4) = self nop. cogit disassembleFrom: callSiteReturnAddress - 16 to: callSiteReturnAddress. self literalAtAddress: callSiteReturnAddress - 12 put: callTargetAddress. self assert: (self opcodeAtAddress: callSiteReturnAddress - 16) = LUI. self assert: (self opcodeAtAddress: callSiteReturnAddress - 12) = ORI. self assert: (self opcodeAtAddress: callSiteReturnAddress - 8) = SPECIAL. self assert: (self functionAtAddress: callSiteReturnAddress - 8) = JALR. self assert: (objectMemory longAt: callSiteReturnAddress - 4) = self nop. cogit disassembleFrom: callSiteReturnAddress - 16 to: callSiteReturnAddress. ^20! Item was added: + ----- Method: CogMIPSELCompiler>>rewriteITypeBranchAtAddress:target: (in category 'inline cacheing') ----- + rewriteITypeBranchAtAddress: mcpc target: newTarget + | newDisplacement oldInstruction newInstruction | + newDisplacement := newTarget - (mcpc - 4). "Displacement relative to delay slot" + newDisplacement := newDisplacement >> 2. + + self assert: (newDisplacement between: -16r8000 and: 16r7FFF). + newDisplacement < 0 + ifTrue: [newDisplacement := newDisplacement + 16r10000] + ifFalse: [newDisplacement := newDisplacement]. + self assert: (newDisplacement between: 0 and: 16rFFFF). + + oldInstruction := objectMemory longAt: mcpc. + newInstruction := (oldInstruction bitAnd: 16rFFFF0000) bitOr: newDisplacement. + + objectMemory longAt: mcpc put: newInstruction.! Item was changed: ----- Method: CogMIPSELCompiler>>rewriteJumpLongAt:target: (in category 'inline cacheing') ----- rewriteJumpLongAt: callSiteReturnAddress target: callTargetAddress "Rewrite a jump instruction to call a different target. This variant is used to reset the jumps in the prototype CPIC to suit each use,. Answer the extent of the code change which is used to compute the range of the icache to flush." <var: #callSiteReturnAddress type: #usqInt> <var: #callTargetAddress type: #usqInt> + self assert: (self opcodeAtAddress: callSiteReturnAddress - 8) = J. + self assert: (objectMemory longAt: callSiteReturnAddress - 4) = self nop. + cogit disassembleFrom: callSiteReturnAddress - 8 to: callSiteReturnAddress. + + self rewriteJTypeAtAddress: callSiteReturnAddress - 8 target: callTargetAddress. + + self assert: (self opcodeAtAddress: callSiteReturnAddress - 8) = J. + self assert: (objectMemory longAt: callSiteReturnAddress - 4) = self nop. + cogit disassembleFrom: callSiteReturnAddress - 8 to: callSiteReturnAddress. + + ^8 + "lui t9, stub/targetHigh ori t9, t9, stub/targetLow jr t9 nop (delay slot) ... <-- callSiteReturnAddress" + "self assert: (self opcodeAtAddress: callSiteReturnAddress - 16) = LUI. - self assert: (self opcodeAtAddress: callSiteReturnAddress - 16) = LUI. self assert: (self opcodeAtAddress: callSiteReturnAddress - 12) = ORI. self assert: (self opcodeAtAddress: callSiteReturnAddress - 8) = SPECIAL. self assert: (self functionAtAddress: callSiteReturnAddress - 8) = JR. self assert: (objectMemory longAt: callSiteReturnAddress - 4) = self nop. cogit disassembleFrom: callSiteReturnAddress - 16 to: callSiteReturnAddress. self literalAtAddress: callSiteReturnAddress - 12 put: callTargetAddress. self assert: (self opcodeAtAddress: callSiteReturnAddress - 16) = LUI. self assert: (self opcodeAtAddress: callSiteReturnAddress - 12) = ORI. self assert: (self opcodeAtAddress: callSiteReturnAddress - 8) = SPECIAL. self assert: (self functionAtAddress: callSiteReturnAddress - 8) = JR. self assert: (objectMemory longAt: callSiteReturnAddress - 4) = self nop. cogit disassembleFrom: callSiteReturnAddress - 16 to: callSiteReturnAddress. + ^20"! - ^20! Item was added: + ----- Method: CogMIPSELCompiler>>rewriteOpcode:with:with: (in category 'abstract instructions') ----- + rewriteOpcode: anOpcode with: left with: right + <inline: true> + self assert: anOpcode isInteger. + self assert: left isInteger. + self assert: right isInteger. + + opcode := anOpcode. + operands + "0 is target" + at: 1 put: left; + at: 2 put: right! Item was removed: - ----- Method: CogMIPSELCompiler>>setOpcode:andOperandsFrom: (in category 'accessing') ----- - setOpcode: anOpcode andOperandsFrom: cmpInstruction - <var: #cmpInstruction type: #'AbstractInstruction *'> - <inline: true> - opcode := anOpcode. - operands - at: 0 put: (cmpInstruction operands at: 0); - at: 1 put: (cmpInstruction operands at: 1)! Item was added: + ----- Method: CogMIPSELCompiler>>setsConditionCodesFor: (in category 'testing') ----- + setsConditionCodesFor: aConditionalJumpOpcode + <inline: false> + opcode = XorRR ifTrue: [^true]. "Not really, but we can merge this in noteFollowingConditionalBranch:." + self unreachable. + ^false! Item was changed: ----- Method: CogMIPSELCompiler>>storeLiteral:beforeFollowingAddress: (in category 'inline cacheing') ----- storeLiteral: literal beforeFollowingAddress: followingAddress "Rewrite the long constant loaded by a MoveCwR or PushCwR before the given address" + | lastOpcode lastFunction oriAddress | - | lastOpcode oriAddress | - self flag: #bogus. "The caller ought to know what it is patching, and this should be split into separate methods with stricter checking." lastOpcode := self opcodeAtAddress: followingAddress - 4. + lastFunction := self functionAtAddress: followingAddress - 4. oriAddress := 0. lastOpcode = ORI ifTrue: [oriAddress := followingAddress - 4]. lastOpcode = ADDIU ifTrue: [oriAddress := followingAddress - 16]. + lastOpcode = SPECIAL ifTrue: [lastFunction = SUBU ifTrue: [oriAddress := followingAddress - 8]]. self assert: oriAddress ~= 0. ^self literalAtAddress: oriAddress put: literal! Item was changed: ----- Method: CogRTLOpcodes class>>printFormatForOpcodeName: (in category 'debug printing') ----- printFormatForOpcodeName: opcodeName "Answer a sequence of $r or nil for the operands in the opcode, used for printing." | format operands size | format := OrderedCollection new. size := (operands := opcodeName) size. + (operands startsWith: 'Br') ifTrue: [^' rr']. [#('XwrR' 'X16rR' 'XbrR' 'RR' 'RdR' 'RRd' 'RdRd') do: [:regRegFmt| (operands endsWith: regRegFmt) ifTrue: [format addLast: $r; addLast: $r. operands := operands allButLast: regRegFmt size]]. #('Mwr' 'M16r' 'Mbr' 'M64r') do: [:constRegFmt| (operands endsWith: constRegFmt) ifTrue: [format addLast: $r; addLast: nil. operands := operands allButLast: constRegFmt size]]. #('Cq' 'Cw' 'C32' 'C64' 'Aw' 'Ab') do: [:constFmt| (operands endsWith: constFmt) ifTrue: [format addLast: nil. operands := operands allButLast: constFmt size]]. #('R' 'Rd') do: [:regFmt| (operands endsWith: regFmt) ifTrue: [format addLast: $r. operands := operands allButLast: regFmt size]]. operands size < size] whileTrue: [size := operands size]. ^format reverse "classPool keys collect: [:k| { k. (self printFormatForOpcodeName: k) asArray}]"! Item was removed: - ----- Method: Cogit>>AddCheckOverflowCq:R: (in category 'abstract instructions') ----- - AddCheckOverflowCq: quickConstant R: reg - <inline: true> - <returnTypeC: #'AbstractInstruction *'> - backEnd hasConditionRegister ifTrue: - [^self AddCq: quickConstant R: reg]. - ^self gen: AddCheckOverflowCqR quickConstant: quickConstant operand: reg! Item was removed: - ----- Method: Cogit>>AddCheckOverflowR:R: (in category 'abstract instructions') ----- - AddCheckOverflowR: reg1 R: reg2 - <inline: true> - <returnTypeC: #'AbstractInstruction *'> - backEnd hasConditionRegister ifTrue: - [^self AddR: reg1 R: reg2]. - ^self gen: AddCheckOverflowRR operand: reg1 operand: reg2! Item was removed: - ----- Method: Cogit>>MulCheckOverflowR:R: (in category 'abstract instructions') ----- - MulCheckOverflowR: reg1 R: reg2 - "Multiplication is a little weird on some processors. Defer to the backEnd - to allow it to generate any special code it may need to." - <returnTypeC: #'AbstractInstruction *'> - <inline: false> - backEnd hasConditionRegister ifTrue: - [^self MulR: reg1 R: reg2]. - backEnd genCheckOverflowMulR: reg1 R: reg2. - ^self abstractInstructionAt: opcodeIndex - 1! Item was removed: - ----- Method: Cogit>>SubCheckOverflowCq:R: (in category 'abstract instructions') ----- - SubCheckOverflowCq: quickConstant R: reg - <inline: true> - <returnTypeC: #'AbstractInstruction *'> - backEnd hasConditionRegister ifTrue: - [^self SubCq: quickConstant R: reg]. - ^self gen: SubCheckOverflowCqR quickConstant: quickConstant operand: reg! Item was removed: - ----- Method: Cogit>>SubCheckOverflowR:R: (in category 'abstract instructions') ----- - SubCheckOverflowR: reg1 R: reg2 - <inline: true> - <returnTypeC: #'AbstractInstruction *'> - backEnd hasConditionRegister ifTrue: - [^self SubR: reg1 R: reg2]. - ^self gen: SubCheckOverflowRR operand: reg1 operand: reg2!

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VM Maker: VMMaker.oscog-eem.1531.mcz
by commits＠source.squeak.org 24 Nov '15

24 Nov '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1531.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1531 Author: eem Time: 23 November 2015, 6:10:46.101 pm UUID: 6ce9cac7-d262-4fbc-b171-33134440cdaf Ancestors: VMMaker.oscog-tpr.1530 Cogit: Finish the CPIC rewrite cleanup. Move the rewriteCPICFoo methods out of the AbstractInstruction classes and into Cogit. Add asserts to check the three-operand rewrite routine rewriteCPICCaseAt:tag:objRef:target: works as intended. Make expectedClosedPICPrototype: live up to its comment and answer a bitmask identifying errors. Use inCurrentCompilation: in a few places that still used the bowels of inCurrentCompilation:. =============== Diff against VMMaker.oscog-tpr.1530 =============== Item was changed: ----- Method: CogARMCompiler>>concretizePushCw (in category 'generate machine code - concretize') ----- concretizePushCw "Will get inlined into concretizeAt: switch." <inline: true> | word instrOffset | word := operands at: 0. + (self inCurrentCompilation: word) - ((self isAnInstruction: (cogit cCoerceSimple: word to: #'AbstractInstruction *')) - or: [cogit addressIsInCurrentCompilation: word]) ifTrue: [instrOffset := self loadCwInto: ConcreteIPReg] ifFalse: [self rotateable8bitBitwiseImmediate: word ifTrue: [:rot :immediate :invert| self machineCodeAt: 0 put: (invert ifTrue: [self mvn: ConcreteIPReg imm: immediate ror: rot] ifFalse: [self mov: ConcreteIPReg imm: immediate ror: rot]). instrOffset := 4] ifFalse: [instrOffset := self loadCwInto: ConcreteIPReg]]. self machineCodeAt: instrOffset put: (self pushR: ConcreteIPReg). ^machineCodeSize := instrOffset + 4! Item was changed: ----- Method: CogARMCompiler>>rewriteCPICJumpAt:target: (in category 'inline cacheing') ----- + rewriteCPICJumpAt: addressFollowingJump target: jumpTargetAddress - rewriteCPICJumpAt: callSiteReturnAddress target: callTargetAddress "Rewrite a jump instruction to call a different target. This variant is used to reset the jumps in the prototype CPIC to suit each use,. Answer the extent of the code change which is used to compute the range of the icache to flush." + <var: #addressFollowingJump type: #usqInt> + <var: #jumpTargetAddress type: #usqInt> + <inline: true> + ^self rewriteTransferAt: addressFollowingJump target: jumpTargetAddress! - <var: #callSiteReturnAddress type: #usqInt> - <var: #callTargetAddress type: #usqInt> - ^self rewriteTransferAt: callSiteReturnAddress target: callTargetAddress! Item was removed: - ----- Method: CogAbstractInstruction>>rewriteCPICCaseAt:tag:objRef:target: (in category 'inline cacheing') ----- - rewriteCPICCaseAt: followingAddress tag: newTag objRef: newObjRef target: newTarget - "Rewrite the three values involved in a CPIC case. Used by the initialize & extend CPICs." - self subclassResponsibility - ! Item was removed: - ----- Method: CogIA32Compiler>>rewriteCPICCaseAt:tag:objRef:target: (in category 'inline cacheing') ----- - rewriteCPICCaseAt: followingAddress tag: newTag objRef: newObjRef target: newTarget - "Rewrite the three values involved in a CPIC case. Used by the initialize & extend CPICs." - - "IA32 CPIC cases are - cmpl $0x newTag, %eax - movl $0x newObjRef, %ebx - jz .+0x newTarget (0x00010924)" - - "rewite the tag via the first ldr" - self storeLiteral: newTag beforeFollowingAddress: (followingAddress -11). - - "write the obj ref/operand via the second ldr" - self storeLiteral: newObjRef beforeFollowingAddress: (followingAddress - 6). - - "write the jump address for the new target address" - self rewriteJumpLongAt: followingAddress target: newTarget! Item was changed: ----- Method: CogIA32Compiler>>rewriteCPICJumpAt:target: (in category 'inline cacheing') ----- + rewriteCPICJumpAt: addressFollowingJump target: jumpTargetAddress - rewriteCPICJumpAt: callSiteReturnAddress target: callTargetAddress "Rewrite the short jump instruction to jump to a new cpic case target. " + <var: #addressFollowingJump type: #usqInt> + <var: #jumpTargetAddress type: #usqInt> - <var: #callSiteReturnAddress type: #usqInt> - <var: #callTargetAddress type: #usqInt> | callDistance | + callDistance := jumpTargetAddress - addressFollowingJump. + self assert: callDistance abs < 128. - callDistance := (callTargetAddress - callSiteReturnAddress) signedIntToLong. - self assert: (callDistance < 256). objectMemory + byteAt: addressFollowingJump - 1 + put: (callDistance bitAnd: 16rFF). - byteAt: callSiteReturnAddress - 1 put: (callDistance bitAnd: 16rFF). "self cCode: '' + inSmalltalk: [cogit disassembleFrom: addressFollowingJump - 10 to: addressFollowingJump - 1]." - inSmalltalk: [cogit disassembleFrom: callSiteReturnAddress - 10 to: callSiteReturnAddress - 1]." ^2! Item was removed: - ----- Method: CogMIPSELCompiler>>rewriteCPICCaseAt:tag:objRef:target: (in category 'inline cacheing') ----- - rewriteCPICCaseAt: followingAddress tag: newTag objRef: newObjRef target: newTarget - "rewrite the three values involved in a CPIC case. Used by the create & extend cpcic methods" - - "lui at, tagHigh - ori at, at, tagLow - subu t0, s5, at (Cmp) - slt ... (Cmp) - slt ... (Cmp) - sltu ... (Cmp) - sltu ... (Cmp) - lui s4, objRefHigh - ori s4, s4, objRefLow - bne t0, zr, +12 - nop (delay slot) - j target - nop (delay slot) - .... <-- followingAddress" - - cogit disassembleFrom: followingAddress - 52 to: followingAddress. - self assert: (self opcodeAtAddress: followingAddress - 52) = LUI. - self assert: (self opcodeAtAddress: followingAddress - 48) = ORI. - self assert: (self functionAtAddress: followingAddress - 44) = SUBU. - self assert: (self functionAtAddress: followingAddress - 40) = SLT. - self assert: (self functionAtAddress: followingAddress - 36) = SLT. - self assert: (self functionAtAddress: followingAddress - 32) = SLTU. - self assert: (self functionAtAddress: followingAddress - 28) = SLTU. - self assert: (self opcodeAtAddress: followingAddress - 24) = LUI. - self assert: (self opcodeAtAddress: followingAddress - 20) = ORI. - self assert: (self opcodeAtAddress: followingAddress - 16) = BNE. - self assert: (objectMemory longAt: followingAddress - 12) = self nop. - self assert: (self opcodeAtAddress: followingAddress - 8) = J. - self assert: (objectMemory longAt: followingAddress - 4) = self nop. - - self literalAtAddress: followingAddress - 48 put: newTag. - self literalAtAddress: followingAddress - 20 put: newObjRef. - self rewriteJTypeAtAddress: followingAddress - 8 target: newTarget. - - cogit disassembleFrom: followingAddress - 52 to: followingAddress. - self assert: (self opcodeAtAddress: followingAddress - 52) = LUI. - self assert: (self opcodeAtAddress: followingAddress - 48) = ORI. - self assert: (self functionAtAddress: followingAddress - 44) = SUBU. - self assert: (self functionAtAddress: followingAddress - 40) = SLT. - self assert: (self functionAtAddress: followingAddress - 36) = SLT. - self assert: (self functionAtAddress: followingAddress - 32) = SLTU. - self assert: (self functionAtAddress: followingAddress - 28) = SLTU. - self assert: (self opcodeAtAddress: followingAddress - 24) = LUI. - self assert: (self opcodeAtAddress: followingAddress - 20) = ORI. - self assert: (self opcodeAtAddress: followingAddress - 16) = BNE. - self assert: (objectMemory longAt: followingAddress - 12) = self nop. - self assert: (self opcodeAtAddress: followingAddress - 8) = J. - self assert: (objectMemory longAt: followingAddress - 4) = self nop. - - ^56! Item was changed: ----- Method: CogMIPSELCompiler>>rewriteCPICJumpAt:target: (in category 'inline cacheing') ----- + rewriteCPICJumpAt: addressFollowingJump target: jumpTargetAddress - rewriteCPICJumpAt: callSiteReturnAddress target: callTargetAddress "Rewrite a jump instruction to call a different target. This variant is used to reset the jumps in the prototype CPIC to suit each use,. Answer the extent of the code change which is used to compute the range of the icache to flush." + <var: #addressFollowingJump type: #usqInt> + <var: #jumpTargetAddress type: #usqInt> - <var: #callSiteReturnAddress type: #usqInt> - <var: #callTargetAddress type: #usqInt> + cogit disassembleFrom: addressFollowingJump - 16 to: addressFollowingJump + 16. - cogit disassembleFrom: callSiteReturnAddress - 16 to: callSiteReturnAddress + 16. self halt.! Item was removed: - ----- Method: CogOutOfLineLiteralsARMCompiler>>rewriteCPICCaseAt:tag:objRef:target: (in category 'inline cacheing') ----- - rewriteCPICCaseAt: followingAddress tag: newTag objRef: newObjRef target: newTarget - "rewrite the three values involved in a CPIC case. Used by the create & extend cpcic methods" - - "ARM CPIC cases are - ldr TempReg, [pc relative -> tag] - cmp TempReg0, TempReg - ldr SendNumArgs, [pc relative -> obj ref] - beq target" - "rewite the tag via the first ldr" - objectMemory longAt: (self pcRelativeAddressAt: followingAddress - 16) put: newTag. - - "write the obj ref/operand via the second ldr" - objectMemory longAt: (self pcRelativeAddressAt: followingAddress - 8) put: newObjRef. - - "write the jump address for the new target address" - self rewriteJumpLongAt: followingAddress target: newTarget! Item was changed: ----- Method: CogOutOfLineLiteralsARMCompiler>>usesOutOfLineLiteral (in category 'testing') ----- usesOutOfLineLiteral "Answer if the receiver uses an out-of-line literal. Needs only to work for the opcodes created with gen:literal:operand: et al." opcode caseOf: { [CallFull] -> [^true]. [JumpFull] -> [^true]. "Arithmetic" [AddCqR] -> [^self rotateable8bitSignedImmediate: (operands at: 0) ifTrue: [:r :i :n| false] ifFalse: [true]]. [AndCqR] -> [^self rotateable8bitBitwiseImmediate: (operands at: 0) ifTrue: [:r :i :n| false] ifFalse: [1 << (operands at: 0) highBit ~= ((operands at: 0) + 1)]]. [AndCqRR] -> [^self rotateable8bitBitwiseImmediate: (operands at: 0) ifTrue: [:r :i :n| false] ifFalse: [1 << (operands at: 0) highBit ~= ((operands at: 0) + 1)]]. [CmpCqR] -> [^self rotateable8bitSignedImmediate: (operands at: 0) ifTrue: [:r :i :n| false] ifFalse: [true]]. [OrCqR] -> [^self rotateable8bitImmediate: (operands at: 0) ifTrue: [:r :i| false] ifFalse: [true]]. [SubCqR] -> [^self rotateable8bitSignedImmediate: (operands at: 0) ifTrue: [:r :i :n| false] ifFalse: [true]]. [TstCqR] -> [^self rotateable8bitImmediate: (operands at: 0) ifTrue: [:r :i| false] ifFalse: [true]]. [XorCqR] -> [^self rotateable8bitBitwiseImmediate: (operands at: 0) ifTrue: [:r :i :n| false] ifFalse: [true]]. [AddCwR] -> [^true]. [AndCwR] -> [^true]. [CmpCwR] -> [^true]. [OrCwR] -> [^true]. [SubCwR] -> [^true]. [XorCwR] -> [^true]. [LoadEffectiveAddressMwrR] -> [^self rotateable8bitImmediate: (operands at: 0) ifTrue: [:r :i| false] ifFalse: [true]]. "Data Movement" [MoveCqR] -> [^self rotateable8bitImmediate: (operands at: 0) ifTrue: [:r :i| false] ifFalse: [true]]. + [MoveCwR] -> [^(self inCurrentCompilation: (operands at: 0)) not]. - [MoveCwR] -> [^((self isAnInstruction: (cogit cCoerceSimple: (operands at: 0) to: #'AbstractInstruction *')) "i.e. a label, which by definition will be in the current compilation." - or: [cogit addressIsInCurrentCompilation: (operands at: 0)]) not]. [MoveAwR] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [false] ifFalse: [true]]. [MoveRAw] -> [^(self isAddressRelativeToVarBase: (operands at: 1)) ifTrue: [false] ifFalse: [true]]. [MoveAbR] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [false] ifFalse: [true]]. [MoveRAb] -> [^(self isAddressRelativeToVarBase: (operands at: 1)) ifTrue: [false] ifFalse: [true]]. [MoveRMwr] -> [^self is12BitValue: (operands at: 1) ifTrue: [:u :i| false] ifFalse: [true]]. [MoveRdM64r] -> [^self is12BitValue: (operands at: 1) ifTrue: [:u :i| false] ifFalse: [true]]. [MoveMbrR] -> [^self is12BitValue: (operands at: 0) ifTrue: [:u :i| false] ifFalse: [true]]. [MoveRMbr] -> [^self is12BitValue: (operands at: 1) ifTrue: [:u :i| false] ifFalse: [true]]. [MoveM16rR] -> [^self rotateable8bitImmediate: (operands at: 0) ifTrue: [:r :i| false] ifFalse: [true]]. [MoveM64rRd] -> [^self is12BitValue: (operands at: 0) ifTrue: [:u :i| false] ifFalse: [true]]. [MoveMwrR] -> [^self is12BitValue: (operands at: 0) ifTrue: [:u :i| false] ifFalse: [true]]. + [PushCw] -> [^(self inCurrentCompilation: (operands at: 0)) not]. - [PushCw] -> [^((self isAnInstruction: (cogit cCoerceSimple: (operands at: 0) to: #'AbstractInstruction *')) "i.e. a label, which by definiion will be in the current compilation." - or: [cogit addressIsInCurrentCompilation: (operands at: 0)]) not]. [PushCq] -> [^self rotateable8bitImmediate: (operands at: 0) ifTrue: [:r :i| false] ifFalse: [true]]. [PrefetchAw] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [false] ifFalse: [true]]. } otherwise: [self assert: false]. ^false "to keep C compiler quiet" ! Item was added: + ----- Method: CogX64Compiler>>rewriteCallAt:target: (in category 'inline cacheing') ----- + rewriteCallAt: callSiteReturnAddress target: callTargetAddress + "Rewrite a call instruction to call a different target. This variant is used to link PICs + in ceSendMiss et al, and to rewrite cached primitive calls. Answer the extent of + the code change which is used to compute the range of the icache to flush." + <var: #callSiteReturnAddress type: #usqInt> + <var: #callTargetAddress type: #usqInt> + | callDistance | + "self cCode: '' + inSmalltalk: [cogit disassembleFrom: callSiteReturnAddress - 10 to: callSiteReturnAddress - 1]." + false + ifTrue: [self assert: callTargetAddress >= cogit minCallAddress] + ifFalse: [callTargetAddress >= cogit minCallAddress ifFalse: + [self error: 'linking callsite to invalid address']]. + callDistance := (callTargetAddress - callSiteReturnAddress) signedIntToLong. + objectMemory + byteAt: callSiteReturnAddress - 1 put: (callDistance >> 24 bitAnd: 16rFF); + byteAt: callSiteReturnAddress - 2 put: (callDistance >> 16 bitAnd: 16rFF); + byteAt: callSiteReturnAddress - 3 put: (callDistance >> 8 bitAnd: 16rFF); + byteAt: callSiteReturnAddress - 4 put: (callDistance bitAnd: 16rFF). + self assert: (self callTargetFromReturnAddress: callSiteReturnAddress) signedIntToLong = callTargetAddress. + "self cCode: '' + inSmalltalk: [cogit disassembleFrom: callSiteReturnAddress - 10 to: callSiteReturnAddress - 1]." + ^5! Item was added: + ----- Method: CogX64Compiler>>rewriteJumpLongAt:target: (in category 'inline cacheing') ----- + rewriteJumpLongAt: addressFollowingJump target: jumpTargetAddress + "Rewrite a long jump instruction to jump to a different target. This variant + is used to rewrite cached primitive calls. Answer the extent of the + code change which is used to compute the range of the icache to flush." + <inline: true> + ^self rewriteCallAt: addressFollowingJump target: jumpTargetAddress! Item was changed: ----- Method: Cogit>>cogExtendPIC:CaseNMethod:tag:isMNUCase: (in category 'in-line cacheing') ----- cogExtendPIC: cPIC CaseNMethod: caseNMethod tag: caseNTag isMNUCase: isMNUCase "Extend the cPIC with the supplied case. If caseNMethod is cogged dispatch direct to its unchecked entry-point. If caseNMethod is not cogged, jump to the fast interpreter dispatch, and if isMNUCase then dispatch to fast MNU invocation and mark the cPIC as having the MNU case for cache flushing." <var: #cPIC type: #'CogMethod *'> | operand target address | coInterpreter compilationBreak: cPIC selector point: (objectMemory numBytesOf: cPIC selector) isMNUCase: isMNUCase. self assert: (objectRepresentation inlineCacheTagIsYoung: caseNTag) not. "Caller patches to open pic if caseNMethod is young." self assert: (caseNMethod notNil and: [(objectMemory isYoung: caseNMethod) not]). (isMNUCase not and: [coInterpreter methodHasCogMethod: caseNMethod]) + ifTrue: "this isn't an MNU and we have an already cogged method to jump to" - ifTrue: "this isn't an mNU and we have an already cogged method to jump to" [operand := 0. target := (coInterpreter cogMethodOf: caseNMethod) asInteger + cmNoCheckEntryOffset] ifFalse: [operand := caseNMethod. isMNUCase + ifTrue: "this is an MNU so tag the CPIC header and setup a jump to the MNUAbort" - ifTrue: "this is an mNU so tag the CPIC header and setup a jump to the mNUAbort" [cPIC cpicHasMNUCase: true. target := cPIC asInteger + (self sizeof: CogMethod)] ifFalse: "setup a jump to the interpretAborth so we can cog the target method" [target := cPIC asInteger + self picInterpretAbortOffset]]. "find the end address of the new case" address := self addressOfEndOfCase: cPIC cPICNumCases +1 inCPIC: cPIC. + self rewriteCPICCaseAt: address tag: caseNTag objRef: operand target: target. - backEnd rewriteCPICCaseAt: address tag: caseNTag objRef: operand target: target. "finally, rewrite the jump 3 instr before firstCPICCaseOffset to jump to the beginning of this new case" self rewriteCPIC: cPIC caseJumpTo: address - cPICCaseSize. processor flushICacheFrom: cPIC asUnsignedInteger to: cPIC asUnsignedInteger + closedPICSize. "update the header flag for the number of cases" cPIC cPICNumCases: cPIC cPICNumCases + 1. ^0! Item was changed: ----- Method: Cogit>>configureCPIC:Case0:Case1Method:tag:isMNUCase:numArgs:delta: (in category 'in-line cacheing') ----- configureCPIC: cPIC Case0: case0CogMethod Case1Method: case1Method tag: case1Tag isMNUCase: isMNUCase numArgs: numArgs delta: addrDelta "Configure a copy of the prototype CPIC for a two-case PIC for case0CogMethod and case1Method case1Tag. The tag for case0CogMethod is at the send site and so doesn't need to be generated. case1Method may be any of - a Cog method; jump to its unchecked entry-point - a CompiledMethod; jump to the ceInterpretFromPIC trampoline - nil; call ceMNUFromPIC + addDelta is the address change from the prototype to the new CPIC location, needed + because the loading of the CPIC label at the end may use a literal instead of a pc relative load." + "self disassembleFrom: cPIC asInteger + (self sizeof: CogMethod) to: cPIC asInteger + closedPICSize" - addDelta is the address change from the prototype to the new CPCI location, needed - because the loading of the CPIC lable at the end may use a literal instead of a pc relative" <var: #cPIC type: #'CogMethod *'> <var: #case0CogMethod type: #'CogMethod *'> | operand targetEntry caseEndAddress| <var: #targetEntry type: #'void *'> self assert: case1Method notNil. "adjust the call at missOffset, the ceAbortXArgs" backEnd rewriteCallAt: cPIC asInteger + missOffset target: (self picAbortTrampolineFor: numArgs). self assert: (objectRepresentation inlineCacheTagIsYoung: case1Tag) not. (isMNUCase not and: [coInterpreter methodHasCogMethod: case1Method]) ifTrue: [operand := 0. targetEntry := ((coInterpreter cogMethodOf: case1Method) asInteger + cmNoCheckEntryOffset) asVoidPointer] ifFalse: "We do not scavenge PICs, hence we cannot cache the MNU method if it is in new space." [operand := (case1Method isNil or: [objectMemory isYoungObject: case1Method]) ifTrue: [0] ifFalse: [case1Method]. targetEntry := case1Method isNil ifTrue: [cPIC asInteger + (self sizeof: CogMethod)] ifFalse: [cPIC asInteger + self picInterpretAbortOffset]]. "set the jump to the case0 method" backEnd rewriteJumpLongAt: cPIC asInteger + firstCPICCaseOffset target: case0CogMethod asInteger + cmNoCheckEntryOffset. caseEndAddress := self addressOfEndOfCase: 2 inCPIC: cPIC. + "update the cpic case" + self + rewriteCPICCaseAt: caseEndAddress + tag: case1Tag + objRef: operand + target: (isMNUCase ifTrue: [cPIC asInteger + (self sizeof: CogMethod)] ifFalse: [targetEntry]) asInteger. - "update the cpic case - deferred to backend because messy" - backEnd rewriteCPICCaseAt: caseEndAddress tag: case1Tag objRef: operand target: (isMNUCase ifTrue: [cPIC asInteger + (self sizeof: CogMethod)] ifFalse: [targetEntry]) asInteger. + "update the loading of the CPIC address" - "update the loading of the PCIC label address" backEnd relocateMethodReferenceBeforeAddress: cPIC asInteger + cPICEndOfCodeOffset - backEnd jumpLongByteSize by: addrDelta. "write the final desperate jump to cePICMissXArgs" backEnd rewriteJumpLongAt: cPIC asInteger + cPICEndOfCodeOffset target: (self cPICMissTrampolineFor: numArgs). ^0 "self disassembleFrom: cPIC + (self sizeof: CogMethod) to: cPIC + closedPICSize - 1."! Item was changed: ----- Method: Cogit>>configureMNUCPIC:methodOperand:numArgs:delta: (in category 'in-line cacheing') ----- configureMNUCPIC: cPIC methodOperand: methodOperand numArgs: numArgs delta: addrDelta + "Configure a copy of the prototype CPIC for a one-case MNU CPIC that calls ceMNUFromPIC for + case0Tag The tag for case0 is at the send site and so doesn't need to be generated. + addDelta is the address change from the prototype to the new CPIC location, needed + because the loading of the CPIC label at the end may be a literal instead of a pc-relative load." - "Configure a copy of the prototype CPIC for a one-case MNU PIC that calls ceMNUFromPIC for case0Tag - The tag for case0 is at the send site and so doesn't need to be generated. - addDelta is the address change from the prototype to the new CPCI location, needed - because the loading of the CPIC label at the end may use a literal instead of a pc relative" <var: #cPIC type: #'CogMethod *'> | operand | "adjust the jump at missOffset, the ceAbortXArgs" backEnd rewriteJumpLongAt: cPIC asInteger + missOffset target: (self picAbortTrampolineFor: numArgs). "We do not scavenge PICs, hence we cannot cache the MNU method if it is in new space." operand := (methodOperand isNil or: [objectMemory isYoungObject: methodOperand]) ifTrue: [0] ifFalse: [methodOperand]. "set the jump to the case0 method" backEnd rewriteJumpLongAt: cPIC asInteger + firstCPICCaseOffset target: cPIC asInteger + (self sizeof: CogMethod) . backEnd storeLiteral: operand beforeFollowingAddress: cPIC asInteger + firstCPICCaseOffset - backEnd jumpLongByteSize. "rewrite the final desperate jump to cePICMissXArgs" backEnd rewriteJumpLongAt: cPIC asInteger + cPICEndOfCodeOffset target: (self cPICMissTrampolineFor: numArgs). + "update the loading of the CPIC label address" - "update the loading of the PCIC label address" backEnd relocateMethodReferenceBeforeAddress: cPIC asInteger + cPICEndOfCodeOffset - backEnd jumpLongByteSize by: addrDelta. + "finally, rewrite the jump 3 instr before firstCPICCaseOffset to jump to the end of case 2, missing the actual case" - "finally, rewrite the jump 3 instr before firstCPICCaseOffset to jump to the end of case 2, missing the actual case" self rewriteCPIC: cPIC caseJumpTo: (self addressOfEndOfCase: 2 inCPIC: cPIC). + ^0! - - ^0 - ! Item was changed: ----- Method: Cogit>>expectedClosedPICPrototype: (in category 'in-line cacheing') ----- expectedClosedPICPrototype: cPIC + "Use asserts to check if the ClosedPICPrototype is as expected from compileClosedPICPrototype, + and can be updated as required via rewriteCPICCaseAt:tag:objRef:target:. If all asserts pass, answer + 0, otherwise answer a bit mask identifying all the errors." - "Answer 0 if the ClosedPIC is as expected from compileClosedPICPrototype, - otherwise answer an error code identifying the first discrepancy found." "self disassembleFrom: methodZoneBase + (self sizeof: CogMethod) to: methodZoneBase + closedPICSize" <var: #cPIC type: #'CogMethod *'> + | pc errors object classTag entryPoint | + errors := 0. - | pc object entryPoint | pc := cPIC asUnsignedInteger + firstCPICCaseOffset. "First jump is unconditional; subsequent ones are conditional" object := backEnd literalBeforeFollowingAddress: pc - backEnd jumpLongByteSize. + (self asserta: object = 16r5EAF00D) ifFalse: + [errors := 1]. - self assert: object = 16r5EAF00D. entryPoint := backEnd jumpLongTargetBeforeFollowingAddress: pc. + (self asserta: entryPoint = (self cPICPrototypeCaseOffset + 16rCA5E10)) ifFalse: + [errors := errors + 2]. - self assert: entryPoint = (self cPICPrototypeCaseOffset + 16rCA5E10). 1 to: maxCPICCases - 1 do: [:i | | methodObjPC classTagPC | pc := pc + cPICCaseSize. + "verify information in case is as expected." methodObjPC := pc - backEnd jumpLongConditionalByteSize - backEnd cmpC32RTempByteSize. object := backEnd literalBeforeFollowingAddress: methodObjPC. + (self asserta: object = (16rBADA550 + i)) ifFalse: + [errors := errors bitOr: 4]. - self assert: object = (16rBADA550 + i). - backEnd storeLiteral: (object bitXor: 16rA5A5A5A5) beforeFollowingAddress: methodObjPC. - object := backEnd literalBeforeFollowingAddress: methodObjPC. - self assert: object = (16rBADA550 + i bitXor: 16rA5A5A5A5). - backEnd storeLiteral: (object bitXor: 16rA5A5A5A5) beforeFollowingAddress: methodObjPC. classTagPC := pc - backEnd jumpLongConditionalByteSize. + classTag := backEnd literal32BeforeFollowingAddress: classTagPC. + (self asserta: classTag = (16rBABE1F15 + i)) ifFalse: + [errors := errors bitOr: 8]. - object := backEnd literal32BeforeFollowingAddress: classTagPC. - self assert: object = (16rBABE1F15 + i). - backEnd storeLiteral32: (object bitXor: 16r5A5A5A5A) beforeFollowingAddress: classTagPC. - object := backEnd literal32BeforeFollowingAddress: classTagPC. - self assert: object = (16rBABE1F15 + i bitXor: 16r5A5A5A5A). - backEnd storeLiteral32: (object bitXor: 16r5A5A5A5A) beforeFollowingAddress: classTagPC. entryPoint := backEnd jumpLongConditionalTargetBeforeFollowingAddress: pc. + (self asserta: entryPoint = (self cPICPrototypeCaseOffset + 16rCA5E10 + (i * 16))) ifFalse: + [errors := errors bitOr: 16]. - self assert: entryPoint = (self cPICPrototypeCaseOffset + 16rCA5E10 + (i * 16))]. + "change case via rewriteCPICCaseAt:tag:objRef:target:" + self rewriteCPICCaseAt: pc + tag: (classTag bitXor: 16r5A5A5A5A) + objRef: (object bitXor: 16rA5A5A5A5) + target: (entryPoint bitXor: 16r55AA50). "don't xor least 4 bits to leave instruction alignment undisturbed" + + "verify information in case is as expected post update." + object := backEnd literalBeforeFollowingAddress: methodObjPC. + (self asserta: object = (16rBADA550 + i bitXor: 16rA5A5A5A5)) ifFalse: + [errors := errors bitOr: 32]. + classTag := backEnd literal32BeforeFollowingAddress: classTagPC. + (self asserta: classTag = (16rBABE1F15 + i bitXor: 16r5A5A5A5A)) ifFalse: + [errors := errors bitOr: 64]. + entryPoint := backEnd jumpLongConditionalTargetBeforeFollowingAddress: pc. + (self asserta: entryPoint = ((self cPICPrototypeCaseOffset + 16rCA5E10 + (i * 16)) bitXor: 16r55AA50)) ifFalse: + [errors := errors bitOr: 128]. + + "finally restore case to the original state" + self rewriteCPICCaseAt: pc + tag: (classTag bitXor: 16r5A5A5A5A) + objRef: (object bitXor: 16rA5A5A5A5) + target: (entryPoint bitXor: 16r55AA50)]. + entryPoint := backEnd jumpLongTargetBeforeFollowingAddress: pc + cPICEndSize - literalsManager endSizeOffset. + (self asserta: entryPoint = (self cPICMissTrampolineFor: 0)) ifFalse: + [errors := errors + 256]. - self assert: entryPoint = (self cPICMissTrampolineFor: 0). + ^errors! - ^0! Item was added: + ----- Method: Cogit>>rewriteCPICCaseAt:tag:objRef:target: (in category 'in-line cacheing') ----- + rewriteCPICCaseAt: followingAddress tag: newTag objRef: newObjRef target: newTarget + "Rewrite the three values involved in a CPIC case. Used by the initialize & extend CPICs. + c.f. expectedClosedPICPrototype:" + + "write the obj ref/operand via the second ldr" + | classTagPC methodObjPC | + methodObjPC := followingAddress - backEnd jumpLongConditionalByteSize - backEnd cmpC32RTempByteSize. + backEnd storeLiteral: newObjRef beforeFollowingAddress: methodObjPC. + + classTagPC := followingAddress - backEnd jumpLongConditionalByteSize. + "rewite the tag via the first ldr" + backEnd storeLiteral32: newTag beforeFollowingAddress: classTagPC. + + "write the jump address for the new target address" + backEnd rewriteJumpLongAt: followingAddress target: newTarget!

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VM Maker: VMMaker-tpr.372.mcz
by commits＠source.squeak.org 24 Nov '15

24 Nov '15

tim Rowledge uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker-tpr.372.mcz ==================== Summary ==================== Name: VMMaker-tpr.372 Author: tpr Time: 23 November 2015, 4:54:38.101 pm UUID: 4cb83acc-cffe-4e94-b3c5-2ba5d69bcffc Ancestors: VMMaker-dtl.371 Add two (currently null) methods so that the Squeak3D plugin (via B3DEnginePlugin) can be modified to work in a Cog VMmaker without breaking this version. A check generate shows that none of the code generated changes. =============== Diff against VMMaker-dtl.371 =============== Item was added: + ----- Method: CCodeGenerator>>inferTypesForImplicitlyTypedVariablesAndMethods (in category 'as yet unclassified') ----- + inferTypesForImplicitlyTypedVariablesAndMethods + "In the Cog VMMAKer/CCodeGenerator this message invokes deriving types for variables and returns. Here, now, it does nothing"! Item was added: + ----- Method: InterpreterPlugin class>>pruneUnusedInterpreterPluginMethodsIn: (in category 'as yet unclassified') ----- + pruneUnusedInterpreterPluginMethodsIn: ignored + "In the Cog VMMaker/InterpreterPlugin this method removes unneeded plugin methods. Here, now, it does nothing"!

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Re: [Pharo-dev] vm crash in SmalltalkImage>garbageCollect
by Eliot Miranda 24 Nov '15

24 Nov '15

Hi Andrei, On Mon, Nov 23, 2015 at 7:59 AM, Andrei Chis <chisvasileandrei(a)gmail.com> wrote: > Hi, > > With both the latest and stable vm I have an use case in which the vm > crashed in SmalltalkImage>>garbageCollect. > > To set up an image that exhibits the failure , execute this with the > latest pharo version: > > /pharo Pharo.image eval --save "{ { 'ConfigurationOfRubric'. 'Pharo'. > 'Rubric' }. { 'ConfigurationOfGlamourCore'. 'Moose'. 'Glamour' }. { > 'ConfigurationOfGTInspectorCore'. 'Moose'. 'GToolkit' }. { > 'ConfigurationOfGTPlaygroundCore'. 'Moose'. 'GToolkit' }. { > 'ConfigurationOfGTEventRecorder'. 'Moose'. 'GToolkit' }. { > 'ConfigurationOfGTSpotter'. 'Moose'. 'GToolkit' }. } do: [ :spec | Gofer > new smalltalkhubUser: spec second project: spec third; package: spec first; > load ]." > > ./pharo Pharo.image config > http://www.smalltalkhub.com/mc/Pharo/Pharo50Inbox/main > ConfigurationOfGToolkitCore --install=3.2 > > Then attempting to run the following code triggers the failure: > > ./pharo Pharo.image eval --save "TestRunner open model > packageSearchUpdate: 'gt-tests-inspector'; classSearchUpdate: > 'GTInspectorExamplesTest'; runAll" > > Based on the trace below the failure happens when the > test GTInspectorExamplesTest calls 'Smalltalk>>garbageCollect' in the setUp > method. > > That call can be removed, however, in other runs the failure happens in > other methods calling Smalltalk>>garbageCollect. > > Is it possible that this is a bug with the image (some broken object) or > is it a vm bug? > The way to test this is to build an assert VM and then use the leak checker. The leak checker will allow you to narrow down the cause. If the leak checker shows no corruption then its definitely a GC bug. If there leak checker does show corruption before GC then one still has to find out what caused the heap corruption, but you can use the leak checker to narrow the search. HTH Eliot Cheers, > > Andrei > > > > andrei$ ./pharo Pharo.image eval --save "{ { 'ConfigurationOfRubric'. > 'Pharo'. 'Rubric' }. { 'ConfigurationOfGlamourCore'. 'Moose'. 'Glamour' }. > { 'ConfigurationOfGTInspectorCore'. 'Moose'. 'GToolkit' }. { > 'ConfigurationOfGTPlaygroundCore'. 'Moose'. 'GToolkit' }. { > 'ConfigurationOfGTEventRecorder'. 'Moose'. 'GToolkit' }. { > 'ConfigurationOfGTSpotter'. 'Moose'. 'GToolkit' }. } do: [ :spec | Gofer > new smalltalkhubUser: spec second project: spec third; package: spec first; > load ]." > > andrei$ ./pharo Pharo.image config > http://www.smalltalkhub.com/mc/Pharo/Pharo50Inbox/main > ConfigurationOfGToolkitCore --install=3.2 > > andrei$ ./pharo Pharo.image eval --save "TestRunner open model > packageSearchUpdate: 'gt-tests-inspector'; classSearchUpdate: > 'GTInspectorExamplesTest'; runAll" > > > Segmentation fault Mon Nov 23 16:48:36 2015 > > > > https://github.com/pharo-project/pharo-vm.git Commit: > 28d077d8df494ce050ca42c97c892471e8b8740c Date: 2015-10-16 12:02:43 +0200 > By: Esteban Lorenzano <estebanlm(a)gmail.com> Jenkins build #15016 > > > C stack backtrace: > > 0 Pharo 0x0004cacf reportStackState + 159 > > > > Smalltalk stack dump: > > 0xbffbf1a0 M SmalltalkImage>garbageCollect 0x1fd49e30: a(n) SmalltalkImage > > 0xbffbf1c0 I GTInspectorExamplesTest>setUp 0x2126bc80: a(n) > GTInspectorExamplesTest > > 0x2126cb90 is not a context > > > Most recent primitives > > @ > > basicNew > > @ > > @ > > @ > > @ > > @ > > @ > > @ > > @ > > @ > > basicNew > > basicNew > > basicNew > > @ > > @ > > @ > > @ > > shallowCopy > > new > > new: > > new: > > basicNew > > basicNew > > new: > > basicNew > > new: > > replaceFrom:to:with:startingAt: > > new: > > basicNew > > new: > > replaceFrom:to:with:startingAt: > > new: > > basicNew > > @ > > new: > > at:put: > > at:put: > > perform:with: > > perform:with: > > perform: > > @ > > @ > > basicNew > > @ > > @ > > @ > > @ > > @ > > @ > > basicNew > > @ > > new: > > at:put: > > at:put: > > perform:with: > > perform:with: > > perform: > > @ > > @ > > basicNew > > @ > > @ > > @ > > @ > > @ > > @ > > new > > @ > > @ > > @ > > @ > > @ > > basicNew > > @ > > @ > > new: > > at:put: > > @ > > @ > > basicNew > > @ > > @ > > @ > > @ > > new: > > at:put: > > at:put: > > at:put: > > at:put: > > new: > > @ > > at:put: > > @ > > at:put: > > @ > > at:put: > > @ > > at:put: > > @ > > @ > > @ > > @ > > @ > > @ > > basicNew > > @ > > @ > > basicNew > > @ > > @ > > basicNew > > @ > > @ > > @ > > @ > > @ > > shallowCopy > > shallowCopy > > @ > > @ > > new: > > at:put: > > at:put: > > at:put: > > at:put: > > new: > > @ > > at:put: > > @ > > at:put: > > @ > > at:put: > > @ > > at:put: > > @ > > @ > > @ > > @ > > @ > > @ > > basicNew > > @ > > @ > > basicNew > > @ > > @ > > basicNew > > @ > > @ > > @ > > @ > > @ > > basicNew > > @ > > @ > > @ > > @ > > basicNew > > @ > > @ > > basicNew > > @ > > @ > > basicNew > > @ > > @ > > @ > > @ > > @ > > basicNew > > @ > > @ > > @ > > @ > > basicNew > > @ > > @ > > perform: > > basicNew > > new: > > basicNew > > new: > > basicNew > > new: > > shallowCopy > > shallowCopy > > primUTCMicrosecondsClock > > // > > basicNew > > basicNew > > new: > > at:put: > > at:put: > > at:put: > > at:put: > > value > > valueNoContextSwitch > > basicNew > > new: > > basicNew > > new: > > new: > > basicNew > > new: > > replaceFrom:to:with:startingAt: > > primitiveGarbageCollect > > **IncrementalGC** > > **FullGC** > > garbageCollectMost > > **IncrementalGC** > > basicNew > > new: > > someInstance > > basicNew > > new: > > someInstance > > basicNew > > new: > > someInstance > > new: > > basicNew > > new: > > replaceFrom:to:with:startingAt: > > primitiveGarbageCollect > > **IncrementalGC** > > **FullGC** > > garbageCollectMost > > **IncrementalGC** > > wait > > shallowCopy > > shallowCopy > > signal > > wait > > shallowCopy > > shallowCopy > > at:put: > > at:put: > > at:put: > > at:put: > > at:put: > > at:put: > > signal > > wait > > shallowCopy > > shallowCopy > > at:put: > > at:put: > > signal > > new: > > basicNew > > new: > > replaceFrom:to:with:startingAt: > > primitiveGarbageCollect > > **IncrementalGC** > > **FullGC** > > > (Segmentation fault) > > ./pharo: line 11: 5224 Abort trap: 6 > "$DIR"/"pharo-vm/Pharo.app/Contents/MacOS/Pharo" --headless "$@" > -- _,,,^..^,,,_ best, Eliot

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VM Maker: Cog-rmacnak.297.mcz
by commits＠source.squeak.org 23 Nov '15

23 Nov '15

Ryan Macnak uploaded a new version of Cog to project VM Maker: http://source.squeak.org/VMMaker/Cog-rmacnak.297.mcz ==================== Summary ==================== Name: Cog-rmacnak.297 Author: rmacnak Time: 22 November 2015, 9:21:00.153 pm UUID: fd1a2113-a596-439d-9a38-7bd38dfff46d Ancestors: Cog-rmacnak.296 MIPS simulation: Add multiply and divide instructions. Now the only missing instructions needed for the JIT should be those for floating pointing numbers. Fix register accessors of the processor alien api to answer the unsigned interpretation. Fix page protection to use the correct read/write limit (Bitmap>>size is in 32-bit words not bytes). Implement some register smashing routines. Cannot use a stronger ABI check (or really the check does not apply) because the thread of control never leaves the simulator via a return. =============== Diff against Cog-rmacnak.296 =============== Item was changed: SharedPool subclass: #MIPSConstants instanceVariableNames: '' + classVariableNames: 'A0 A1 A2 A3 ADDIU ADDU AND ANDI AT BEQ BGEZ BGTZ BLEZ BLTZ BNE BREAK DIV FP GP HintLoad HintStore J JAL JALR JR K0 K1 LB LBU LH LHU LUI LW MFHI MFLO MULT OR ORI OneInstruction PREF R0 R1 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R2 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29 R3 R30 R31 R4 R5 R6 R7 R8 R9 RA REGIMM S0 S1 S2 S3 S4 S5 S6 S7 SB SH SLL SLLV SLT SLTI SLTIU SLTU SP SPECIAL SRA SRAV SRL SRLV SUBU SW T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TwoInstructions V0 V1 XOR XORI ZR' - classVariableNames: 'A0 A1 A2 A3 ADDIU ADDU AND ANDI AT BEQ BGEZ BGTZ BLEZ BLTZ BNE BREAK FP GP HintLoad HintStore J JAL JALR JR K0 K1 LB LBU LH LHU LUI LW OR ORI OneInstruction PREF R0 R1 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R2 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29 R3 R30 R31 R4 R5 R6 R7 R8 R9 RA REGIMM S0 S1 S2 S3 S4 S5 S6 S7 SB SH SLL SLLV SLT SLTI SLTIU SLTU SP SPECIAL SRA SRAV SRL SRLV SUBU SW T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TwoInstructions V0 V1 XOR XORI ZR' poolDictionaries: '' category: 'Cog-Processors'! !MIPSConstants commentStamp: 'rmacnak 11/11/2015 20:29:59' prior: 0! MIPS opcodes and register names.! Item was changed: ----- Method: MIPSConstants class>>initializeSpecialFunctions (in category 'as yet unclassified') ----- initializeSpecialFunctions SLL := 0. SRL := 2. SRA := 3. SLLV := 4. SRLV := 6. SRAV := 7. JR := 8. JALR := 9. BREAK := 13. + MFHI := 16. + MFLO := 18. + MULT := 24. + DIV := 26. ADDU := 33. SUBU := 35. AND := 36. OR := 37. XOR := 38. SLT := 42. SLTU := 43.! Item was added: + ----- Method: MIPSDisassembler>>divideSigned: (in category 'instructions - arithmetic') ----- + divideSigned: instruction + self assert: instruction rd = 0. + self assert: instruction sa = 0. + ^'div ', + (MIPSConstants nameForRegister: instruction rs), ', ', + (MIPSConstants nameForRegister: instruction rt)! Item was added: + ----- Method: MIPSDisassembler>>moveFromHigh: (in category 'instructions - arithmetic') ----- + moveFromHigh: instruction + self assert: instruction rs = 0. + self assert: instruction rt = 0. + self assert: instruction sa = 0. + ^'mfhi ', (MIPSConstants nameForRegister: instruction rd)! Item was added: + ----- Method: MIPSDisassembler>>moveFromLow: (in category 'instructions - arithmetic') ----- + moveFromLow: instruction + self assert: instruction rs = 0. + self assert: instruction rt = 0. + self assert: instruction sa = 0. + ^'mflo ', (MIPSConstants nameForRegister: instruction rd)! Item was added: + ----- Method: MIPSDisassembler>>multiplySigned: (in category 'instructions - arithmetic') ----- + multiplySigned: instruction + self assert: instruction rd = 0. + self assert: instruction sa = 0. + ^'mult ', + (MIPSConstants nameForRegister: instruction rs), ', ', + (MIPSConstants nameForRegister: instruction rt)! Item was changed: ----- Method: MIPSELSimulator>>unsignedByte: (in category 'memory') ----- unsignedByte: address address < readableBase ifTrue: [self readFault: address]. address > readableLimit ifTrue: [self readFault: address]. + ^memory byteAt: address + 1! - ^memory at: address + 1! Item was changed: ----- Method: MIPSELSimulator>>unsignedByte:put: (in category 'memory') ----- unsignedByte: address put: value address < writableBase ifTrue: [self writeFault: address]. address > writableLimit ifTrue: [self writeFault: address]. + ^memory byteAt: address + 1 put: value! - ^memory at: address + 1 put: value! Item was changed: ----- Method: MIPSELSimulator>>unsignedHalfword: (in category 'memory') ----- unsignedHalfword: address address < readableBase ifTrue: [self readFault: address]. address > readableLimit ifTrue: [self readFault: address]. (address bitAnd: 1) = 0 ifFalse: [self error: 'Unaligned read']. + ^memory unsignedShortAt: address + 1! - ^memory unsignedShortAt: address + 1 bigEndian: false! Item was added: + ----- Method: MIPSELSimulatorTests>>testDiv (in category 'tests - arithmetic') ----- + testDiv + "Strangely, objdump is unable to disassemble this sequence." + | result | + self + testGenerateInto: + [:stream :compiler | + stream nextPut: (compiler divR: A0 R: A1). + stream nextPut: (compiler mfloR: V0). + stream nextPut: (compiler jR: RA). + stream nextPut: (compiler nop). "Delay slot"] + disassembly: + '00000000 0085001A div a0, a1 + 00000004 00001012 mflo v0 + 00000008 03E00008 jr ra + 0000000C 00000000 nop + ' run: + [:simulator | + result := simulator call: 0 with: 3 with: 7 with: 0 with: 0. + self assert: result equals: 0. + result := simulator call: 0 with: -3 with: 7 with: 0 with: 0. + self assert: result equals: 0. + result := simulator call: 0 with: 3 with: -7 with: 0 with: 0. + self assert: result equals: 0. + result := simulator call: 0 with: -3 with: -7 with: 0 with: 0. + self assert: result equals: 0. + result := simulator call: 0 with: 7 with: 3 with: 0 with: 0. + self assert: result equals: 2. + result := simulator call: 0 with: -7 with: 3 with: 0 with: 0. + self assert: result equals: -2. + result := simulator call: 0 with: 7 with: -3 with: 0 with: 0. + self assert: result equals: -2. + result := simulator call: 0 with: -7 with: -3 with: 0 with: 0. + self assert: result equals: 2]. + self + testGenerateInto: + [:stream :compiler | + stream nextPut: (compiler divR: A0 R: A1). + stream nextPut: (compiler mfhiR: V0). + stream nextPut: (compiler jR: RA). + stream nextPut: (compiler nop). "Delay slot"] + disassembly: + '00000000 0085001A div a0, a1 + 00000004 00001010 mfhi v0 + 00000008 03E00008 jr ra + 0000000C 00000000 nop + ' run: + [:simulator | + result := simulator call: 0 with: 3 with: 7 with: 0 with: 0. + self assert: result equals: 3. + result := simulator call: 0 with: -3 with: 7 with: 0 with: 0. + self assert: result equals: -3. + result := simulator call: 0 with: 3 with: -7 with: 0 with: 0. + self assert: result equals: 3. + result := simulator call: 0 with: -3 with: -7 with: 0 with: 0. + self assert: result equals: -3. + result := simulator call: 0 with: 7 with: 3 with: 0 with: 0. + self assert: result equals: 1. + result := simulator call: 0 with: -7 with: 3 with: 0 with: 0. + self assert: result equals: -1. + result := simulator call: 0 with: 7 with: -3 with: 0 with: 0. + self assert: result equals: 1. + result := simulator call: 0 with: -7 with: -3 with: 0 with: 0. + self assert: result equals: -1].! Item was added: + ----- Method: MIPSELSimulatorTests>>testMult (in category 'tests - arithmetic') ----- + testMult + "Strangely, objdump is unable to disassemble this sequence." + | result | + self + testGenerateInto: + [:stream :compiler | + stream nextPut: (compiler multR: A0 R: A1). + stream nextPut: (compiler mfloR: V0). + stream nextPut: (compiler jR: RA). + stream nextPut: (compiler nop). "Delay slot"] + disassembly: + '00000000 00850018 mult a0, a1 + 00000004 00001012 mflo v0 + 00000008 03E00008 jr ra + 0000000C 00000000 nop + ' run: + [:simulator | + result := simulator call: 0 with: 3 with: 5 with: 0 with: 0. + self assert: result equals: 15. + result := simulator call: 0 with: -3 with: 5 with: 0 with: 0. + self assert: result equals: -15. + result := simulator call: 0 with: 3 with: -5 with: 0 with: 0. + self assert: result equals: -15. + result := simulator call: 0 with: -3 with: -5 with: 0 with: 0. + self assert: result equals: 15. + result := simulator call: 0 with: 5 with: 3 with: 0 with: 0. + self assert: result equals: 15. + result := simulator call: 0 with: -5 with: 3 with: 0 with: 0. + self assert: result equals: -15. + result := simulator call: 0 with: 5 with: -3 with: 0 with: 0. + self assert: result equals: -15. + result := simulator call: 0 with: -5 with: -3 with: 0 with: 0. + self assert: result equals: 15. + result := simulator call: 0 with: 16r1000000 with: 16r4567 with: 0 with: 0. + self assert: result equals: 16r67000000. + result := simulator call: 0 with: 16r7FFFFFFF with: 16r7FFFFFFF with: 0 with: 0. + self assert: result equals: 1]. + self + testGenerateInto: + [:stream :compiler | + stream nextPut: (compiler multR: A0 R: A1). + stream nextPut: (compiler mfhiR: V0). + stream nextPut: (compiler jR: RA). + stream nextPut: (compiler nop). "Delay slot"] + disassembly: + '00000000 00850018 mult a0, a1 + 00000004 00001010 mfhi v0 + 00000008 03E00008 jr ra + 0000000C 00000000 nop + ' run: + [:simulator | + result := simulator call: 0 with: 3 with: 5 with: 0 with: 0. + self assert: result equals: 0. + result := simulator call: 0 with: -3 with: 5 with: 0 with: 0. + self assert: result equals: -1. + result := simulator call: 0 with: 3 with: -5 with: 0 with: 0. + self assert: result equals: -1. + result := simulator call: 0 with: -3 with: -5 with: 0 with: 0. + self assert: result equals: 0. + result := simulator call: 0 with: 5 with: 3 with: 0 with: 0. + self assert: result equals: 0. + result := simulator call: 0 with: -5 with: 3 with: 0 with: 0. + self assert: result equals: -1. + result := simulator call: 0 with: 5 with: -3 with: 0 with: 0. + self assert: result equals: -1. + result := simulator call: 0 with: -5 with: -3 with: 0 with: 0. + self assert: result equals: 0. + result := simulator call: 0 with: 16r1000000 with: 16r4567 with: 0 with: 0. + self assert: result equals: 16r45. + result := simulator call: 0 with: 16r7FFFFFFF with: 16r7FFFFFFF with: 0 with: 0. + self assert: result equals: 16r3FFFFFFF].! Item was changed: ----- Method: MIPSInstruction>>decodeSpecialFor: (in category 'as yet unclassified') ----- decodeSpecialFor: visitor | function | function := self function. function = SLL ifTrue: [^visitor shiftLeftLogical: self]. function = SRL ifTrue: [^visitor shiftRightLogical: self]. function = SRA ifTrue: [^visitor shiftRightArithmetic: self]. function = SLLV ifTrue: [^visitor shiftLeftLogicalVariable: self]. function = SRLV ifTrue: [^visitor shiftRightLogicalVariable: self]. function = SRAV ifTrue: [^visitor shiftRightArithmeticVariable: self]. function = JR ifTrue: [^visitor jumpRegister: self]. function = JALR ifTrue: [^visitor jumpAndLinkRegister: self]. function = BREAK ifTrue: [^visitor break: self]. + function = MFHI ifTrue: [^visitor moveFromHigh: self]. + function = MFLO ifTrue: [^visitor moveFromLow: self]. + function = MULT ifTrue: [^visitor multiplySigned: self]. + function = DIV ifTrue: [^visitor divideSigned: self]. function = ADDU ifTrue: [^visitor addUnsigned: self]. function = SUBU ifTrue: [^visitor subtractUnsigned: self]. function = AND ifTrue: [^visitor bitwiseAnd: self]. function = OR ifTrue: [^visitor bitwiseOr: self]. function = XOR ifTrue: [^visitor bitwiseXor: self]. function = SLT ifTrue: [^visitor setOnLessThan: self]. function = SLTU ifTrue: [^visitor setOnLessThanUnsigned: self]. self error: 'Unknown instruction'.! Item was changed: Object subclass: #MIPSSimulator + instanceVariableNames: 'memory registers pc instructionCount inDelaySlot readableBase writableBase exectuableBase readableLimit writableLimit exectuableLimit jumpingPC hi lo' - instanceVariableNames: 'memory registers pc instructionCount inDelaySlot readableBase writableBase exectuableBase readableLimit writableLimit exectuableLimit jumpingPC' classVariableNames: 'EndSimulationPC' poolDictionaries: 'MIPSConstants' category: 'Cog-Processors'! !MIPSSimulator commentStamp: 'rmacnak 11/11/2015 20:33:00' prior: 0! Simulator for 32-bit MIPS, without implementation of memory access.! Item was added: + ----- Method: MIPSSimulator class>>defaultIntegerBaseInDebugger (in category 'as yet unclassified') ----- + defaultIntegerBaseInDebugger + ^16! Item was changed: ----- Method: MIPSSimulator>>currentInstruction (in category 'as yet unclassified') ----- currentInstruction ^[(MIPSDisassembler new disassemble: memory from: pc to: pc + 4)] + ifError: ['Cannot disassemble', String cr].! - ifError: ['Cannot disassemble'].! Item was added: + ----- Method: MIPSSimulator>>divideSigned: (in category 'instructions - arithmetic') ----- + divideSigned: instruction + "Strangely, the MIPS reference manual does not indicate which division is used, but testing some hardware show it is truncated division (rather than floored division or Euclidean division)." + | rsValue rtValue | + rsValue := self signedRegister: instruction rs. + rtValue := self signedRegister: instruction rt. + lo := rsValue quo: rtValue. + hi := rsValue rem: rtValue. + ! Item was changed: ----- Method: MIPSSimulator>>execute (in category 'as yet unclassified') ----- execute | instruction | [pc ~= EndSimulationPC] whileTrue: + [Transcript print: instructionCount; nextPutAll: ' X '; nextPutAll: self currentInstruction; flush. - [Transcript nextPutAll: 'X '; nextPutAll: self currentInstruction; flush. 10 milliSeconds asDelay wait. instruction := MIPSInstruction new value: (self fetchInstruction: pc). instruction decodeFor: self. + pc := pc + OneInstruction. + instructionCount := instructionCount + 1].! - pc := pc + OneInstruction].! Item was changed: ----- Method: MIPSSimulator>>executeDelaySlot (in category 'as yet unclassified') ----- executeDelaySlot | instruction | self assert: inDelaySlot not. inDelaySlot := true. + instructionCount := instructionCount + 1. + Transcript print: instructionCount; nextPutAll: ' D '; nextPutAll: self currentInstruction; flush. - Transcript nextPutAll: 'D '; nextPutAll: self currentInstruction; flush. instruction := MIPSInstruction new value: (self fetchInstruction: pc). instruction decodeFor: self. inDelaySlot := false.! Item was changed: ----- Method: MIPSSimulator>>fp (in category 'registers') ----- fp + ^self unsignedRegister: FP! - ^self signedRegister: FP! Item was changed: ----- Method: MIPSSimulator>>fp: (in category 'registers') ----- fp: anInteger + ^self unsignedRegister: FP put: anInteger! - ^self signedRegister: FP put: anInteger! Item was changed: ----- Method: MIPSSimulator>>initialize (in category 'as yet unclassified') ----- initialize registers := Array new: 32 withAll: 16rABABAB. pc := 0. + hi := 0. + lo := 0. inDelaySlot := false. instructionCount := 0.! Item was added: + ----- Method: MIPSSimulator>>moveFromHigh: (in category 'instructions - arithmetic') ----- + moveFromHigh: instruction + self signedRegister: instruction rd put: hi.! Item was added: + ----- Method: MIPSSimulator>>moveFromLow: (in category 'instructions - arithmetic') ----- + moveFromLow: instruction + self signedRegister: instruction rd put: lo.! Item was added: + ----- Method: MIPSSimulator>>multiplySigned: (in category 'instructions - arithmetic') ----- + multiplySigned: instruction + | rsValue rtValue result | + rsValue := self signedRegister: instruction rs. + rtValue := self signedRegister: instruction rt. + result := rsValue * rtValue. + result := self signed64ToUnsigned64: result. + hi := self unsigned32ToSigned32: result >> 32. + lo := self unsigned32ToSigned32: (result bitAnd: 16rFFFFFFFF).! Item was added: + ----- Method: MIPSSimulator>>pc (in category 'processor api') ----- + pc + ^pc! Item was added: + ----- Method: MIPSSimulator>>popWordIn: (in category 'processor api') ----- + popWordIn: aMemory + | sp word | + word := aMemory unsignedLongAt: (sp := self sp) + 1 bigEndian: false. + self sp: sp + 4. + ^word! Item was changed: ----- Method: MIPSSimulator>>printOn: (in category 'as yet unclassified') ----- printOn: stream stream nextPutAll: self class name; nextPut: $:; cr. 0 to: 31 do: + [:reg | - [:reg | | hex | stream space. stream nextPutAll: (MIPSConstants nameForRegister: reg). stream space. + (self unsignedRegister: reg) printOn: stream base: 16 nDigits: 8. - hex := (self unsignedRegister: reg) printStringBase: 16. - 8 - hex size timesRepeat: [stream nextPut: $0]. - stream nextPutAll: hex. stream space. (self signedRegister: reg) printOn: stream. stream cr]. + + stream nextPutAll: ' pc '. + pc printOn: stream base: 16 nDigits: 8. + stream space. + pc printOn: stream. + stream cr. stream nextPutAll: self currentInstruction.! Item was changed: ----- Method: MIPSSimulator>>ra (in category 'registers') ----- ra + ^self unsignedRegister: RA! - ^self signedRegister: RA! Item was added: + ----- Method: MIPSSimulator>>ra: (in category 'registers') ----- + ra: anInteger + ^self unsignedRegister: RA put: anInteger! Item was added: + ----- Method: MIPSSimulator>>retpcIn: (in category 'processor api') ----- + retpcIn: aMemory + "The return address is on the stack, having been pushed by either + simulateCallOf:nextpc:memory: or simulateJumpCallOf:memory:" + ^aMemory unsignedLongAt: self fp + 5 bigEndian: false! Item was changed: ----- Method: MIPSSimulator>>runInMemory:minimumAddress:readOnlyBelow: (in category 'processor api') ----- runInMemory: aMemory minimumAddress: minimumAddress readOnlyBelow: minimumWritableAddress "Note that minimumWritableAddress is both the minimum writeable address AND the maximum executable address" memory := aMemory. readableBase := minimumAddress. writableBase := minimumWritableAddress. exectuableBase := minimumAddress. + readableLimit := aMemory byteSize. + writableLimit := aMemory byteSize. - readableLimit := aMemory size. - writableLimit := aMemory size. exectuableLimit := minimumWritableAddress. self execute.! Item was added: + ----- Method: MIPSSimulator>>s3 (in category 'registers') ----- + s3 + ^self unsignedRegister: S3! Item was added: + ----- Method: MIPSSimulator>>s4: (in category 'registers') ----- + s4: anInteger + ^self unsignedRegister: S4 put: anInteger! Item was added: + ----- Method: MIPSSimulator>>s5 (in category 'registers') ----- + s5 + ^self unsignedRegister: S5! Item was added: + ----- Method: MIPSSimulator>>s5: (in category 'registers') ----- + s5: anInteger + ^self unsignedRegister: S5 put: anInteger! Item was added: + ----- Method: MIPSSimulator>>signed64ToUnsigned64: (in category 'converting') ----- + signed64ToUnsigned64: signedValue + self assert: (signedValue between: -16r8000000000000000 and: 16r7FFFFFFFFFFFFFFF). + signedValue < 0 ifTrue: [^signedValue + 16r10000000000000000]. + ^signedValue! Item was changed: ----- Method: MIPSSimulator>>signedRegister:put: (in category 'registers') ----- signedRegister: registerNumber put: signedValue self assert: (signedValue between: -16r80000000 and: 16r7FFFFFFF). registerNumber == ZR ifFalse: [^registers at: registerNumber + 1 put: signedValue].! Item was added: + ----- Method: MIPSSimulator>>simulateReturnIn: (in category 'processor api') ----- + simulateReturnIn: aMemory + "PostBuildStackDelta ~= 0 ifTrue: + [self sp: self sp + PostBuildStackDelta]." + self fp: (self popWordIn: aMemory). + "According to tpr, most C compilers implement return by simply + popping into the pc, rather than popping through the link register." + self pc: (self popWordIn: aMemory)! Item was added: + ----- Method: MIPSSimulator>>smashCallerSavedRegistersWithValuesFrom:by: (in category 'processor api') ----- + smashCallerSavedRegistersWithValuesFrom: base by: step + "i.e., smashVolatileRegisters" + self flag: #OABI. + self unsignedRegister: AT put: 0 * step + base. + self unsignedRegister: V0 put: 0 * step + base. + self unsignedRegister: V1 put: 0 * step + base. + self unsignedRegister: A0 put: 0 * step + base. + self unsignedRegister: A1 put: 0 * step + base. + self unsignedRegister: A2 put: 0 * step + base. + self unsignedRegister: A3 put: 0 * step + base. + self unsignedRegister: T0 put: 0 * step + base. + self unsignedRegister: T1 put: 0 * step + base. + self unsignedRegister: T2 put: 0 * step + base. + self unsignedRegister: T3 put: 0 * step + base. + self unsignedRegister: T4 put: 0 * step + base. + self unsignedRegister: T5 put: 0 * step + base. + self unsignedRegister: T6 put: 0 * step + base. + self unsignedRegister: T7 put: 0 * step + base. + self unsignedRegister: T8 put: 0 * step + base. + self unsignedRegister: T9 put: 0 * step + base. + self unsignedRegister: GP put: 0 * step + base. + self unsignedRegister: RA put: 0 * step + base.! Item was changed: ----- Method: MIPSSimulator>>smashRegistersWithValuesFrom:by: (in category 'processor api') ----- smashRegistersWithValuesFrom: base by: step + 2 to: 31 do: [:index | self unsignedRegister: index put: index - 1 * step + base]. + ! - "Ignore this - we do a stronger check later."! Item was changed: ----- Method: MIPSSimulator>>sp (in category 'registers') ----- sp + ^self unsignedRegister: SP! - ^self signedRegister: SP! Item was changed: ----- Method: MIPSSimulator>>sp: (in category 'registers') ----- sp: anInteger + ^self unsignedRegister: SP put: anInteger! - ^self signedRegister: SP put: anInteger!

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Re: [Vm-dev] VM Maker: VMMaker.oscog-eem.1528.mcz
by Eliot Miranda 22 Nov '15

22 Nov '15

Hi Ryan, Tim, in finishing the CPIC change use the following scripts to create a closed PIC for each platform. StackToRegisterMappingCogit genAndDisPICoptions: #(ISA IA32 CogCompilerClass CogIA32Compiler ObjectMemory NewCoObjectMemory). StackToRegisterMappingCogit genAndDisPICoptions: #(ISA IA32 CogCompilerClass CogIA32Compiler ObjectMemory Spur32BitCoMemoryManager). StackToRegisterMappingCogit genAndDisPICoptions: #(ISA ARMv5 CogCompilerClass CogOutOfLineLiteralsARMCompiler ObjectMemory Spur32BitCoMemoryManager). StackToRegisterMappingCogit genAndDisPICoptions: #(ISA ARMv5 CogCompilerClass CogInLineLiteralsARMCompiler ObjectMemory Spur32BitCoMemoryManager). StackToRegisterMappingCogit genAndDisPICoptions: #(ISA MIPSEL CogCompilerClass CogMIPSELCompiler ObjectMemory Spur32BitCoMemoryManager). StackToRegisterMappingCogit genAndDisPICoptions: #(ISA X64 CogCompilerClass CogInLineLiteralsX64Compiler ObjectMemory Spur64BitCoMemoryManager). StackToRegisterMappingCogit genAndDisPICoptions: #(ISA X64 CogCompilerClass CogOutOfLineLiteralsX64Compiler ObjectMemory Spur64BitCoMemoryManager). Only the first four (both x86 and both ARMv5) work. Don't worry about x64; I'm fixing that. I hope to fix expectedClosedPICPrototype to include asserts to test rewriteCPIC:caseJumpTo: et al, but have dad duties so may not get to this until Monday/Tuesday. On Sun, Nov 22, 2015 at 9:33 AM, <commits(a)source.squeak.org> wrote: > > Eliot Miranda uploaded a new version of VMMaker to project VM Maker: > http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1528.mcz > > ==================== Summary ==================== > > Name: VMMaker.oscog-eem.1528 > Author: eem > Time: 22 November 2015, 9:33:01.294 am > UUID: 3ed0e2f1-7f11-4ab0-be68-96373bf4612f > Ancestors: VMMaker.oscog-eem.1527 > > Reorder CPIC instructions to suit MIPSEL, i.e. put the load before the > compare and jump. Simplify and eliminate duplication, especially in thge > literals managers, nuking almost all of their PIC support code. It isn't > needed since the code ends up being the same in each manager. > > There is still work to do: > - the rewriteCPICFoo methods should all be implemented in Cogit and should > use the same accessors as expectedClosedPICPrototype demonstrates. > - those methods should be tested via extra asserts in > expectedClosedPICPrototype > > Extend MIPS' noteFollowingConditionalBranch: to include long conditional > jumps. > > =============== Diff against VMMaker.oscog-eem.1527 =============== > > Item was added: > + ----- Method: CogARMCompiler>>instructionIsCMP: (in category 'testing') > ----- > + instructionIsCMP: instr > + "is this an CMP instruction?" > + ^(instr >> 21 bitAnd: 16r7F) = CmpOpcode! > > Item was added: > + ----- Method: CogARMCompiler>>instructionIsLDR: (in category 'testing') > ----- > + instructionIsLDR: instr > + "is this any kind of LDR instruction? c.f. > memMxr:reg:base:u:b:l:imm:" > + ^instr >> 28 ~= 16rF "the NEVER condition is used to encode > non-load instructions" > + and: [(instr >> 20 bitAnd: 16rC5) = 16r41] "ldr r1, [r2, > #+/-imm] or ldr r1, [r2, r3]"! > > Item was changed: > ----- Method: CogARMCompiler>>instructionIsOR: (in category 'testing') > ----- > instructionIsOR: instr > "is this an ORR instruction?" > + ^(instr >> 21 bitAnd: 16r7F) = (16r10 bitOr: OrOpcode)! > - ^(instr >> 21 bitAnd: 16rF) = 16rC! > > Item was removed: > - ----- Method: CogARMCompiler>>literalBeforeFollowingAddress: (in > category 'inline cacheing') ----- > - literalBeforeFollowingAddress: followingAddress > - "Answer the constant loaded by the instruction sequence just > before this address:" > - ^self subclassResponsibility! > > Item was added: > + ----- Method: CogAbstractInstruction>>cmpC32RTempByteSize (in category > 'accessing') ----- > + cmpC32RTempByteSize > + self subclassResponsibility! > > Item was added: > + ----- Method: CogAbstractInstruction>>literal32BeforeFollowingAddress: > (in category 'inline cacheing') ----- > + literal32BeforeFollowingAddress: followingAddress > + "Answer the constant loaded by the instruction sequence just > before this address:" > + <inline: true> > + ^objectMemory wordSize = 8 > + ifTrue: [self subclassResponsibility] > + ifFalse: [self literalBeforeFollowingAddress: > followingAddress]! > > Item was added: > + ----- Method: CogAbstractInstruction>>literalBeforeFollowingAddress: (in > category 'inline cacheing') ----- > + literalBeforeFollowingAddress: followingAddress > + "Answer the constant loaded by the instruction sequence just > before this address:" > + ^self subclassResponsibility! > > Item was changed: > ----- Method: > CogAbstractInstruction>>rewriteCPICCaseAt:tag:objRef:target: (in category > 'inline cacheing') ----- > rewriteCPICCaseAt: followingAddress tag: newTag objRef: newObjRef > target: newTarget > + "Rewrite the three values involved in a CPIC case. Used by the > initialize & extend CPICs." > - "rewrite the three values involved in a CPIC case. Used by the > create & extend cpcic methods" > self subclassResponsibility > ! > > Item was added: > + ----- Method: CogIA32Compiler>>cmpC32RTempByteSize (in category > 'accessing') ----- > + cmpC32RTempByteSize > + ^5! > > Item was changed: > ----- Method: CogIA32Compiler>>rewriteCPICCaseAt:tag:objRef:target: (in > category 'inline cacheing') ----- > rewriteCPICCaseAt: followingAddress tag: newTag objRef: newObjRef > target: newTarget > + "Rewrite the three values involved in a CPIC case. Used by the > initialize & extend CPICs." > - "rewrite the three values involved in a CPIC case. Used by the > create & extend cpcic methods" > > "IA32 CPIC cases are > + cmpl $0x newTag, %eax > + movl $0x newObjRef, %ebx > + jz .+0x newTarget (0x00010924)" > + > - cmpl $0x newTag, %eax > - movl $0x newObjRef, %ebx > - jz .+0x newTarget (0x00010924) > - " > "rewite the tag via the first ldr" > self storeLiteral: newTag beforeFollowingAddress: > (followingAddress -11). > > "write the obj ref/operand via the second ldr" > self storeLiteral: newObjRef beforeFollowingAddress: > (followingAddress - 6). > > "write the jump address for the new target address" > self rewriteJumpLongAt: followingAddress target: newTarget! > > Item was added: > + ----- Method: CogInLineLiteralsARMCompiler>>cmpC32RTempByteSize (in > category 'accessing') ----- > + cmpC32RTempByteSize > + ^20! > > Item was added: > + ----- Method: > CogInLineLiteralsARMCompiler>>literal32BeforeFollowingAddress: (in category > 'inline cacheing') ----- > + literal32BeforeFollowingAddress: followingAddress > + "Answer the 32-bit constant loaded by a MOV/ORR/ORR/ORR > + or MOV/ORR/ORR/ORR/PUSH, or MOV/ORR/ORR/ORR/CMP sequence, just > before this address:" > + ^(self instructionIsOR: (self instructionBeforeAddress: > followingAddress)) > + ifTrue: [self > extract32BitOperandFrom4InstructionsPreceding: followingAddress] > + ifFalse: [self > extract32BitOperandFrom4InstructionsPreceding: followingAddress - 4]! > > Item was added: > + ----- Method: > CogInLineLiteralsX64Compiler>>literal32BeforeFollowingAddress: (in category > 'inline cacheing') ----- > + literal32BeforeFollowingAddress: followingAddress > + "Answer the 32-bit literal embedded in the instruction immediately > preceding followingAddress." > + ^ ((objectMemory byteAt: followingAddress - 1) << 24) > + + ((objectMemory byteAt: followingAddress - 2) << 16) > + + ((objectMemory byteAt: followingAddress - 3) << 8) > + + (objectMemory byteAt: followingAddress - 4)! > > Item was added: > + ----- Method: CogMIPSELCompiler>>cmpC32RTempByteSize (in category > 'accessing') ----- > + cmpC32RTempByteSize > + self flag: #todo. "value - reg or reg - value?" > + self flag: #inefficient. "Cog RTL assumes we can do any kind of > conditional branch after a Cmp." > + ^28! > > Item was changed: > ----- Method: CogMIPSELCompiler>>noteFollowingConditionalBranch: (in > category 'abstract instructions') ----- > noteFollowingConditionalBranch: branch > "Support for processors without condition codes, such as the MIPS. > Answer the branch opcode. Modify the receiver and the branch to > implement a suitable conditional branch that doesn't depend on > condition codes being set by the receiver." > <var: #branch type: #'AbstractInstruction *'> > branch opcode caseOf: { > [JumpOverflow] -> [opcode := opcode caseOf: { > > [AddCqR] -> [AddCheckOverflowCqR]. > > [AddRR] -> [AddCheckOverflowRR]. > > [MulRR] -> [MulCheckOverflowRR]. > > [SubCqR] -> [SubCheckOverflowCqR]. > > [SubRR] -> [SubCheckOverflowRR]. > > }]. > [JumpNoOverflow] -> [opcode := opcode caseOf: { > > [AddCqR] -> [AddCheckOverflowCqR]. > > [AddRR] -> [AddCheckOverflowRR]. > > [MulRR] -> [MulCheckOverflowRR]. > > [SubCqR] -> [SubCheckOverflowCqR]. > > [SubRR] -> [SubCheckOverflowRR]. > > }]. > "Ryan, I'm imagining that all the other cases go in here, > such as collapsing CmpRR; JumpZero to Label; BrEqRR. > This is obviously not nearly complete." > [JumpZero] -> [opcode caseOf: { > > [CmpRR] -> [branch setOpcode: BrEqRR andOperandsFrom: self. > + > branch operands at: 3 put: (operands at: 1). > > opcode := Label]. > }]. > [JumpNonZero] -> [opcode caseOf: { > > [CmpRR] -> [branch setOpcode: BrNeRR andOperandsFrom: self. > + > branch operands at: 3 put: (operands at: 1). > > opcode := Label]. > }]. > + [JumpLongZero] -> [opcode caseOf: { > + > [CmpRR] -> [branch setOpcode: BrNeRR andOperandsFrom: self. > + > "skip the following long branch" > + > branch operands at: 3 put: self > jumpLongByteSize. > + > opcode := JumpLong]. > + }]. > + [JumpLongNonZero] -> [opcode caseOf: { > + > [CmpRR] -> [branch setOpcode: BrEqRR andOperandsFrom: self. > + > "skip the following long branch" > + > branch operands at: 3 put: self > jumpLongByteSize. > + > opcode := JumpLong]. > + }]. > } > "No otherwise for now to catch all cases" > "otherwise: []". > ^branch! > > Item was added: > + ----- Method: > CogObjectRepresentationFor32BitSpur>>markAndTraceCacheTagLiteral:in:atpc: > (in category 'garbage collection') ----- > + markAndTraceCacheTagLiteral: literal in: cogMethodOrNil atpc: address > + "Mark and trace a literal in an inline cache preceding address in > cogMethodOrNil. > + Answer if code was modified." > + <var: #cogMethodOrNil type: #'CogMethod *'> > + <var: #address type: #usqInt> > + | objOop | > + (self couldBeObject: literal) ifFalse: > + [^false]. > + self assert: (objectMemory addressCouldBeObj: literal). > + (objectMemory isForwarded: literal) ifFalse: > + [objectMemory markAndTrace: literal. > + ^false]. > + objOop := objectMemory followForwarded: literal. > + cogit backEnd rewriteInlineCacheTag: objOop at: address. > + self markAndTraceUpdatedLiteral: objOop in: cogMethodOrNil. > + ^true! > > Item was added: > + ----- Method: > CogObjectRepresentationFor64BitSpur>>markAndTraceCacheTagLiteral:in:atpc: > (in category 'garbage collection') ----- > + markAndTraceCacheTagLiteral: literal in: cogMethodOrNil atpc: address > + "Mark and trace a literal in an inline cache preceding address in > cogMethodOrNil. > + Answer if code was modified. In 64-bit Spur, cache tags are > either selector > + indices or class indices and so this is a noop." > + <var: #cogMethodOrNil type: #'CogMethod *'> > + <var: #address type: #usqInt> > + <inline: true> > + ^false! > > Item was removed: > - ----- Method: > CogObjectRepresentationForSpur>>markAndTraceCacheTagLiteral:in:atpc: (in > category 'garbage collection') ----- > - markAndTraceCacheTagLiteral: literal in: cogMethodOrNil atpc: address > - "Mark and trace a literal in an inline cache preceding address in > cogMethodOrNil. > - Answer if code was modified." > - <var: #cogMethodOrNil type: #'CogMethod *'> > - <var: #address type: #usqInt> > - | objOop | > - (self couldBeObject: literal) ifFalse: > - [^false]. > - self assert: (objectMemory addressCouldBeObj: literal). > - (objectMemory isForwarded: literal) ifFalse: > - [objectMemory markAndTrace: literal. > - ^false]. > - objOop := objectMemory followForwarded: literal. > - cogit backEnd rewriteInlineCacheTag: objOop at: address. > - self markAndTraceUpdatedLiteral: objOop in: cogMethodOrNil. > - ^true! > > Item was removed: > - ----- Method: CogObjectRepresentationForSqueakV3>>remapCacheTag: (in > category 'garbage collection') ----- > - remapCacheTag: cacheTag > - ^(self couldBeObject: cacheTag) > - ifTrue: [objectMemory remap: cacheTag] > - ifFalse: [cacheTag]! > > Item was added: > + ----- Method: CogOutOfLineLiteralsARMCompiler>>cmpC32RTempByteSize (in > category 'accessing') ----- > + cmpC32RTempByteSize > + ^8! > > Item was changed: > ----- Method: > CogOutOfLineLiteralsARMCompiler>>literalBeforeFollowingAddress: (in > category 'inline cacheing') ----- > literalBeforeFollowingAddress: followingAddress > "Return the literal referenced by the instruction immediately > preceding followingAddress." > + ^objectMemory longAt: (self pcRelativeAddressAt: > + ((self instructionIsLDR: (self instructionBeforeAddress: > followingAddress)) > + ifTrue: [self instructionAddressBefore: > followingAddress] > + ifFalse: [self instructionAddressBefore: > followingAddress - 4]))! > - ^objectMemory longAt: (self pcRelativeAddressAt: (self > instructionAddressBefore: followingAddress))! > > Item was changed: > ----- Method: > CogOutOfLineLiteralsARMCompiler>>storeLiteral:beforeFollowingAddress: (in > category 'inline cacheing') ----- > storeLiteral: literal beforeFollowingAddress: followingAddress > "Rewrite the literal in the instruction immediately preceding > followingAddress." > + objectMemory > + longAt: (self pcRelativeAddressAt: > + ((self instructionIsLDR: (self > instructionBeforeAddress: followingAddress)) > + ifTrue: [self > instructionAddressBefore: followingAddress] > + ifFalse: [self > instructionAddressBefore: followingAddress - 4])) > + put: literal! > - objectMemory longAt: (self pcRelativeAddressAt: (self > instructionAddressBefore: followingAddress )) put: literal! > > Item was added: > + ----- Method: CogX64Compiler>>cmpC32RTempByteSize (in category > 'accessing') ----- > + cmpC32RTempByteSize > + ^6! > > Item was changed: > ----- Method: Cogit>>cPICHasForwardedClass: (in category 'in-line > cacheing') ----- > cPICHasForwardedClass: cPIC > "The first case in a CPIC doesn't have a class reference so we > need only step over actually usd subsequent cases." > | pc | > <var: #cPIC type: #'CogMethod *'> > "start by finding the address of the topmost case, the > cPICNumCases'th one" > pc := (self addressOfEndOfCase: cPIC cPICNumCases inCPIC: cPIC) > - backEnd jumpLongConditionalByteSize. > 2 to: cPIC cPICNumCases do: > [:i | | classIndex | > + classIndex := literalsManager backEnd > literal32BeforeFollowingAddress: pc. > - classIndex := literalsManager > classRefInClosedPICAt: pc. > (objectMemory isForwardedClassIndex: classIndex) > ifTrue: [^ true]. > "since we started at the top, we can just add the > case size each time to move on to the next case" > pc := pc + cPICCaseSize]. > ^ false! > > Item was changed: > ----- Method: Cogit>>checkValidObjectReferencesInClosedPIC: (in category > 'garbage collection') ----- > checkValidObjectReferencesInClosedPIC: cPIC > <var: #cPIC type: #'CogMethod *'> > | ok pc | > ok := true. > pc := cPIC asInteger + firstCPICCaseOffset. > > "first we check the obj ref at the beginning of the CPIC" > + (self checkMaybeObjRefInClosedPIC: (backEnd > literalBeforeFollowingAddress: pc - backEnd jumpLongByteSize)) ifFalse: > - (self checkMaybeObjRefInClosedPIC: (literalsManager > objRefInClosedPICAt: pc - backEnd jumpLongByteSize)) ifFalse: > [self print: 'object leak in CPIC '; printHex: cPIC > asInteger; > print: ' @ '; printHex: pc - backEnd > jumpLongByteSize; cr. > ok := false]. > > "Next we step over each case that is in use. We find the end > address of the cPICNumCases'th case and can then just step forward by the > case size thereafter" > pc := self addressOfEndOfCase: cPIC cPICNumCases inCPIC: cPIC. > > "For each case we check any object reference at the end address - > sizeof(conditional instruction) and then increment the end address by case > size" > 2 to: cPIC cPICNumCases do: > [:i| > objectRepresentation inlineCacheTagsMayBeObjects ifTrue: > + [(self checkMaybeObjRefInClosedPIC: > (literalsManager backEnd literal32BeforeFollowingAddress: pc - backEnd > jumpLongConditionalByteSize)) ifFalse: > - [(self checkMaybeObjRefInClosedPIC: > (literalsManager classRefInClosedPICAt: pc - backEnd > jumpLongConditionalByteSize)) ifFalse: > [self print: 'object leak in CPIC '; > printHex: cPIC asInteger; > print: ' @ '; printHex: pc - > backEnd jumpLongConditionalByteSize - backEnd loadLiteralByteSize; cr. > ok := false]]. > + (self checkMaybeObjRefInClosedPIC: (backEnd > literalBeforeFollowingAddress: pc - backEnd jumpLongConditionalByteSize - > backEnd cmpC32RTempByteSize)) ifFalse: > - (self checkMaybeObjRefInClosedPIC: (literalsManager > objRefInClosedPICAt: pc - backEnd jumpLongConditionalByteSize)) ifFalse: > [self print: 'object leak in CPIC '; printHex: > cPIC asInteger; > print: ' @ '; printHex: pc - backEnd > jumpLongConditionalByteSize; cr. > ok := false]. > pc := pc + cPICCaseSize]. > ^ok! > > Item was changed: > ----- Method: Cogit>>closedPICRefersToUnmarkedObject: (in category > 'garbage collection') ----- > closedPICRefersToUnmarkedObject: cPIC > "Answer if the ClosedPIC refers to any unmarked objects or > freed/freeable target methods, > applying markAndTraceOrFreeCogMethod:firstVisit: to those targets > to determine if freed/freeable." > <var: #cPIC type: #'CogMethod *'> > + | pc object | > + ((objectMemory isImmediate: cPIC selector) > + or: [objectMemory isMarked: cPIC selector]) ifFalse: > + [^true]. > + > - | pc offsetToLiteral object entryPoint targetMethod | > - <var: #targetMethod type: #'CogMethod *'> > - (objectMemory isImmediate: cPIC selector) ifFalse: > - [(objectMemory isMarked: cPIC selector) ifFalse: > - [^true]]. > "First jump is unconditional; subsequent ones are conditional." > + "Check the potential method oop for the first case only. > + Inline cache tags for the 1st case are at the send site." > + pc := self addressOfEndOfCase: 1 inCPIC: cPIC. > + (objectRepresentation couldBeObject: (object := backEnd > literalBeforeFollowingAddress: pc - backEnd jumpLongByteSize)) ifTrue: > + [(objectMemory isMarked: object) ifFalse: > + [^true]]. > + > + "Check the first target" > + (self markAndTraceOrFreePICTarget: (backEnd > jumpLongTargetBeforeFollowingAddress: pc) in: cPIC) ifTrue: > + [^true]. > + > + 2 to: cPIC cPICNumCases do: > - offsetToLiteral := backEnd jumpLongByteSize. > - 1 to: cPIC cPICNumCases do: > [:i| > pc := self addressOfEndOfCase: i inCPIC: cPIC. > + (objectRepresentation inlineCacheTagsMayBeObjects > + and: [objectRepresentation couldBeObject: (object := > literalsManager backEnd literal32BeforeFollowingAddress: pc - backEnd > jumpLongConditionalByteSize)]) ifTrue: > + [(objectMemory isMarked: object) ifFalse: > - (objectRepresentation inlineCacheTagsMayBeObjects and: > [i>1] ) "inline cache tags for the 0th case are at the send site" ifTrue: > - [object := literalsManager classRefInClosedPICAt: > pc - offsetToLiteral. > - ((objectRepresentation couldBeObject: object) > - and: [(objectMemory isMarked: object) not]) > ifTrue: > [^true]]. > + "Check the potential method oop for subsequent cases." > + (objectRepresentation couldBeObject: (object := backEnd > literalBeforeFollowingAddress: pc - backEnd jumpLongConditionalByteSize - > backEnd cmpC32RTempByteSize)) ifTrue: > + [(objectMemory isMarked: object) ifFalse: > + [^true]]. > + "Check subsequent targets" > + (self markAndTraceOrFreePICTarget: (backEnd > jumpLongConditionalTargetBeforeFollowingAddress: pc) in: cPIC) ifTrue: > + [^true]]. > + > - object := literalsManager objRefInClosedPICAt: pc - > offsetToLiteral. > - ((objectRepresentation couldBeObject: object) > - and: [(objectMemory isMarked: object) not]) ifTrue: > - [^true]. > - offsetToLiteral := backEnd jumpLongConditionalByteSize. > - entryPoint := i = 1 > - ifTrue: [backEnd > jumpLongTargetBeforeFollowingAddress: pc] > - ifFalse: [backEnd > jumpLongConditionalTargetBeforeFollowingAddress: pc]. > - "Find target from jump. Ignore jumps to the interpret and > MNU calls within this PIC" > - self assert: (entryPoint > methodZoneBase and: [entryPoint > < methodZone freeStart]). > - (cPIC containsAddress: entryPoint) ifFalse: > - [targetMethod := self cCoerceSimple: entryPoint - > cmNoCheckEntryOffset to: #'CogMethod *'. > - self assert: (targetMethod cmType = CMMethod > - or: [targetMethod cmType = > CMFree]). > - (self markAndTraceOrFreeCogMethod: targetMethod > - firstVisit: targetMethod > asUnsignedInteger > pc asUnsignedInteger) ifTrue: > - [^true]]]. > ^false! > > Item was changed: > ----- Method: Cogit>>compileClosedPICPrototype (in category 'in-line > cacheing') ----- > compileClosedPICPrototype > "Compile the abstract instructions for a full closed PIC, used to > generate the chunk of code > which is copied to form each closed PIC. A Closed Polymorphic > Inline Cache is a small jump > table used to optimize sends with a limited degree of > polymorphism (currently up to 6 cases). > We call it closed because it deals only with a finite number of > cases, as opposed to an Open PIC. > When a monomorphic linked send (a send with a single case, > linking direct to the checked entry > point of a CogMethod) fails a class check, the Cogit attempts to > create a two-entry PIC that will > handle jumping to the original target for the original class and > the relevant target for the new > class. This jump table will be extended on subsequent failures > up to a limit (6). > > We avoid extending CPICs to Open PICs by linking the send site to > an Open PIC if one already > exists with the send's selector, a good policy since measurements > show that sends of mega- > morphic selectors usually become megamorphic at all send sites. > Hence the Open PIC list. > > A CPIC also optimizes MNUs and interpret-only methods. Each case > can load SendNumArgs with > the oop of a method, or will load SendNumArgs with 0 if not. > MNUs are optimized by jumping to > the mnuAbort in the CPIC, which calls code that creates the > Message, thereby avoiding looking up > the original message which will not be found, and either looks up > doesNotUnderstand: or directly > activates the method loaded into SendNumArgs, hence avoiding > looking up doesNotUnderstand:. > Interpret-only methods are handled by jumping to the > picInterpretAbort, which enters the > interpreter activating the method loaded in SendNumArgs. > > CPICs look like the following, where rClass is set at the > original send site for the 1st case, and #Foo > is some constant, either an oop, a class tag or an instruction > address. > > rTemp := (rRecever bitAnd: TagMask) = 0 ifTrue: [rReceiver > class] ifFalse: [rRecever bitAnd: TagMask]. > rTemp = rClass ifFalse: > [self goto: #Label]. > rSendNumArgs := #MethodForCase1Or0. > self goto: #TargetForCase1. > #Label > rTemp = #ClassTagForCase6 ifTrue: > [rSendNumArgs := #MethodForCase6Or0. > self goto: #TargetForCase6]. > ...cases 5, 4 & 3 > rTemp = #ClassTagForCase2 ifTrue: > [rSendNumArgs := #MethodForCase2Or0. > self goto: #TargetForCase2]. > self goto: #CPICMissTrampoline > literals (if out-of-line literals) > > where we short-cut as many cases as needed by making the self > goto: #Label skip as many cases > as needed." > <inline: true> > | numArgs jumpNext | > <var: #jumpNext type: #'AbstractInstruction *'> > self compilePICAbort: (numArgs := 0). "Will get rewritten to > appropriate arity when configuring." > jumpNext := self compileCPICEntry. > "At the end of the entry code we need to jump to the first case > code, which is actually the last chunk. > On each entension we must update this jump to move back one case." > "16r5EAF00D is the method oop, or 0, for the 1st case." > self MoveUniqueCw: 16r5EAF00D R: SendNumArgsReg. > self JumpLong: self cPICPrototypeCaseOffset + 16rCA5E10. > endCPICCase0 := self Label. > 1 to: maxCPICCases - 1 do: > [:h| > h = (maxCPICCases - 1) ifTrue: > [jumpNext jmpTarget: self Label]. "this is where > we jump to for the first case" > - "16rBABE1F15+h is the class tag for the Nth case" > - self CmpC32: 16rBABE1F15+h R: TempReg. > "16rBADA550+h is the method oop, or 0, for the Nth case." > self MoveUniqueCw: 16rBADA550 + h R: SendNumArgsReg. > + "16rBABE1F15+h is the class tag for the Nth case" > + self CmpC32: 16rBABE1F15+h R: TempReg. > self JumpLongZero: self cPICPrototypeCaseOffset + > 16rCA5E10 + (h * 16). > h = 1 ifTrue: > [endCPICCase1 := self Label]]. > self MoveCw: methodLabel address R: ClassReg. > self JumpLong: (self cPICMissTrampolineFor: numArgs). "Will get > rewritten to appropriate arity when configuring." > cPICEndOfCodeLabel := self Label. > literalsManager dumpLiterals: false. > ^0! > > Item was changed: > ----- Method: Cogit>>expectedClosedPICPrototype: (in category 'in-line > cacheing') ----- > expectedClosedPICPrototype: cPIC > "Answer 0 if the ClosedPIC is as expected from > compileClosedPICPrototype, > otherwise answer an error code identifying the first discrepancy > found." > "self disassembleFrom: methodZoneBase + (self sizeof: CogMethod) > to: methodZoneBase + closedPICSize" > <var: #cPIC type: #'CogMethod *'> > + | pc object entryPoint | > + pc := cPIC asUnsignedInteger + firstCPICCaseOffset. > - | pc offsetToLiteral object entryPoint | > - pc := cPIC asInteger + firstCPICCaseOffset. > "First jump is unconditional; subsequent ones are conditional" > + object := backEnd literalBeforeFollowingAddress: pc - backEnd > jumpLongByteSize. > + self assert: object = 16r5EAF00D. > - offsetToLiteral := backEnd jumpLongByteSize. > - > - object := literalsManager objRefInClosedPICAt: pc - > offsetToLiteral. > - self assert: (object = 16r5EAF00D). > > entryPoint := backEnd jumpLongTargetBeforeFollowingAddress: pc. > + self assert: entryPoint = (self cPICPrototypeCaseOffset + > 16rCA5E10). > - self assert: (entryPoint = (self cPICPrototypeCaseOffset + > 16rCA5E10)). > > 1 to: maxCPICCases - 1 do: > + [:i | | methodObjPC classTagPC | > - [:i | > pc := pc + cPICCaseSize. > - offsetToLiteral := backEnd jumpLongConditionalByteSize. > > + methodObjPC := pc - backEnd jumpLongConditionalByteSize - > backEnd cmpC32RTempByteSize. > + object := backEnd literalBeforeFollowingAddress: > methodObjPC. > - object := literalsManager classRefInClosedPICAt: pc - > offsetToLiteral. > - self assert: object = (16rBABE1F15 + i). > - literalsManager storeClassRef: (object bitXor: > 16r5A5A5A5A) inClosedPICAt: pc - offsetToLiteral. > - object := literalsManager classRefInClosedPICAt: pc - > offsetToLiteral. > - self assert: object = ((16rBABE1F15 + i bitXor: > 16r5A5A5A5A)). > - literalsManager storeClassRef: (object bitXor: > 16r5A5A5A5A) inClosedPICAt: pc - offsetToLiteral. > - > - object := literalsManager objRefInClosedPICAt: pc - > offsetToLiteral. > self assert: object = (16rBADA550 + i). > + backEnd storeLiteral: (object bitXor: 16rA5A5A5A5) > beforeFollowingAddress: methodObjPC. > + object := backEnd literalBeforeFollowingAddress: > methodObjPC. > + self assert: object = (16rBADA550 + i bitXor: 16rA5A5A5A5). > + backEnd storeLiteral: (object bitXor: 16rA5A5A5A5) > beforeFollowingAddress: methodObjPC. > - literalsManager storeObjRef: (object bitXor: 16rA5A5A5A5) > inClosedPICAt: pc - offsetToLiteral. > - object := literalsManager objRefInClosedPICAt: pc - > offsetToLiteral. > - self assert: object = ((16rBADA550 + i) bitXor: > 16rA5A5A5A5). > - literalsManager storeObjRef: (object bitXor: 16rA5A5A5A5) > inClosedPICAt: pc - offsetToLiteral. > > + classTagPC := pc - backEnd jumpLongConditionalByteSize. > + object := backEnd literal32BeforeFollowingAddress: > classTagPC. > + self assert: object = (16rBABE1F15 + i). > + backEnd storeLiteral: (object bitXor: 16r5A5A5A5A) > beforeFollowingAddress: classTagPC. > + object := backEnd literal32BeforeFollowingAddress: > classTagPC. > + self assert: object = (16rBABE1F15 + i bitXor: > 16r5A5A5A5A). > + backEnd storeLiteral: (object bitXor: 16r5A5A5A5A) > beforeFollowingAddress: classTagPC. > + > entryPoint := backEnd > jumpLongConditionalTargetBeforeFollowingAddress: pc. > self assert: entryPoint = (self cPICPrototypeCaseOffset + > 16rCA5E10 + (i * 16))]. > > entryPoint := backEnd jumpLongTargetBeforeFollowingAddress: pc + > cPICEndSize - literalsManager endSizeOffset. > + self assert: entryPoint = (self cPICMissTrampolineFor: 0). > - self assert: (entryPoint = (self cPICMissTrampolineFor: 0)). > > ^0! > > Item was changed: > ----- Method: Cogit>>followMaybeObjRefInClosedPICAt: (in category > 'garbage collection') ----- > followMaybeObjRefInClosedPICAt: mcpc > "Follow a potential object reference from a closed PIC. > This may be a method reference or null. > Answer if the followed literal is young. > 'mcpc' refers to the jump/branch instruction at the end of > each cpic case" > | object subject | > + object := backEnd literalBeforeFollowingAddress: mcpc. > - object := literalsManager objRefInClosedPICAt: mcpc. > (objectRepresentation couldBeObject: object) ifFalse: > [^false]. > (objectMemory isForwarded: object) ifFalse: > [^objectMemory isYoungObject: object]. > subject := objectMemory followForwarded: object. > + backEnd storeLiteral: subject beforeFollowingAddress: mcpc. > - literalsManager storeObjRef: subject inClosedPICAt: mcpc. > codeModified := true. > ^objectMemory isYoungObject: subject! > > Item was changed: > ----- Method: Cogit>>followMethodReferencesInClosedPIC: (in category > 'garbage collection') ----- > followMethodReferencesInClosedPIC: cPIC > "Remap all object references in the closed PIC. Answer if any > references are young. > Set codeModified if any modifications are made." > <var: #cPIC type: #'CogMethod *'> > | pc refersToYoung | > pc := self addressOfEndOfCase: 1 inCPIC: cPIC. > > + "first we check the potential method oop load at the beginning of > the CPIC" > - "first we check the method obj ref at the beginning of the CPIC" > refersToYoung := self followMaybeObjRefInClosedPICAt: pc - backEnd > jumpLongByteSize. > > "We find the end address of the cPICNumCases'th case and can then > just step forward by the case size thereafter" > pc := self addressOfEndOfCase: cPIC cPICNumCases inCPIC: cPIC. > > + "Next we check the potential potential method oop load for each > case." > - "For each case we check any object reference at the end address - > sizeof(conditional instruction) and then increment the end address by case > size" > 2 to: cPIC cPICNumCases do: > [:i| > + (self followMaybeObjRefInClosedPICAt: pc - backEnd > jumpLongConditionalByteSize - backEnd cmpC32RTempByteSize) ifTrue: > - (self followMaybeObjRefInClosedPICAt: pc - backEnd > jumpLongConditionalByteSize) ifTrue: > [refersToYoung := true]. > pc := pc + cPICCaseSize]. > ^refersToYoung! > > Item was changed: > ----- Method: Cogit>>mapObjectReferencesInClosedPIC: (in category > 'garbage collection') ----- > mapObjectReferencesInClosedPIC: cPIC > "Remap all object references in the closed PIC. Answer if any > references are young. > Set codeModified if any modifications are made." > <var: #cPIC type: #'CogMethod *'> > | pc refersToYoung | > pc := self addressOfEndOfCase:1 inCPIC:cPIC. > > + "first we check the potential method oop load at the beginning of > the CPIC" > + refersToYoung := self remapMaybeObjRefInClosedPICAt: pc - backEnd > jumpLongByteSize. > - "first we check the obj ref at the beginning of the CPIC" > - refersToYoung := self updateMaybeObjRefInClosedPICAt: pc - backEnd > jumpLongByteSize. > > "We find the end address of the cPICNumCases'th case and can then > just step forward by the case size thereafter" > pc := self addressOfEndOfCase: cPIC cPICNumCases inCPIC: cPIC. > > + "Next we check the potential class ref in the compare instruction, > and the potential method oop load for each case." > - "For each case we check any object reference at the end address - > sizeof(conditional instruction) and then increment the end address by case > size" > 2 to: cPIC cPICNumCases do: > [:i| > objectRepresentation inlineCacheTagsMayBeObjects ifTrue: > + [(self remapMaybeObjRefInClosedPICAt: pc - backEnd > jumpLongConditionalByteSize) ifTrue: > - [(self updateMaybeClassRefInClosedPICAt: pc - > backEnd jumpLongConditionalByteSize) ifTrue: > [refersToYoung := true]]. > + (self remapMaybeObjRefInClosedPICAt: pc - backEnd > jumpLongConditionalByteSize - backEnd cmpC32RTempByteSize) ifTrue: > - (self updateMaybeObjRefInClosedPICAt: pc - backEnd > jumpLongConditionalByteSize) ifTrue: > [refersToYoung := true]. > pc := pc + cPICCaseSize]. > ^refersToYoung! > > Item was added: > + ----- Method: Cogit>>markAndTraceOrFreePICTarget:in: (in category > 'garbage collection') ----- > + markAndTraceOrFreePICTarget: entryPoint in: cPIC > + "If entryPoint is that of some method, then mark and trace objects > in it and free if it is appropriate. > + Answer if the method has been freed." > + <var: #cPIC type: #'CogMethod *'> > + | targetMethod | > + <var: #targetMethod type: #'CogMethod *'> > + self assert: (entryPoint > methodZoneBase and: [entryPoint < > methodZone freeStart]). > + (cPIC containsAddress: entryPoint) ifTrue: > + [^false]. > + targetMethod := self cCoerceSimple: entryPoint - > cmNoCheckEntryOffset to: #'CogMethod *'. > + self assert: (targetMethod cmType = CMMethod or: [targetMethod > cmType = CMFree]). > + ^self markAndTraceOrFreeCogMethod: targetMethod > + firstVisit: targetMethod asUnsignedInteger > cPIC > asUnsignedInteger! > > Item was added: > + ----- Method: Cogit>>remapMaybeObjRefInClosedPICAt: (in category > 'garbage collection') ----- > + remapMaybeObjRefInClosedPICAt: mcpc > + "Remap a potential object reference from a closed PIC. > + This may be an object reference, an inline cache tag or null. > + Answer if the updated literal is young. > + mcpc is the address of the next instruction following either > + the load of the method literal or the compare of the class tag." > + | object subject | > + object := backEnd literalBeforeFollowingAddress: mcpc. > + (objectRepresentation couldBeObject: object) ifFalse: > + [^false]. > + subject := objectRepresentation remapOop: object. > + object ~= subject ifTrue: > + [backEnd storeLiteral: subject beforeFollowingAddress: > mcpc. > + codeModified := true]. > + ^objectMemory isYoungObject: subject! > > Item was added: > + ----- Method: Cogit>>storeClassRef:inClosedPICAt: (in category 'in-line > cacheing') ----- > + storeClassRef: classObj inClosedPICAt: address > + <var: #address type: #usqInt> > + <inline: true> > + "If inline cache tags are not objects they will be 32-bit values." > + objectRepresentation inlineCacheTagsMayBeObjects > + ifTrue: [backEnd storeLiteral: classObj > beforeFollowingAddress: address] > + ifFalse: [backEnd storeLiteral32: classObj > beforeFollowingAddress: address]! > > Item was removed: > - ----- Method: Cogit>>updateMaybeClassRefInClosedPICAt: (in category > 'garbage collection') ----- > - updateMaybeClassRefInClosedPICAt: mcpc > - "Update a potential object reference from a closed PIC. > - This may be an object reference, an inline cache tag or null. > - Answer if the updated literal is young." > - | object subject | > - object := literalsManager classRefInClosedPICAt: mcpc. > - (objectRepresentation couldBeObject: object) ifFalse: > - [^false]. > - subject := objectRepresentation remapOop: object. > - object ~= subject ifTrue: > - [literalsManager storeClassRef: subject inClosedPICAt: > mcpc. > - codeModified := true]. > - ^objectMemory isYoungObject: subject! > > Item was removed: > - ----- Method: Cogit>>updateMaybeObjRefInClosedPICAt: (in category > 'garbage collection') ----- > - updateMaybeObjRefInClosedPICAt: mcpc > - "Update a potential object reference from a closed PIC. > - This may be an object reference, an inline cache tag or null. > - Answer if the updated literal is young. > - 'mcpc' refers to the jump/branch instruction at the end of > - each cpic case" > - | object subject | > - object := literalsManager objRefInClosedPICAt: mcpc. > - (objectRepresentation couldBeObject: object) ifFalse: > - [^false]. > - subject := objectRepresentation remapOop: object. > - object ~= subject ifTrue: > - [literalsManager storeObjRef: subject inClosedPICAt: mcpc. > - codeModified := true]. > - ^objectMemory isYoungObject: subject! > > Item was changed: > VMClass subclass: #InLineLiteralsManager > + instanceVariableNames: 'cogit objectMemory objectRepresentation' > - instanceVariableNames: 'cogit' > classVariableNames: '' > poolDictionaries: '' > category: 'VMMaker-JIT'! > > !InLineLiteralsManager commentStamp: 'eem 6/7/2015 12:07' prior: 0! > An InLineLiteralsManager is a dummy class that understands the > OutOfLineLiteralsManager API but does nothing. It is used to allow the > Cogits to work with back-ends that generate either in-line or out-of-line > literals.! > > Item was removed: > - ----- Method: InLineLiteralsManager>>cPICCase:relocateJumpLongBefore:by: > (in category 'closed PIC parsing') ----- > - cPICCase: caseIndex relocateJumpLongBefore: pc by: delta > - <inline: true> > - cogit backEnd > - relocateJumpLongBeforeFollowingAddress: pc > - by: delta! > > Item was removed: > - ----- Method: InLineLiteralsManager>>classRefInClosedPICAt: (in category > 'garbage collection') ----- > - classRefInClosedPICAt: mcpc > - <inline: true> > - ^cogit backEnd literalBeforeFollowingAddress: mcpc - cogit backEnd > loadLiteralByteSize! > > Item was changed: > ----- Method: InLineLiteralsManager>>cogit: (in category > 'initialization') ----- > cogit: aCogit > <doNotGenerate> > + cogit := aCogit. > + objectMemory := aCogit objectMemory. > + objectRepresentation := aCogit objectRepresentation.! > - cogit := aCogit! > > Item was removed: > - ----- Method: InLineLiteralsManager>>objRefInClosedPICAt: (in category > 'garbage collection') ----- > - objRefInClosedPICAt: mcpc > - "'mcpc' refers to the jump/branch instruction at the end of > - each cpic case. The method objRef is the method object referenced > by the > - movI $0x0bada553, %ebx > - or > - ldr r6, [pc, #64] ; 0x000017d4 16rBADA553 > - type instruction preceeding this" > - <inline: true> > - ^cogit backEnd literalBeforeFollowingAddress: mcpc! > > Item was removed: > - ----- Method: InLineLiteralsManager>>storeClassRef:inClosedPICAt: (in > category 'garbage collection') ----- > - storeClassRef: classObj inClosedPICAt: address > - <var: #address type: #usqInt> > - <inline: true> > - cogit backEnd storeLiteral: classObj beforeFollowingAddress: > address - cogit backEnd loadLiteralByteSize! > > Item was removed: > - ----- Method: InLineLiteralsManager>>storeObjRef:inClosedPICAt: (in > category 'garbage collection') ----- > - storeObjRef: literal inClosedPICAt: address > - "'mcpc' refers to the jump/branch instruction at the end of > - each cpic case. The objRef is the literal referenced by the > - movI $0x0bada553, %ebx or > - ldr r6, [pc, #64] ; 0x000017d4 16rBADA553 > - type instruction preceeding this" > - <var: #address type: #usqInt> > - <inline: true> > - cogit backEnd storeLiteral: literal beforeFollowingAddress: > address! > > Item was removed: > - ----- Method: > OutOfLineLiteralsManager>>cPICCase:relocateJumpLongBefore:by: (in category > 'closed PIC parsing') ----- > - cPICCase: caseIndex relocateJumpLongBefore: pc by: delta > - <inline: true> > - cogit backEnd relocateJumpLongBeforeFollowingAddress: pc by: delta! > > Item was removed: > - ----- Method: OutOfLineLiteralsManager>>classRefInClosedPICAt: (in > category 'garbage collection') ----- > - classRefInClosedPICAt: address > - <inline: true> > - "If inline cache tags are not objects they will be 32-bit values." > - "Current ARM out-of-line literal CPICs use > - ldr ip, [pc relative address1] > - cmp r0, ip > - ldr r6, [pc relative address2 > - beq code > - hence the large backwards stepping here - address is pointing at > the beq" > - ^objectRepresentation inlineCacheTagsMayBeObjects > - ifFalse: [cogit backEnd literalBeforeFollowingAddress: > address - 8 "better to use 2 * instructionSize if we could, step back to > the cmp so the literal is found properly" ] > - ifTrue: [self break. "not sure about this ? "objectMemory > longAt: address - objectMemory bytesPerOop]! > > Item was removed: > - ----- Method: OutOfLineLiteralsManager>>objRefInClosedPICAt: (in > category 'garbage collection') ----- > - objRefInClosedPICAt: address > - "'mcpc' refers to the jump/branch instruction at the end of > - each cpic case. The objRef is the literal referenced by the > - ldr r6, [pc, #88] ; 16r5EAF00D type instruction preceeding > this" > - <inline: true> > - ^cogit backEnd literalBeforeFollowingAddress: address ! > > Item was removed: > - ----- Method: OutOfLineLiteralsManager>>storeClassRef:inClosedPICAt: (in > category 'garbage collection') ----- > - storeClassRef: classObj inClosedPICAt: address > - <var: #address type: #usqInt> > - <inline: true> > - "If inline cache tags are not objects they will be 32-bit values." > - "Current ARM out-of-line literal CPICs use > - ldr ip, [pc relative address1] > - cmp r0, ip > - ldr r6, [pc relative address2 > - beq code > - hence the large backwards stepping here" > - objectRepresentation inlineCacheTagsMayBeObjects > - ifTrue: [self break. objectMemory long32At: address - 4 > put: classObj] > - ifFalse: [cogit backEnd storeLiteral: classObj > beforeFollowingAddress: address - 8 "better to use 2 * instructionSize if > we could, step back to the cmp so the literal is found properly"]! > > Item was removed: > - ----- Method: OutOfLineLiteralsManager>>storeObjRef:inClosedPICAt: (in > category 'garbage collection') ----- > - storeObjRef: literal inClosedPICAt: address > - "'mcpc' refers to the jump/branch instruction at the end of > - each cpic case. The objRef is the literal referenced by the > - ldr r6, [pc, #88] ; 16r5EAF00D type instruction preceeding > this" > - <var: #address type: #usqInt> > - <inline: true> > - cogit backEnd storeLiteral: literal beforeFollowingAddress: > address! > > -- _,,,^..^,,,_ best, Eliot

2 1

VM Maker: VMMaker.oscog-tpr.1530.mcz
by commits＠source.squeak.org 22 Nov '15

22 Nov '15

tim Rowledge uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-tpr.1530.mcz ==================== Summary ==================== Name: VMMaker.oscog-tpr.1530 Author: tpr Time: 22 November 2015, 11:18:39.8 am UUID: 0f807d01-9fc9-4fd6-8c9d-8763700efed1 Ancestors: VMMaker.oscog-eem.1529 Split out testing of ARM instrucction condition codes and make sure it is checked for CMP/ORR - just in case. =============== Diff against VMMaker.oscog-eem.1529 =============== Item was added: + ----- Method: CogARMCompiler>>conditionIsNotNever: (in category 'testing') ----- + conditionIsNotNever: instr + "test for the NV condition code; this isn't allowed as an actual condition and is used to encdoe many of the newer instructions" + ^instr >> 28 < 16rF ! Item was changed: ----- Method: CogARMCompiler>>instructionIsB: (in category 'testing') ----- instructionIsB: instr "is this a B <offset> instruction?" + ^(self conditionIsNotNever: instr) and: [(instr bitAnd: (16rF<<24)) = (16rA<<24)]! - ^instr >> 28 < 16rF "test for allowed condcode - 0xF is extension" and: [(instr bitAnd: (16rF<<24)) = (16rA<<24)]! Item was changed: ----- Method: CogARMCompiler>>instructionIsBL: (in category 'testing') ----- instructionIsBL: instr "is this a BL <offset> instruction?" + ^(self conditionIsNotNever: instr) and: [(instr bitAnd: (16rF<<24)) = (16rB<<24)]! - ^instr >> 28 < 16rF "test for allowed condcode - 0xF is extension" and: [(instr bitAnd: (16rF<<24)) = (16rB<<24)]! Item was changed: ----- Method: CogARMCompiler>>instructionIsBLX: (in category 'testing') ----- instructionIsBLX: instr "is this a BLX <targetReg> instruction?" + ^(self conditionIsNotNever: instr) and: [(instr bitAnd: 16r0FFFFFF0) = 16r12FFF30]! - ^instr >> 28 < 16rF "test for allowed condcode - 0xF is extension" and: [(instr bitAnd: 16r0FFFFFF0) = 16r12FFF30]! Item was changed: ----- Method: CogARMCompiler>>instructionIsBX: (in category 'testing') ----- instructionIsBX: instr "is this a BX <targetReg> instruction?" + ^(self conditionIsNotNever: instr) and: [(instr bitAnd: 16r0FFFFFF0) = 16r12FFF10]! - ^instr >> 28 < 16rF "test for allowed condcode - 0xF is extension" and: [(instr bitAnd: 16r0FFFFFF0) = 16r12FFF10]! Item was changed: ----- Method: CogARMCompiler>>instructionIsCMP: (in category 'testing') ----- instructionIsCMP: instr + "is this a CMP instruction?" + ^(self conditionIsNotNever: instr) and: [(instr >> 21 bitAnd: 16r7F) = CmpOpcode]! - "is this an CMP instruction?" - ^(instr >> 21 bitAnd: 16r7F) = CmpOpcode! Item was changed: ----- Method: CogARMCompiler>>instructionIsLDR: (in category 'testing') ----- instructionIsLDR: instr "is this any kind of LDR instruction? c.f. memMxr:reg:base:u:b:l:imm:" + ^(self conditionIsNotNever: instr) and: [(instr >> 20 bitAnd: 16rC5) = 16r41] "ldr r1, [r2, #+/-imm] or ldr r1, [r2, r3]"! - ^instr >> 28 ~= 16rF "the NEVER condition is used to encode non-load instructions" - and: [(instr >> 20 bitAnd: 16rC5) = 16r41] "ldr r1, [r2, #+/-imm] or ldr r1, [r2, r3]"! Item was changed: ----- Method: CogARMCompiler>>instructionIsOR: (in category 'testing') ----- instructionIsOR: instr "is this an ORR instruction?" + ^(self conditionIsNotNever: instr) and:[(instr >> 21 bitAnd: 16r7F) = (16r10 bitOr: OrOpcode)]! - ^(instr >> 21 bitAnd: 16r7F) = (16r10 bitOr: OrOpcode)! Item was changed: ----- Method: CogARMCompiler>>instructionIsPush: (in category 'testing') ----- instructionIsPush: instr "is this a push -str r??, [sp, #-4] - instruction?" + ^(self conditionIsNotNever: instr) and: [(instr bitAnd: 16rFFF0FFF) = 16r52D0004]! - ^instr >> 28 < 16rF "test for allowed condcode - 0xF is extension" - and: [(instr bitAnd: 16rFFF0FFF) = 16r52D0004]!

1 0

VM Maker: VMMaker.oscog-eem.1529.mcz
by commits＠source.squeak.org 22 Nov '15

22 Nov '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1529.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1529 Author: eem Time: 22 November 2015, 10:29:01.889 am UUID: 6b91882c-e59c-4c22-8d16-77d16299d2d4 Ancestors: VMMaker.oscog-eem.1528 Fix generation of the CPIC prototype for inline literals x64. Add some more opcodes to handle compare/branch collapse for CmpCqR on MIPSEL. =============== Diff against VMMaker.oscog-eem.1528 =============== Item was added: + ----- Method: CogAbstractInstruction>>storeLiteral32:beforeFollowingAddress: (in category 'inline cacheing') ----- + storeLiteral32: literal32 beforeFollowingAddress: followingAddress + "Answer the constant loaded by the instruction sequence just before this address:" + <inline: true> + ^objectMemory wordSize = 8 + ifTrue: [self subclassResponsibility] + ifFalse: [self storeLiteral: literal32 beforeFollowingAddress: followingAddress]! Item was removed: - ----- Method: CogInLineLiteralsX64Compiler>>abstractRegisterForConcreteRegister: (in category 'private') ----- - abstractRegisterForConcreteRegister: reg - (self concreteRegister: TempReg) = reg ifTrue: [^TempReg]. - (self concreteRegister: ReceiverResultReg) = reg ifTrue: [^ReceiverResultReg]. - (self concreteRegister: ClassReg) = reg ifTrue: [^ClassReg]. - (self concreteRegister: SendNumArgsReg) = reg ifTrue: [^SendNumArgsReg]. - (self concreteRegister: Arg0Reg) = reg ifTrue: [^Arg0Reg]. - (self concreteRegister: Arg1Reg) = reg ifTrue: [^Arg1Reg]. - (self concreteRegister: FPReg) = reg ifTrue: [^FPReg]. - (self concreteRegister: SPReg) = reg ifTrue: [^SPReg]. - (self concreteRegister: RISCTempReg) = reg ifTrue: [^RISCTempReg]. - (self concreteRegister: VarBaseReg) = reg ifTrue: [^VarBaseReg]. - (self concreteRegister: Scratch0Reg) = reg ifTrue: [^Scratch0Reg]. - (self concreteRegister: Scratch1Reg) = reg ifTrue: [^Scratch1Reg]. - (self concreteRegister: Scratch2Reg) = reg ifTrue: [^Scratch2Reg]. - (self concreteRegister: Scratch3Reg) = reg ifTrue: [^Scratch3Reg]. - (self concreteRegister: Scratch4Reg) = reg ifTrue: [^Scratch4Reg]. - (self concreteRegister: Scratch5Reg) = reg ifTrue: [^Scratch5Reg]. - self error: 'could not find abstract register'. - ^0 - - "({ TempReg. ReceiverResultReg. ClassReg. SendNumArgsReg. Arg0Reg. Arg1Reg. - FPReg. SPReg. - RISCTempReg. VarBaseReg. - Scratch0Reg. Scratch1Reg. Scratch2Reg. Scratch3Reg. Scratch4Reg. Scratch5Reg. } collect: [:i| self basicNew concreteRegister: i]) sort" - - "While the below works fine in Smalltalk it of course doesn't work in C ;)" - - "^reg caseOf: { - [self concreteRegister: TempReg] -> [TempReg]. - [self concreteRegister: ReceiverResultReg] -> [ReceiverResultReg]. - [self concreteRegister: ClassReg] -> [ClassReg]. - [self concreteRegister: SendNumArgsReg] -> [SendNumArgsReg]. - [self concreteRegister: Arg0Reg] -> [Arg0Reg]. - [self concreteRegister: Arg1Reg] -> [Arg1Reg]. - [self concreteRegister: FPReg] -> [FPReg]. - [self concreteRegister: SPReg] -> [SPReg] }"! Item was changed: CogAbstractInstruction subclass: #CogMIPSELCompiler instanceVariableNames: '' + classVariableNames: 'AddCheckOverflowCqR AddCheckOverflowRR BrEqCqR BrEqRR BrGtzRR BrLezRR BrNeCqR BrNeRR Cmp CmpSGT CmpSLT CmpUGT CmpULT ConcreteVarBaseReg MulCheckOverflowRR MulRR Overflow OverflowTemp1 OverflowTemp2 SubCheckOverflowCqR SubCheckOverflowRR TargetReg' - classVariableNames: 'AddCheckOverflowCqR AddCheckOverflowRR BrEqRR BrGtzRR BrLezRR BrNeRR Cmp CmpSGT CmpSLT CmpUGT CmpULT ConcreteVarBaseReg MulCheckOverflowRR MulRR Overflow OverflowTemp1 OverflowTemp2 SubCheckOverflowCqR SubCheckOverflowRR TargetReg' poolDictionaries: 'MIPSConstants' category: 'VMMaker-JIT'! Item was changed: ----- Method: CogMIPSELCompiler class>>initialize (in category 'class initialization') ----- initialize "CogMIPSELCompiler initialize" super initialize. ConcreteVarBaseReg := S6. "Simulating a condition register." Cmp := T0. CmpSLT := T1. CmpSGT := T2. CmpULT := T3. CmpUGT := T4. Overflow := T0. OverflowTemp1 := T1. OverflowTemp2 := T2. "OABI position independent code expects T9 to have its entry point on entry?" self flag: #OABI. TargetReg := T9. "Specific instructions" self initializeSpecificOpcodes: #(MulRR AddCheckOverflowCqR AddCheckOverflowRR MulCheckOverflowRR SubCheckOverflowCqR SubCheckOverflowRR "Ryan, here are proposed opcodes for conditional branches." + BrEqRR BrNeRR BrLezRR BrGtzRR BrEqCqR BrNeCqR) + in: thisContext method! - BrEqRR BrNeRR BrLezRR BrGtzRR) - in: thisContext method - - ! Item was changed: ----- Method: CogMIPSELCompiler>>noteFollowingConditionalBranch: (in category 'abstract instructions') ----- noteFollowingConditionalBranch: branch "Support for processors without condition codes, such as the MIPS. Answer the branch opcode. Modify the receiver and the branch to implement a suitable conditional branch that doesn't depend on condition codes being set by the receiver." <var: #branch type: #'AbstractInstruction *'> branch opcode caseOf: { [JumpOverflow] -> [opcode := opcode caseOf: { [AddCqR] -> [AddCheckOverflowCqR]. [AddRR] -> [AddCheckOverflowRR]. [MulRR] -> [MulCheckOverflowRR]. [SubCqR] -> [SubCheckOverflowCqR]. [SubRR] -> [SubCheckOverflowRR]. }]. [JumpNoOverflow] -> [opcode := opcode caseOf: { [AddCqR] -> [AddCheckOverflowCqR]. [AddRR] -> [AddCheckOverflowRR]. [MulRR] -> [MulCheckOverflowRR]. [SubCqR] -> [SubCheckOverflowCqR]. [SubRR] -> [SubCheckOverflowRR]. }]. "Ryan, I'm imagining that all the other cases go in here, such as collapsing CmpRR; JumpZero to Label; BrEqRR. This is obviously not nearly complete." [JumpZero] -> [opcode caseOf: { [CmpRR] -> [branch setOpcode: BrEqRR andOperandsFrom: self. + branch operands at: 2 put: (operands at: 1). - branch operands at: 3 put: (operands at: 1). opcode := Label]. }]. [JumpNonZero] -> [opcode caseOf: { [CmpRR] -> [branch setOpcode: BrNeRR andOperandsFrom: self. + branch operands at: 2 put: (operands at: 1). - branch operands at: 3 put: (operands at: 1). opcode := Label]. + [CmpCqR] -> [branch setOpcode: BrNeCqR andOperandsFrom: self. + branch operands at: 2 put: (operands at: 1). + opcode := Label]. }]. [JumpLongZero] -> [opcode caseOf: { [CmpRR] -> [branch setOpcode: BrNeRR andOperandsFrom: self. "skip the following long branch" + branch operands at: 2 put: self jumpLongByteSize. - branch operands at: 3 put: self jumpLongByteSize. opcode := JumpLong]. + [CmpCqR] -> [branch setOpcode: BrNeCqR andOperandsFrom: self. + "skip the following long branch" + branch operands at: 2 put: self jumpLongByteSize. + opcode := JumpLong]. }]. [JumpLongNonZero] -> [opcode caseOf: { [CmpRR] -> [branch setOpcode: BrEqRR andOperandsFrom: self. "skip the following long branch" + branch operands at: 2 put: self jumpLongByteSize. - branch operands at: 3 put: self jumpLongByteSize. opcode := JumpLong]. }]. } "No otherwise for now to catch all cases" "otherwise: []". ^branch! Item was changed: ----- Method: CogMIPSELCompiler>>setOpcode:andOperandsFrom: (in category 'accessing') ----- setOpcode: anOpcode andOperandsFrom: cmpInstruction <var: #cmpInstruction type: #'AbstractInstruction *'> <inline: true> opcode := anOpcode. operands + at: 0 put: (cmpInstruction operands at: 0); + at: 1 put: (cmpInstruction operands at: 1)! - at: 0 put: (cmpInstruction opcodes at: 0); - at: 1 put: (cmpInstruction opcodes at: 1)! Item was added: + ----- Method: CogX64Compiler>>abstractRegisterForConcreteRegister: (in category 'private') ----- + abstractRegisterForConcreteRegister: reg + (self concreteRegister: TempReg) = reg ifTrue: [^TempReg]. + (self concreteRegister: ReceiverResultReg) = reg ifTrue: [^ReceiverResultReg]. + (self concreteRegister: ClassReg) = reg ifTrue: [^ClassReg]. + (self concreteRegister: SendNumArgsReg) = reg ifTrue: [^SendNumArgsReg]. + (self concreteRegister: Arg0Reg) = reg ifTrue: [^Arg0Reg]. + (self concreteRegister: Arg1Reg) = reg ifTrue: [^Arg1Reg]. + (self concreteRegister: FPReg) = reg ifTrue: [^FPReg]. + (self concreteRegister: SPReg) = reg ifTrue: [^SPReg]. + (self concreteRegister: RISCTempReg) = reg ifTrue: [^RISCTempReg]. + (self concreteRegister: VarBaseReg) = reg ifTrue: [^VarBaseReg]. + (self concreteRegister: Scratch0Reg) = reg ifTrue: [^Scratch0Reg]. + (self concreteRegister: Scratch1Reg) = reg ifTrue: [^Scratch1Reg]. + (self concreteRegister: Scratch2Reg) = reg ifTrue: [^Scratch2Reg]. + (self concreteRegister: Scratch3Reg) = reg ifTrue: [^Scratch3Reg]. + (self concreteRegister: Scratch4Reg) = reg ifTrue: [^Scratch4Reg]. + (self concreteRegister: Scratch5Reg) = reg ifTrue: [^Scratch5Reg]. + self error: 'could not find abstract register'. + ^0 + + "({ TempReg. ReceiverResultReg. ClassReg. SendNumArgsReg. Arg0Reg. Arg1Reg. + FPReg. SPReg. + RISCTempReg. VarBaseReg. + Scratch0Reg. Scratch1Reg. Scratch2Reg. Scratch3Reg. Scratch4Reg. Scratch5Reg. } collect: [:i| self basicNew concreteRegister: i]) sort" + + "While the below works fine in Smalltalk it of course doesn't work in C ;)" + + "^reg caseOf: { + [self concreteRegister: TempReg] -> [TempReg]. + [self concreteRegister: ReceiverResultReg] -> [ReceiverResultReg]. + [self concreteRegister: ClassReg] -> [ClassReg]. + [self concreteRegister: SendNumArgsReg] -> [SendNumArgsReg]. + [self concreteRegister: Arg0Reg] -> [Arg0Reg]. + [self concreteRegister: Arg1Reg] -> [Arg1Reg]. + [self concreteRegister: FPReg] -> [FPReg]. + [self concreteRegister: SPReg] -> [SPReg] }"! Item was changed: ----- Method: CogX64Compiler>>computeMaximumSize (in category 'generate machine code') ----- (excessive size, no diff calculated) Item was added: + ----- Method: CogX64Compiler>>storeLiteral32:beforeFollowingAddress: (in category 'inline cacheing') ----- + storeLiteral32: literal beforeFollowingAddress: followingAddress + "Rewrite the 32-bit literal in the instruction immediately preceding followingAddress." + objectMemory + byteAt: followingAddress - 1 put: (literal >> 24 bitAnd: 16rFF); + byteAt: followingAddress - 2 put: (literal >> 16 bitAnd: 16rFF); + byteAt: followingAddress - 3 put: (literal >> 8 bitAnd: 16rFF); + byteAt: followingAddress - 4 put: (literal bitAnd: 16rFF)! Item was changed: ----- Method: Cogit>>expectedClosedPICPrototype: (in category 'in-line cacheing') ----- expectedClosedPICPrototype: cPIC "Answer 0 if the ClosedPIC is as expected from compileClosedPICPrototype, otherwise answer an error code identifying the first discrepancy found." "self disassembleFrom: methodZoneBase + (self sizeof: CogMethod) to: methodZoneBase + closedPICSize" <var: #cPIC type: #'CogMethod *'> | pc object entryPoint | pc := cPIC asUnsignedInteger + firstCPICCaseOffset. "First jump is unconditional; subsequent ones are conditional" object := backEnd literalBeforeFollowingAddress: pc - backEnd jumpLongByteSize. self assert: object = 16r5EAF00D. entryPoint := backEnd jumpLongTargetBeforeFollowingAddress: pc. self assert: entryPoint = (self cPICPrototypeCaseOffset + 16rCA5E10). 1 to: maxCPICCases - 1 do: [:i | | methodObjPC classTagPC | pc := pc + cPICCaseSize. methodObjPC := pc - backEnd jumpLongConditionalByteSize - backEnd cmpC32RTempByteSize. object := backEnd literalBeforeFollowingAddress: methodObjPC. self assert: object = (16rBADA550 + i). backEnd storeLiteral: (object bitXor: 16rA5A5A5A5) beforeFollowingAddress: methodObjPC. object := backEnd literalBeforeFollowingAddress: methodObjPC. self assert: object = (16rBADA550 + i bitXor: 16rA5A5A5A5). backEnd storeLiteral: (object bitXor: 16rA5A5A5A5) beforeFollowingAddress: methodObjPC. classTagPC := pc - backEnd jumpLongConditionalByteSize. object := backEnd literal32BeforeFollowingAddress: classTagPC. self assert: object = (16rBABE1F15 + i). + backEnd storeLiteral32: (object bitXor: 16r5A5A5A5A) beforeFollowingAddress: classTagPC. - backEnd storeLiteral: (object bitXor: 16r5A5A5A5A) beforeFollowingAddress: classTagPC. object := backEnd literal32BeforeFollowingAddress: classTagPC. self assert: object = (16rBABE1F15 + i bitXor: 16r5A5A5A5A). + backEnd storeLiteral32: (object bitXor: 16r5A5A5A5A) beforeFollowingAddress: classTagPC. - backEnd storeLiteral: (object bitXor: 16r5A5A5A5A) beforeFollowingAddress: classTagPC. entryPoint := backEnd jumpLongConditionalTargetBeforeFollowingAddress: pc. self assert: entryPoint = (self cPICPrototypeCaseOffset + 16rCA5E10 + (i * 16))]. entryPoint := backEnd jumpLongTargetBeforeFollowingAddress: pc + cPICEndSize - literalsManager endSizeOffset. self assert: entryPoint = (self cPICMissTrampolineFor: 0). ^0! Item was removed: - ----- Method: Cogit>>storeClassRef:inClosedPICAt: (in category 'in-line cacheing') ----- - storeClassRef: classObj inClosedPICAt: address - <var: #address type: #usqInt> - <inline: true> - "If inline cache tags are not objects they will be 32-bit values." - objectRepresentation inlineCacheTagsMayBeObjects - ifTrue: [backEnd storeLiteral: classObj beforeFollowingAddress: address] - ifFalse: [backEnd storeLiteral32: classObj beforeFollowingAddress: address]!

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VM Maker: VMMaker.oscog-eem.1528.mcz
by commits＠source.squeak.org 22 Nov '15

22 Nov '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1528.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1528 Author: eem Time: 22 November 2015, 9:33:01.294 am UUID: 3ed0e2f1-7f11-4ab0-be68-96373bf4612f Ancestors: VMMaker.oscog-eem.1527 Reorder CPIC instructions to suit MIPSEL, i.e. put the load before the compare and jump. Simplify and eliminate duplication, especially in thge literals managers, nuking almost all of their PIC support code. It isn't needed since the code ends up being the same in each manager. There is still work to do: - the rewriteCPICFoo methods should all be implemented in Cogit and should use the same accessors as expectedClosedPICPrototype demonstrates. - those methods should be tested via extra asserts in expectedClosedPICPrototype Extend MIPS' noteFollowingConditionalBranch: to include long conditional jumps. =============== Diff against VMMaker.oscog-eem.1527 =============== Item was added: + ----- Method: CogARMCompiler>>instructionIsCMP: (in category 'testing') ----- + instructionIsCMP: instr + "is this an CMP instruction?" + ^(instr >> 21 bitAnd: 16r7F) = CmpOpcode! Item was added: + ----- Method: CogARMCompiler>>instructionIsLDR: (in category 'testing') ----- + instructionIsLDR: instr + "is this any kind of LDR instruction? c.f. memMxr:reg:base:u:b:l:imm:" + ^instr >> 28 ~= 16rF "the NEVER condition is used to encode non-load instructions" + and: [(instr >> 20 bitAnd: 16rC5) = 16r41] "ldr r1, [r2, #+/-imm] or ldr r1, [r2, r3]"! Item was changed: ----- Method: CogARMCompiler>>instructionIsOR: (in category 'testing') ----- instructionIsOR: instr "is this an ORR instruction?" + ^(instr >> 21 bitAnd: 16r7F) = (16r10 bitOr: OrOpcode)! - ^(instr >> 21 bitAnd: 16rF) = 16rC! Item was removed: - ----- Method: CogARMCompiler>>literalBeforeFollowingAddress: (in category 'inline cacheing') ----- - literalBeforeFollowingAddress: followingAddress - "Answer the constant loaded by the instruction sequence just before this address:" - ^self subclassResponsibility! Item was added: + ----- Method: CogAbstractInstruction>>cmpC32RTempByteSize (in category 'accessing') ----- + cmpC32RTempByteSize + self subclassResponsibility! Item was added: + ----- Method: CogAbstractInstruction>>literal32BeforeFollowingAddress: (in category 'inline cacheing') ----- + literal32BeforeFollowingAddress: followingAddress + "Answer the constant loaded by the instruction sequence just before this address:" + <inline: true> + ^objectMemory wordSize = 8 + ifTrue: [self subclassResponsibility] + ifFalse: [self literalBeforeFollowingAddress: followingAddress]! Item was added: + ----- Method: CogAbstractInstruction>>literalBeforeFollowingAddress: (in category 'inline cacheing') ----- + literalBeforeFollowingAddress: followingAddress + "Answer the constant loaded by the instruction sequence just before this address:" + ^self subclassResponsibility! Item was changed: ----- Method: CogAbstractInstruction>>rewriteCPICCaseAt:tag:objRef:target: (in category 'inline cacheing') ----- rewriteCPICCaseAt: followingAddress tag: newTag objRef: newObjRef target: newTarget + "Rewrite the three values involved in a CPIC case. Used by the initialize & extend CPICs." - "rewrite the three values involved in a CPIC case. Used by the create & extend cpcic methods" self subclassResponsibility ! Item was added: + ----- Method: CogIA32Compiler>>cmpC32RTempByteSize (in category 'accessing') ----- + cmpC32RTempByteSize + ^5! Item was changed: ----- Method: CogIA32Compiler>>rewriteCPICCaseAt:tag:objRef:target: (in category 'inline cacheing') ----- rewriteCPICCaseAt: followingAddress tag: newTag objRef: newObjRef target: newTarget + "Rewrite the three values involved in a CPIC case. Used by the initialize & extend CPICs." - "rewrite the three values involved in a CPIC case. Used by the create & extend cpcic methods" "IA32 CPIC cases are + cmpl $0x newTag, %eax + movl $0x newObjRef, %ebx + jz .+0x newTarget (0x00010924)" + - cmpl $0x newTag, %eax - movl $0x newObjRef, %ebx - jz .+0x newTarget (0x00010924) - " "rewite the tag via the first ldr" self storeLiteral: newTag beforeFollowingAddress: (followingAddress -11). "write the obj ref/operand via the second ldr" self storeLiteral: newObjRef beforeFollowingAddress: (followingAddress - 6). "write the jump address for the new target address" self rewriteJumpLongAt: followingAddress target: newTarget! Item was added: + ----- Method: CogInLineLiteralsARMCompiler>>cmpC32RTempByteSize (in category 'accessing') ----- + cmpC32RTempByteSize + ^20! Item was added: + ----- Method: CogInLineLiteralsARMCompiler>>literal32BeforeFollowingAddress: (in category 'inline cacheing') ----- + literal32BeforeFollowingAddress: followingAddress + "Answer the 32-bit constant loaded by a MOV/ORR/ORR/ORR + or MOV/ORR/ORR/ORR/PUSH, or MOV/ORR/ORR/ORR/CMP sequence, just before this address:" + ^(self instructionIsOR: (self instructionBeforeAddress: followingAddress)) + ifTrue: [self extract32BitOperandFrom4InstructionsPreceding: followingAddress] + ifFalse: [self extract32BitOperandFrom4InstructionsPreceding: followingAddress - 4]! Item was added: + ----- Method: CogInLineLiteralsX64Compiler>>literal32BeforeFollowingAddress: (in category 'inline cacheing') ----- + literal32BeforeFollowingAddress: followingAddress + "Answer the 32-bit literal embedded in the instruction immediately preceding followingAddress." + ^ ((objectMemory byteAt: followingAddress - 1) << 24) + + ((objectMemory byteAt: followingAddress - 2) << 16) + + ((objectMemory byteAt: followingAddress - 3) << 8) + + (objectMemory byteAt: followingAddress - 4)! Item was added: + ----- Method: CogMIPSELCompiler>>cmpC32RTempByteSize (in category 'accessing') ----- + cmpC32RTempByteSize + self flag: #todo. "value - reg or reg - value?" + self flag: #inefficient. "Cog RTL assumes we can do any kind of conditional branch after a Cmp." + ^28! Item was changed: ----- Method: CogMIPSELCompiler>>noteFollowingConditionalBranch: (in category 'abstract instructions') ----- noteFollowingConditionalBranch: branch "Support for processors without condition codes, such as the MIPS. Answer the branch opcode. Modify the receiver and the branch to implement a suitable conditional branch that doesn't depend on condition codes being set by the receiver." <var: #branch type: #'AbstractInstruction *'> branch opcode caseOf: { [JumpOverflow] -> [opcode := opcode caseOf: { [AddCqR] -> [AddCheckOverflowCqR]. [AddRR] -> [AddCheckOverflowRR]. [MulRR] -> [MulCheckOverflowRR]. [SubCqR] -> [SubCheckOverflowCqR]. [SubRR] -> [SubCheckOverflowRR]. }]. [JumpNoOverflow] -> [opcode := opcode caseOf: { [AddCqR] -> [AddCheckOverflowCqR]. [AddRR] -> [AddCheckOverflowRR]. [MulRR] -> [MulCheckOverflowRR]. [SubCqR] -> [SubCheckOverflowCqR]. [SubRR] -> [SubCheckOverflowRR]. }]. "Ryan, I'm imagining that all the other cases go in here, such as collapsing CmpRR; JumpZero to Label; BrEqRR. This is obviously not nearly complete." [JumpZero] -> [opcode caseOf: { [CmpRR] -> [branch setOpcode: BrEqRR andOperandsFrom: self. + branch operands at: 3 put: (operands at: 1). opcode := Label]. }]. [JumpNonZero] -> [opcode caseOf: { [CmpRR] -> [branch setOpcode: BrNeRR andOperandsFrom: self. + branch operands at: 3 put: (operands at: 1). opcode := Label]. }]. + [JumpLongZero] -> [opcode caseOf: { + [CmpRR] -> [branch setOpcode: BrNeRR andOperandsFrom: self. + "skip the following long branch" + branch operands at: 3 put: self jumpLongByteSize. + opcode := JumpLong]. + }]. + [JumpLongNonZero] -> [opcode caseOf: { + [CmpRR] -> [branch setOpcode: BrEqRR andOperandsFrom: self. + "skip the following long branch" + branch operands at: 3 put: self jumpLongByteSize. + opcode := JumpLong]. + }]. } "No otherwise for now to catch all cases" "otherwise: []". ^branch! Item was added: + ----- Method: CogObjectRepresentationFor32BitSpur>>markAndTraceCacheTagLiteral:in:atpc: (in category 'garbage collection') ----- + markAndTraceCacheTagLiteral: literal in: cogMethodOrNil atpc: address + "Mark and trace a literal in an inline cache preceding address in cogMethodOrNil. + Answer if code was modified." + <var: #cogMethodOrNil type: #'CogMethod *'> + <var: #address type: #usqInt> + | objOop | + (self couldBeObject: literal) ifFalse: + [^false]. + self assert: (objectMemory addressCouldBeObj: literal). + (objectMemory isForwarded: literal) ifFalse: + [objectMemory markAndTrace: literal. + ^false]. + objOop := objectMemory followForwarded: literal. + cogit backEnd rewriteInlineCacheTag: objOop at: address. + self markAndTraceUpdatedLiteral: objOop in: cogMethodOrNil. + ^true! Item was added: + ----- Method: CogObjectRepresentationFor64BitSpur>>markAndTraceCacheTagLiteral:in:atpc: (in category 'garbage collection') ----- + markAndTraceCacheTagLiteral: literal in: cogMethodOrNil atpc: address + "Mark and trace a literal in an inline cache preceding address in cogMethodOrNil. + Answer if code was modified. In 64-bit Spur, cache tags are either selector + indices or class indices and so this is a noop." + <var: #cogMethodOrNil type: #'CogMethod *'> + <var: #address type: #usqInt> + <inline: true> + ^false! Item was removed: - ----- Method: CogObjectRepresentationForSpur>>markAndTraceCacheTagLiteral:in:atpc: (in category 'garbage collection') ----- - markAndTraceCacheTagLiteral: literal in: cogMethodOrNil atpc: address - "Mark and trace a literal in an inline cache preceding address in cogMethodOrNil. - Answer if code was modified." - <var: #cogMethodOrNil type: #'CogMethod *'> - <var: #address type: #usqInt> - | objOop | - (self couldBeObject: literal) ifFalse: - [^false]. - self assert: (objectMemory addressCouldBeObj: literal). - (objectMemory isForwarded: literal) ifFalse: - [objectMemory markAndTrace: literal. - ^false]. - objOop := objectMemory followForwarded: literal. - cogit backEnd rewriteInlineCacheTag: objOop at: address. - self markAndTraceUpdatedLiteral: objOop in: cogMethodOrNil. - ^true! Item was removed: - ----- Method: CogObjectRepresentationForSqueakV3>>remapCacheTag: (in category 'garbage collection') ----- - remapCacheTag: cacheTag - ^(self couldBeObject: cacheTag) - ifTrue: [objectMemory remap: cacheTag] - ifFalse: [cacheTag]! Item was added: + ----- Method: CogOutOfLineLiteralsARMCompiler>>cmpC32RTempByteSize (in category 'accessing') ----- + cmpC32RTempByteSize + ^8! Item was changed: ----- Method: CogOutOfLineLiteralsARMCompiler>>literalBeforeFollowingAddress: (in category 'inline cacheing') ----- literalBeforeFollowingAddress: followingAddress "Return the literal referenced by the instruction immediately preceding followingAddress." + ^objectMemory longAt: (self pcRelativeAddressAt: + ((self instructionIsLDR: (self instructionBeforeAddress: followingAddress)) + ifTrue: [self instructionAddressBefore: followingAddress] + ifFalse: [self instructionAddressBefore: followingAddress - 4]))! - ^objectMemory longAt: (self pcRelativeAddressAt: (self instructionAddressBefore: followingAddress))! Item was changed: ----- Method: CogOutOfLineLiteralsARMCompiler>>storeLiteral:beforeFollowingAddress: (in category 'inline cacheing') ----- storeLiteral: literal beforeFollowingAddress: followingAddress "Rewrite the literal in the instruction immediately preceding followingAddress." + objectMemory + longAt: (self pcRelativeAddressAt: + ((self instructionIsLDR: (self instructionBeforeAddress: followingAddress)) + ifTrue: [self instructionAddressBefore: followingAddress] + ifFalse: [self instructionAddressBefore: followingAddress - 4])) + put: literal! - objectMemory longAt: (self pcRelativeAddressAt: (self instructionAddressBefore: followingAddress )) put: literal! Item was added: + ----- Method: CogX64Compiler>>cmpC32RTempByteSize (in category 'accessing') ----- + cmpC32RTempByteSize + ^6! Item was changed: ----- Method: Cogit>>cPICHasForwardedClass: (in category 'in-line cacheing') ----- cPICHasForwardedClass: cPIC "The first case in a CPIC doesn't have a class reference so we need only step over actually usd subsequent cases." | pc | <var: #cPIC type: #'CogMethod *'> "start by finding the address of the topmost case, the cPICNumCases'th one" pc := (self addressOfEndOfCase: cPIC cPICNumCases inCPIC: cPIC) - backEnd jumpLongConditionalByteSize. 2 to: cPIC cPICNumCases do: [:i | | classIndex | + classIndex := literalsManager backEnd literal32BeforeFollowingAddress: pc. - classIndex := literalsManager classRefInClosedPICAt: pc. (objectMemory isForwardedClassIndex: classIndex) ifTrue: [^ true]. "since we started at the top, we can just add the case size each time to move on to the next case" pc := pc + cPICCaseSize]. ^ false! Item was changed: ----- Method: Cogit>>checkValidObjectReferencesInClosedPIC: (in category 'garbage collection') ----- checkValidObjectReferencesInClosedPIC: cPIC <var: #cPIC type: #'CogMethod *'> | ok pc | ok := true. pc := cPIC asInteger + firstCPICCaseOffset. "first we check the obj ref at the beginning of the CPIC" + (self checkMaybeObjRefInClosedPIC: (backEnd literalBeforeFollowingAddress: pc - backEnd jumpLongByteSize)) ifFalse: - (self checkMaybeObjRefInClosedPIC: (literalsManager objRefInClosedPICAt: pc - backEnd jumpLongByteSize)) ifFalse: [self print: 'object leak in CPIC '; printHex: cPIC asInteger; print: ' @ '; printHex: pc - backEnd jumpLongByteSize; cr. ok := false]. "Next we step over each case that is in use. We find the end address of the cPICNumCases'th case and can then just step forward by the case size thereafter" pc := self addressOfEndOfCase: cPIC cPICNumCases inCPIC: cPIC. "For each case we check any object reference at the end address - sizeof(conditional instruction) and then increment the end address by case size" 2 to: cPIC cPICNumCases do: [:i| objectRepresentation inlineCacheTagsMayBeObjects ifTrue: + [(self checkMaybeObjRefInClosedPIC: (literalsManager backEnd literal32BeforeFollowingAddress: pc - backEnd jumpLongConditionalByteSize)) ifFalse: - [(self checkMaybeObjRefInClosedPIC: (literalsManager classRefInClosedPICAt: pc - backEnd jumpLongConditionalByteSize)) ifFalse: [self print: 'object leak in CPIC '; printHex: cPIC asInteger; print: ' @ '; printHex: pc - backEnd jumpLongConditionalByteSize - backEnd loadLiteralByteSize; cr. ok := false]]. + (self checkMaybeObjRefInClosedPIC: (backEnd literalBeforeFollowingAddress: pc - backEnd jumpLongConditionalByteSize - backEnd cmpC32RTempByteSize)) ifFalse: - (self checkMaybeObjRefInClosedPIC: (literalsManager objRefInClosedPICAt: pc - backEnd jumpLongConditionalByteSize)) ifFalse: [self print: 'object leak in CPIC '; printHex: cPIC asInteger; print: ' @ '; printHex: pc - backEnd jumpLongConditionalByteSize; cr. ok := false]. pc := pc + cPICCaseSize]. ^ok! Item was changed: ----- Method: Cogit>>closedPICRefersToUnmarkedObject: (in category 'garbage collection') ----- closedPICRefersToUnmarkedObject: cPIC "Answer if the ClosedPIC refers to any unmarked objects or freed/freeable target methods, applying markAndTraceOrFreeCogMethod:firstVisit: to those targets to determine if freed/freeable." <var: #cPIC type: #'CogMethod *'> + | pc object | + ((objectMemory isImmediate: cPIC selector) + or: [objectMemory isMarked: cPIC selector]) ifFalse: + [^true]. + - | pc offsetToLiteral object entryPoint targetMethod | - <var: #targetMethod type: #'CogMethod *'> - (objectMemory isImmediate: cPIC selector) ifFalse: - [(objectMemory isMarked: cPIC selector) ifFalse: - [^true]]. "First jump is unconditional; subsequent ones are conditional." + "Check the potential method oop for the first case only. + Inline cache tags for the 1st case are at the send site." + pc := self addressOfEndOfCase: 1 inCPIC: cPIC. + (objectRepresentation couldBeObject: (object := backEnd literalBeforeFollowingAddress: pc - backEnd jumpLongByteSize)) ifTrue: + [(objectMemory isMarked: object) ifFalse: + [^true]]. + + "Check the first target" + (self markAndTraceOrFreePICTarget: (backEnd jumpLongTargetBeforeFollowingAddress: pc) in: cPIC) ifTrue: + [^true]. + + 2 to: cPIC cPICNumCases do: - offsetToLiteral := backEnd jumpLongByteSize. - 1 to: cPIC cPICNumCases do: [:i| pc := self addressOfEndOfCase: i inCPIC: cPIC. + (objectRepresentation inlineCacheTagsMayBeObjects + and: [objectRepresentation couldBeObject: (object := literalsManager backEnd literal32BeforeFollowingAddress: pc - backEnd jumpLongConditionalByteSize)]) ifTrue: + [(objectMemory isMarked: object) ifFalse: - (objectRepresentation inlineCacheTagsMayBeObjects and: [i>1] ) "inline cache tags for the 0th case are at the send site" ifTrue: - [object := literalsManager classRefInClosedPICAt: pc - offsetToLiteral. - ((objectRepresentation couldBeObject: object) - and: [(objectMemory isMarked: object) not]) ifTrue: [^true]]. + "Check the potential method oop for subsequent cases." + (objectRepresentation couldBeObject: (object := backEnd literalBeforeFollowingAddress: pc - backEnd jumpLongConditionalByteSize - backEnd cmpC32RTempByteSize)) ifTrue: + [(objectMemory isMarked: object) ifFalse: + [^true]]. + "Check subsequent targets" + (self markAndTraceOrFreePICTarget: (backEnd jumpLongConditionalTargetBeforeFollowingAddress: pc) in: cPIC) ifTrue: + [^true]]. + - object := literalsManager objRefInClosedPICAt: pc - offsetToLiteral. - ((objectRepresentation couldBeObject: object) - and: [(objectMemory isMarked: object) not]) ifTrue: - [^true]. - offsetToLiteral := backEnd jumpLongConditionalByteSize. - entryPoint := i = 1 - ifTrue: [backEnd jumpLongTargetBeforeFollowingAddress: pc] - ifFalse: [backEnd jumpLongConditionalTargetBeforeFollowingAddress: pc]. - "Find target from jump. Ignore jumps to the interpret and MNU calls within this PIC" - self assert: (entryPoint > methodZoneBase and: [entryPoint < methodZone freeStart]). - (cPIC containsAddress: entryPoint) ifFalse: - [targetMethod := self cCoerceSimple: entryPoint - cmNoCheckEntryOffset to: #'CogMethod *'. - self assert: (targetMethod cmType = CMMethod - or: [targetMethod cmType = CMFree]). - (self markAndTraceOrFreeCogMethod: targetMethod - firstVisit: targetMethod asUnsignedInteger > pc asUnsignedInteger) ifTrue: - [^true]]]. ^false! Item was changed: ----- Method: Cogit>>compileClosedPICPrototype (in category 'in-line cacheing') ----- compileClosedPICPrototype "Compile the abstract instructions for a full closed PIC, used to generate the chunk of code which is copied to form each closed PIC. A Closed Polymorphic Inline Cache is a small jump table used to optimize sends with a limited degree of polymorphism (currently up to 6 cases). We call it closed because it deals only with a finite number of cases, as opposed to an Open PIC. When a monomorphic linked send (a send with a single case, linking direct to the checked entry point of a CogMethod) fails a class check, the Cogit attempts to create a two-entry PIC that will handle jumping to the original target for the original class and the relevant target for the new class. This jump table will be extended on subsequent failures up to a limit (6). We avoid extending CPICs to Open PICs by linking the send site to an Open PIC if one already exists with the send's selector, a good policy since measurements show that sends of mega- morphic selectors usually become megamorphic at all send sites. Hence the Open PIC list. A CPIC also optimizes MNUs and interpret-only methods. Each case can load SendNumArgs with the oop of a method, or will load SendNumArgs with 0 if not. MNUs are optimized by jumping to the mnuAbort in the CPIC, which calls code that creates the Message, thereby avoiding looking up the original message which will not be found, and either looks up doesNotUnderstand: or directly activates the method loaded into SendNumArgs, hence avoiding looking up doesNotUnderstand:. Interpret-only methods are handled by jumping to the picInterpretAbort, which enters the interpreter activating the method loaded in SendNumArgs. CPICs look like the following, where rClass is set at the original send site for the 1st case, and #Foo is some constant, either an oop, a class tag or an instruction address. rTemp := (rRecever bitAnd: TagMask) = 0 ifTrue: [rReceiver class] ifFalse: [rRecever bitAnd: TagMask]. rTemp = rClass ifFalse: [self goto: #Label]. rSendNumArgs := #MethodForCase1Or0. self goto: #TargetForCase1. #Label rTemp = #ClassTagForCase6 ifTrue: [rSendNumArgs := #MethodForCase6Or0. self goto: #TargetForCase6]. ...cases 5, 4 & 3 rTemp = #ClassTagForCase2 ifTrue: [rSendNumArgs := #MethodForCase2Or0. self goto: #TargetForCase2]. self goto: #CPICMissTrampoline literals (if out-of-line literals) where we short-cut as many cases as needed by making the self goto: #Label skip as many cases as needed." <inline: true> | numArgs jumpNext | <var: #jumpNext type: #'AbstractInstruction *'> self compilePICAbort: (numArgs := 0). "Will get rewritten to appropriate arity when configuring." jumpNext := self compileCPICEntry. "At the end of the entry code we need to jump to the first case code, which is actually the last chunk. On each entension we must update this jump to move back one case." "16r5EAF00D is the method oop, or 0, for the 1st case." self MoveUniqueCw: 16r5EAF00D R: SendNumArgsReg. self JumpLong: self cPICPrototypeCaseOffset + 16rCA5E10. endCPICCase0 := self Label. 1 to: maxCPICCases - 1 do: [:h| h = (maxCPICCases - 1) ifTrue: [jumpNext jmpTarget: self Label]. "this is where we jump to for the first case" - "16rBABE1F15+h is the class tag for the Nth case" - self CmpC32: 16rBABE1F15+h R: TempReg. "16rBADA550+h is the method oop, or 0, for the Nth case." self MoveUniqueCw: 16rBADA550 + h R: SendNumArgsReg. + "16rBABE1F15+h is the class tag for the Nth case" + self CmpC32: 16rBABE1F15+h R: TempReg. self JumpLongZero: self cPICPrototypeCaseOffset + 16rCA5E10 + (h * 16). h = 1 ifTrue: [endCPICCase1 := self Label]]. self MoveCw: methodLabel address R: ClassReg. self JumpLong: (self cPICMissTrampolineFor: numArgs). "Will get rewritten to appropriate arity when configuring." cPICEndOfCodeLabel := self Label. literalsManager dumpLiterals: false. ^0! Item was changed: ----- Method: Cogit>>expectedClosedPICPrototype: (in category 'in-line cacheing') ----- expectedClosedPICPrototype: cPIC "Answer 0 if the ClosedPIC is as expected from compileClosedPICPrototype, otherwise answer an error code identifying the first discrepancy found." "self disassembleFrom: methodZoneBase + (self sizeof: CogMethod) to: methodZoneBase + closedPICSize" <var: #cPIC type: #'CogMethod *'> + | pc object entryPoint | + pc := cPIC asUnsignedInteger + firstCPICCaseOffset. - | pc offsetToLiteral object entryPoint | - pc := cPIC asInteger + firstCPICCaseOffset. "First jump is unconditional; subsequent ones are conditional" + object := backEnd literalBeforeFollowingAddress: pc - backEnd jumpLongByteSize. + self assert: object = 16r5EAF00D. - offsetToLiteral := backEnd jumpLongByteSize. - - object := literalsManager objRefInClosedPICAt: pc - offsetToLiteral. - self assert: (object = 16r5EAF00D). entryPoint := backEnd jumpLongTargetBeforeFollowingAddress: pc. + self assert: entryPoint = (self cPICPrototypeCaseOffset + 16rCA5E10). - self assert: (entryPoint = (self cPICPrototypeCaseOffset + 16rCA5E10)). 1 to: maxCPICCases - 1 do: + [:i | | methodObjPC classTagPC | - [:i | pc := pc + cPICCaseSize. - offsetToLiteral := backEnd jumpLongConditionalByteSize. + methodObjPC := pc - backEnd jumpLongConditionalByteSize - backEnd cmpC32RTempByteSize. + object := backEnd literalBeforeFollowingAddress: methodObjPC. - object := literalsManager classRefInClosedPICAt: pc - offsetToLiteral. - self assert: object = (16rBABE1F15 + i). - literalsManager storeClassRef: (object bitXor: 16r5A5A5A5A) inClosedPICAt: pc - offsetToLiteral. - object := literalsManager classRefInClosedPICAt: pc - offsetToLiteral. - self assert: object = ((16rBABE1F15 + i bitXor: 16r5A5A5A5A)). - literalsManager storeClassRef: (object bitXor: 16r5A5A5A5A) inClosedPICAt: pc - offsetToLiteral. - - object := literalsManager objRefInClosedPICAt: pc - offsetToLiteral. self assert: object = (16rBADA550 + i). + backEnd storeLiteral: (object bitXor: 16rA5A5A5A5) beforeFollowingAddress: methodObjPC. + object := backEnd literalBeforeFollowingAddress: methodObjPC. + self assert: object = (16rBADA550 + i bitXor: 16rA5A5A5A5). + backEnd storeLiteral: (object bitXor: 16rA5A5A5A5) beforeFollowingAddress: methodObjPC. - literalsManager storeObjRef: (object bitXor: 16rA5A5A5A5) inClosedPICAt: pc - offsetToLiteral. - object := literalsManager objRefInClosedPICAt: pc - offsetToLiteral. - self assert: object = ((16rBADA550 + i) bitXor: 16rA5A5A5A5). - literalsManager storeObjRef: (object bitXor: 16rA5A5A5A5) inClosedPICAt: pc - offsetToLiteral. + classTagPC := pc - backEnd jumpLongConditionalByteSize. + object := backEnd literal32BeforeFollowingAddress: classTagPC. + self assert: object = (16rBABE1F15 + i). + backEnd storeLiteral: (object bitXor: 16r5A5A5A5A) beforeFollowingAddress: classTagPC. + object := backEnd literal32BeforeFollowingAddress: classTagPC. + self assert: object = (16rBABE1F15 + i bitXor: 16r5A5A5A5A). + backEnd storeLiteral: (object bitXor: 16r5A5A5A5A) beforeFollowingAddress: classTagPC. + entryPoint := backEnd jumpLongConditionalTargetBeforeFollowingAddress: pc. self assert: entryPoint = (self cPICPrototypeCaseOffset + 16rCA5E10 + (i * 16))]. entryPoint := backEnd jumpLongTargetBeforeFollowingAddress: pc + cPICEndSize - literalsManager endSizeOffset. + self assert: entryPoint = (self cPICMissTrampolineFor: 0). - self assert: (entryPoint = (self cPICMissTrampolineFor: 0)). ^0! Item was changed: ----- Method: Cogit>>followMaybeObjRefInClosedPICAt: (in category 'garbage collection') ----- followMaybeObjRefInClosedPICAt: mcpc "Follow a potential object reference from a closed PIC. This may be a method reference or null. Answer if the followed literal is young. 'mcpc' refers to the jump/branch instruction at the end of each cpic case" | object subject | + object := backEnd literalBeforeFollowingAddress: mcpc. - object := literalsManager objRefInClosedPICAt: mcpc. (objectRepresentation couldBeObject: object) ifFalse: [^false]. (objectMemory isForwarded: object) ifFalse: [^objectMemory isYoungObject: object]. subject := objectMemory followForwarded: object. + backEnd storeLiteral: subject beforeFollowingAddress: mcpc. - literalsManager storeObjRef: subject inClosedPICAt: mcpc. codeModified := true. ^objectMemory isYoungObject: subject! Item was changed: ----- Method: Cogit>>followMethodReferencesInClosedPIC: (in category 'garbage collection') ----- followMethodReferencesInClosedPIC: cPIC "Remap all object references in the closed PIC. Answer if any references are young. Set codeModified if any modifications are made." <var: #cPIC type: #'CogMethod *'> | pc refersToYoung | pc := self addressOfEndOfCase: 1 inCPIC: cPIC. + "first we check the potential method oop load at the beginning of the CPIC" - "first we check the method obj ref at the beginning of the CPIC" refersToYoung := self followMaybeObjRefInClosedPICAt: pc - backEnd jumpLongByteSize. "We find the end address of the cPICNumCases'th case and can then just step forward by the case size thereafter" pc := self addressOfEndOfCase: cPIC cPICNumCases inCPIC: cPIC. + "Next we check the potential potential method oop load for each case." - "For each case we check any object reference at the end address - sizeof(conditional instruction) and then increment the end address by case size" 2 to: cPIC cPICNumCases do: [:i| + (self followMaybeObjRefInClosedPICAt: pc - backEnd jumpLongConditionalByteSize - backEnd cmpC32RTempByteSize) ifTrue: - (self followMaybeObjRefInClosedPICAt: pc - backEnd jumpLongConditionalByteSize) ifTrue: [refersToYoung := true]. pc := pc + cPICCaseSize]. ^refersToYoung! Item was changed: ----- Method: Cogit>>mapObjectReferencesInClosedPIC: (in category 'garbage collection') ----- mapObjectReferencesInClosedPIC: cPIC "Remap all object references in the closed PIC. Answer if any references are young. Set codeModified if any modifications are made." <var: #cPIC type: #'CogMethod *'> | pc refersToYoung | pc := self addressOfEndOfCase:1 inCPIC:cPIC. + "first we check the potential method oop load at the beginning of the CPIC" + refersToYoung := self remapMaybeObjRefInClosedPICAt: pc - backEnd jumpLongByteSize. - "first we check the obj ref at the beginning of the CPIC" - refersToYoung := self updateMaybeObjRefInClosedPICAt: pc - backEnd jumpLongByteSize. "We find the end address of the cPICNumCases'th case and can then just step forward by the case size thereafter" pc := self addressOfEndOfCase: cPIC cPICNumCases inCPIC: cPIC. + "Next we check the potential class ref in the compare instruction, and the potential method oop load for each case." - "For each case we check any object reference at the end address - sizeof(conditional instruction) and then increment the end address by case size" 2 to: cPIC cPICNumCases do: [:i| objectRepresentation inlineCacheTagsMayBeObjects ifTrue: + [(self remapMaybeObjRefInClosedPICAt: pc - backEnd jumpLongConditionalByteSize) ifTrue: - [(self updateMaybeClassRefInClosedPICAt: pc - backEnd jumpLongConditionalByteSize) ifTrue: [refersToYoung := true]]. + (self remapMaybeObjRefInClosedPICAt: pc - backEnd jumpLongConditionalByteSize - backEnd cmpC32RTempByteSize) ifTrue: - (self updateMaybeObjRefInClosedPICAt: pc - backEnd jumpLongConditionalByteSize) ifTrue: [refersToYoung := true]. pc := pc + cPICCaseSize]. ^refersToYoung! Item was added: + ----- Method: Cogit>>markAndTraceOrFreePICTarget:in: (in category 'garbage collection') ----- + markAndTraceOrFreePICTarget: entryPoint in: cPIC + "If entryPoint is that of some method, then mark and trace objects in it and free if it is appropriate. + Answer if the method has been freed." + <var: #cPIC type: #'CogMethod *'> + | targetMethod | + <var: #targetMethod type: #'CogMethod *'> + self assert: (entryPoint > methodZoneBase and: [entryPoint < methodZone freeStart]). + (cPIC containsAddress: entryPoint) ifTrue: + [^false]. + targetMethod := self cCoerceSimple: entryPoint - cmNoCheckEntryOffset to: #'CogMethod *'. + self assert: (targetMethod cmType = CMMethod or: [targetMethod cmType = CMFree]). + ^self markAndTraceOrFreeCogMethod: targetMethod + firstVisit: targetMethod asUnsignedInteger > cPIC asUnsignedInteger! Item was added: + ----- Method: Cogit>>remapMaybeObjRefInClosedPICAt: (in category 'garbage collection') ----- + remapMaybeObjRefInClosedPICAt: mcpc + "Remap a potential object reference from a closed PIC. + This may be an object reference, an inline cache tag or null. + Answer if the updated literal is young. + mcpc is the address of the next instruction following either + the load of the method literal or the compare of the class tag." + | object subject | + object := backEnd literalBeforeFollowingAddress: mcpc. + (objectRepresentation couldBeObject: object) ifFalse: + [^false]. + subject := objectRepresentation remapOop: object. + object ~= subject ifTrue: + [backEnd storeLiteral: subject beforeFollowingAddress: mcpc. + codeModified := true]. + ^objectMemory isYoungObject: subject! Item was added: + ----- Method: Cogit>>storeClassRef:inClosedPICAt: (in category 'in-line cacheing') ----- + storeClassRef: classObj inClosedPICAt: address + <var: #address type: #usqInt> + <inline: true> + "If inline cache tags are not objects they will be 32-bit values." + objectRepresentation inlineCacheTagsMayBeObjects + ifTrue: [backEnd storeLiteral: classObj beforeFollowingAddress: address] + ifFalse: [backEnd storeLiteral32: classObj beforeFollowingAddress: address]! Item was removed: - ----- Method: Cogit>>updateMaybeClassRefInClosedPICAt: (in category 'garbage collection') ----- - updateMaybeClassRefInClosedPICAt: mcpc - "Update a potential object reference from a closed PIC. - This may be an object reference, an inline cache tag or null. - Answer if the updated literal is young." - | object subject | - object := literalsManager classRefInClosedPICAt: mcpc. - (objectRepresentation couldBeObject: object) ifFalse: - [^false]. - subject := objectRepresentation remapOop: object. - object ~= subject ifTrue: - [literalsManager storeClassRef: subject inClosedPICAt: mcpc. - codeModified := true]. - ^objectMemory isYoungObject: subject! Item was removed: - ----- Method: Cogit>>updateMaybeObjRefInClosedPICAt: (in category 'garbage collection') ----- - updateMaybeObjRefInClosedPICAt: mcpc - "Update a potential object reference from a closed PIC. - This may be an object reference, an inline cache tag or null. - Answer if the updated literal is young. - 'mcpc' refers to the jump/branch instruction at the end of - each cpic case" - | object subject | - object := literalsManager objRefInClosedPICAt: mcpc. - (objectRepresentation couldBeObject: object) ifFalse: - [^false]. - subject := objectRepresentation remapOop: object. - object ~= subject ifTrue: - [literalsManager storeObjRef: subject inClosedPICAt: mcpc. - codeModified := true]. - ^objectMemory isYoungObject: subject! Item was changed: VMClass subclass: #InLineLiteralsManager + instanceVariableNames: 'cogit objectMemory objectRepresentation' - instanceVariableNames: 'cogit' classVariableNames: '' poolDictionaries: '' category: 'VMMaker-JIT'! !InLineLiteralsManager commentStamp: 'eem 6/7/2015 12:07' prior: 0! An InLineLiteralsManager is a dummy class that understands the OutOfLineLiteralsManager API but does nothing. It is used to allow the Cogits to work with back-ends that generate either in-line or out-of-line literals.! Item was removed: - ----- Method: InLineLiteralsManager>>cPICCase:relocateJumpLongBefore:by: (in category 'closed PIC parsing') ----- - cPICCase: caseIndex relocateJumpLongBefore: pc by: delta - <inline: true> - cogit backEnd - relocateJumpLongBeforeFollowingAddress: pc - by: delta! Item was removed: - ----- Method: InLineLiteralsManager>>classRefInClosedPICAt: (in category 'garbage collection') ----- - classRefInClosedPICAt: mcpc - <inline: true> - ^cogit backEnd literalBeforeFollowingAddress: mcpc - cogit backEnd loadLiteralByteSize! Item was changed: ----- Method: InLineLiteralsManager>>cogit: (in category 'initialization') ----- cogit: aCogit <doNotGenerate> + cogit := aCogit. + objectMemory := aCogit objectMemory. + objectRepresentation := aCogit objectRepresentation.! - cogit := aCogit! Item was removed: - ----- Method: InLineLiteralsManager>>objRefInClosedPICAt: (in category 'garbage collection') ----- - objRefInClosedPICAt: mcpc - "'mcpc' refers to the jump/branch instruction at the end of - each cpic case. The method objRef is the method object referenced by the - movI $0x0bada553, %ebx - or - ldr r6, [pc, #64] ; 0x000017d4 16rBADA553 - type instruction preceeding this" - <inline: true> - ^cogit backEnd literalBeforeFollowingAddress: mcpc! Item was removed: - ----- Method: InLineLiteralsManager>>storeClassRef:inClosedPICAt: (in category 'garbage collection') ----- - storeClassRef: classObj inClosedPICAt: address - <var: #address type: #usqInt> - <inline: true> - cogit backEnd storeLiteral: classObj beforeFollowingAddress: address - cogit backEnd loadLiteralByteSize! Item was removed: - ----- Method: InLineLiteralsManager>>storeObjRef:inClosedPICAt: (in category 'garbage collection') ----- - storeObjRef: literal inClosedPICAt: address - "'mcpc' refers to the jump/branch instruction at the end of - each cpic case. The objRef is the literal referenced by the - movI $0x0bada553, %ebx or - ldr r6, [pc, #64] ; 0x000017d4 16rBADA553 - type instruction preceeding this" - <var: #address type: #usqInt> - <inline: true> - cogit backEnd storeLiteral: literal beforeFollowingAddress: address! Item was removed: - ----- Method: OutOfLineLiteralsManager>>cPICCase:relocateJumpLongBefore:by: (in category 'closed PIC parsing') ----- - cPICCase: caseIndex relocateJumpLongBefore: pc by: delta - <inline: true> - cogit backEnd relocateJumpLongBeforeFollowingAddress: pc by: delta! Item was removed: - ----- Method: OutOfLineLiteralsManager>>classRefInClosedPICAt: (in category 'garbage collection') ----- - classRefInClosedPICAt: address - <inline: true> - "If inline cache tags are not objects they will be 32-bit values." - "Current ARM out-of-line literal CPICs use - ldr ip, [pc relative address1] - cmp r0, ip - ldr r6, [pc relative address2 - beq code - hence the large backwards stepping here - address is pointing at the beq" - ^objectRepresentation inlineCacheTagsMayBeObjects - ifFalse: [cogit backEnd literalBeforeFollowingAddress: address - 8 "better to use 2 * instructionSize if we could, step back to the cmp so the literal is found properly" ] - ifTrue: [self break. "not sure about this ? "objectMemory longAt: address - objectMemory bytesPerOop]! Item was removed: - ----- Method: OutOfLineLiteralsManager>>objRefInClosedPICAt: (in category 'garbage collection') ----- - objRefInClosedPICAt: address - "'mcpc' refers to the jump/branch instruction at the end of - each cpic case. The objRef is the literal referenced by the - ldr r6, [pc, #88] ; 16r5EAF00D type instruction preceeding this" - <inline: true> - ^cogit backEnd literalBeforeFollowingAddress: address ! Item was removed: - ----- Method: OutOfLineLiteralsManager>>storeClassRef:inClosedPICAt: (in category 'garbage collection') ----- - storeClassRef: classObj inClosedPICAt: address - <var: #address type: #usqInt> - <inline: true> - "If inline cache tags are not objects they will be 32-bit values." - "Current ARM out-of-line literal CPICs use - ldr ip, [pc relative address1] - cmp r0, ip - ldr r6, [pc relative address2 - beq code - hence the large backwards stepping here" - objectRepresentation inlineCacheTagsMayBeObjects - ifTrue: [self break. objectMemory long32At: address - 4 put: classObj] - ifFalse: [cogit backEnd storeLiteral: classObj beforeFollowingAddress: address - 8 "better to use 2 * instructionSize if we could, step back to the cmp so the literal is found properly"]! Item was removed: - ----- Method: OutOfLineLiteralsManager>>storeObjRef:inClosedPICAt: (in category 'garbage collection') ----- - storeObjRef: literal inClosedPICAt: address - "'mcpc' refers to the jump/branch instruction at the end of - each cpic case. The objRef is the literal referenced by the - ldr r6, [pc, #88] ; 16r5EAF00D type instruction preceeding this" - <var: #address type: #usqInt> - <inline: true> - cogit backEnd storeLiteral: literal beforeFollowingAddress: address!

1 0

Having a specific class for temp vectors
by Clément Bera 21 Nov '15

21 Nov '15

Hello everyone, This is the second time I have issues with temp vectors. They are internal to the runtime but are exposed to the programmer. The problem is that the runtime have expectations with the temp vectors that the programmer could break, crashing the VM. The first thing in Spur is that temp vectors can through the become primitive be a forwarding object, which crashes the VM as remote temporary variable stores do not check if the temp vector is a forwarder. The second thing, now that I am working with immutability (VW's immutability), is that temp vectors could be marked as immutable and the runtime does not check at each remote temp store if it is immutable. What I would like is to have a specific subclass of Array, likely to be called TempVector, and have temp vectors be an instance of TempVector instead of Array. Then the VM could easily check is an object is a temp vector and fail the become primitive or the setImmutability primitive. I think this should be exposed in the image. It would mean having the TempVector class in the special object array. What do you think ? Clement

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Vm-dev November 2015