Vm-dev November 2015

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VM Maker: VMMaker.oscog-eem.1510.mcz
by commits＠source.squeak.org 05 Nov '15

05 Nov '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1510.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1510 Author: eem Time: 4 November 2015, 6:26:00.671 pm UUID: f4c6b0cb-dda2-4a50-a0c5-cd7609a53503 Ancestors: VMMaker.oscog-eem.1509 x64 Cogit: More support in the obj rep to do at: and size prims. Add MoveX32r:R:R: to index 32-bit indexables. Add a disassembly convenience on CogAbstractnstruction =============== Diff against VMMaker.oscog-eem.1509 =============== Item was added: + ----- Method: CogAbstractInstruction>>disassemble (in category 'full transfer run-time support') ----- + disassemble + <doNotGenerate> + self disassembleOn: Transcript! Item was added: + ----- Method: CogAbstractInstruction>>disassembleOn: (in category 'full transfer run-time support') ----- + disassembleOn: aStream + <doNotGenerate> + cogit processor + disassembleFrom: 0 + to: machineCodeSize - 1 + in: machineCode object + on: aStream! Item was added: + ----- Method: CogObjectRepresentation>>genInnerPrimitiveAt: (in category 'primitive generators') ----- + genInnerPrimitiveAt: retNoffset + "Implement the guts of primitiveAt" + ^self subclassResponsibility! Item was removed: - ----- Method: CogObjectRepresentationFor32BitSpur>>genGetNumSlotsOf:into: (in category 'compile abstract instructions') ----- - genGetNumSlotsOf: srcReg into: destReg - "Get the size in word-sized slots of the object in srcReg into destReg. - srcReg may equal destReg." - <var: #jmp type: #'AbstractInstruction *'> - | jmp | - self assert: srcReg ~= destReg. - self genGetRawSlotSizeOfNonImm: srcReg into: destReg. - cogit CmpCq: objectMemory numSlotsMask R: destReg. - jmp := cogit JumpLess: 0. - self genGetOverflowSlotsOf: srcReg into: destReg. - jmp jmpTarget: cogit Label. - ^0! Item was added: + ----- Method: CogObjectRepresentationFor64BitSpur>>genGetOverflowSlotsOf:into: (in category 'compile abstract instructions') ----- + genGetOverflowSlotsOf: srcReg into: destReg + cogit + MoveMw: objectMemory baseHeaderSize negated r: srcReg R: destReg; + LogicalShiftLeftCq: 8 R: destReg; + LogicalShiftRightCq: 8 R: destReg. + ^0! Item was added: + ----- Method: CogObjectRepresentationFor64BitSpur>>genGetSizeOf:into:formatReg:scratchReg:abortJumpsInto: (in category 'primitive generators') ----- + genGetSizeOf: sourceReg into: destReg formatReg: formatReg scratchReg: scratchReg abortJumpsInto: aBinaryBlock + "Get the size of the non-immediate object in sourceReg into destReg using formatReg + and scratchReg as temps. None of these registers can overlap. Supply the jumps + taken if the object in sourceReg is not indexable, or if the object in sourceReg is a + context.. Hack: If the object has a pointer format other than 2 leave the number of + fixed fields in formatReg. Used by primitiveSize, primitiveAt, and primitiveAtPut" + <returnTypeC: #'AbstractInstruction *'> + | jumpNotIndexable + jumpBytesDone jumpShortsDone jumpArrayDone jump32BitLongsDone jump64BitLongsDone + jumpIsBytes jumpHasFixedFields jumpIsShorts jumpIs32BitLongs jumpIsContext | + <inline: true> + "c.f. StackInterpreter>>stSizeOf: SpurMemoryManager>>lengthOf:format: fixedFieldsOf:format:length:" + <var: #jumpIsBytes type: #'AbstractInstruction *'> + <var: #jumpIsShorts type: #'AbstractInstruction *'> + <var: #jumpIsContext type: #'AbstractInstruction *'> + <var: #jumpArrayDone type: #'AbstractInstruction *'> + <var: #jumpIs32BitLongs type: #'AbstractInstruction *'> + <var: #jumpNotIndexable type: #'AbstractInstruction *'> + <var: #jumpHasFixedFields type: #'AbstractInstruction *'> + <var: #jump32BitLongsDone type: #'AbstractInstruction *'> + <var: #jump64BitLongsDone type: #'AbstractInstruction *'> + + "formatReg := self formatOf: sourceReg" + self genGetFormatOf: sourceReg + into: formatReg + leastSignificantHalfOfBaseHeaderIntoScratch: scratchReg. + + self genGetNumSlotsOf: sourceReg into: destReg. + + "dispatch on format in a combination of highest dynamic frequency order first and convenience. + 0 = 0 sized objects (UndefinedObject True False et al) + 1 = non-indexable objects with inst vars (Point et al) + 2 = indexable objects with no inst vars (Array et al) + 3 = indexable objects with inst vars (MethodContext AdditionalMethodState et al) + 4 = weak indexable objects with inst vars (WeakArray et al) + 5 = weak non-indexable objects with inst vars (ephemerons) (Ephemeron) + 6 unused, reserved for exotic pointer objects? + 7 Forwarded Object, 1st field is pointer, rest of fields are ignored + 8 unused, reserved for exotic non-pointer objects? + 9 64-bit indexable + 10 - 11 32-bit indexable + 12 - 15 16-bit indexable + 16 - 23 byte indexable + 24 - 31 compiled method" + cogit CmpCq: objectMemory firstByteFormat R: formatReg. + jumpIsBytes := cogit JumpGreaterOrEqual: 0. + cogit CmpCq: objectMemory arrayFormat R: formatReg. + jumpArrayDone := cogit JumpZero: 0. + jumpNotIndexable := cogit JumpLess: 0. + cogit CmpCq: objectMemory weakArrayFormat R: formatReg. + jumpHasFixedFields := cogit JumpLessOrEqual: 0. + cogit CmpCq: objectMemory firstShortFormat R: formatReg. + jumpIsShorts := cogit JumpGreaterOrEqual: 0. + cogit CmpCq: objectMemory firstLongFormat R: formatReg. + jumpIs32BitLongs := cogit JumpGreaterOrEqual: 0. + cogit CmpCq: objectMemory sixtyFourBitIndexableFormat R: formatReg. + jump64BitLongsDone := cogit JumpZero: 0. + jumpNotIndexable jmpTarget: cogit Label. + jumpNotIndexable := cogit Jump: 0. + + jumpIsBytes jmpTarget: + (cogit LogicalShiftLeftCq: objectMemory shiftForWord R: destReg). + cogit AndCq: objectMemory wordSize - 1 R: formatReg. + cogit SubR: formatReg R: destReg. + jumpBytesDone := cogit Jump: 0. + + jumpIsShorts jmpTarget: + (cogit LogicalShiftLeftCq: objectMemory shiftForWord - 1 R: destReg). + cogit AndCq: objectMemory wordSize >> 1 - 1 R: formatReg. + cogit SubR: formatReg R: destReg. + jumpShortsDone := cogit Jump: 0. + + jumpIs32BitLongs jmpTarget: + (cogit LogicalShiftLeftCq: objectMemory shiftForWord - 2 R: destReg). + cogit AndCq: objectMemory wordSize >> 2 - 1 R: formatReg. + cogit SubR: formatReg R: destReg. + jump32BitLongsDone := cogit Jump: 0. + + "formatReg contains fmt, now up for grabs. + destReg contains numSlots, precious. + sourceReg must be preserved" + jumpHasFixedFields jmpTarget: + (cogit AndCq: objectMemory classIndexMask R: scratchReg). + cogit MoveR: scratchReg R: formatReg. + cogit CmpCq: ClassMethodContextCompactIndex R: scratchReg. + jumpIsContext := cogit JumpZero: 0. + self genGetClassObjectOfClassIndex: formatReg into: Scratch0Reg scratchReg: scratchReg. + self genLoadSlot: InstanceSpecificationIndex sourceReg: Scratch0Reg destReg: formatReg. + self genConvertSmallIntegerToIntegerInReg: formatReg. + cogit + AndCq: objectMemory fixedFieldsOfClassFormatMask R: formatReg; + SubR: formatReg R: destReg. + + jumpArrayDone jmpTarget: + (jump64BitLongsDone jmpTarget: + (jump32BitLongsDone jmpTarget: + (jumpShortsDone jmpTarget: + (jumpBytesDone jmpTarget: + cogit Label)))). + aBinaryBlock value: jumpNotIndexable value: jumpIsContext! Item was added: + ----- Method: CogObjectRepresentationFor64BitSpur>>genInnerPrimitiveAt: (in category 'primitive generators') ----- + genInnerPrimitiveAt: retNoffset + "Implement the guts of primitiveAt" + | formatReg jumpNotIndexable jumpImmediate jumpBadIndex + jumpBytesDone jumpShortsDone jumpWordsDone jumpFixedFieldsDone + jumpIsBytes jumpIsShorts jumpIsWords jumpIsArray jumpHasFixedFields jumpIsContext + jumpBytesOutOfBounds jumpShortsOutOfBounds jumpWordsOutOfBounds jumpArrayOutOfBounds jumpFixedFieldsOutOfBounds | + <inline: true> + "c.f. StackInterpreter>>stSizeOf: SpurMemoryManager>>lengthOf:format: fixedFieldsOf:format:length:" + <var: #jumpIsBytes type: #'AbstractInstruction *'> + <var: #jumpIsShorts type: #'AbstractInstruction *'> + <var: #jumpBadIndex type: #'AbstractInstruction *'> + <var: #jumpIsContext type: #'AbstractInstruction *'> + <var: #jumpImmediate type: #'AbstractInstruction *'> + <var: #jumpBytesDone type: #'AbstractInstruction *'> + <var: #jumpShortsDone type: #'AbstractInstruction *'> + <var: #jumpWordsDone type: #'AbstractInstruction *'> + <var: #jumpNotIndexable type: #'AbstractInstruction *'> + <var: #jumpHasFixedFields type: #'AbstractInstruction *'> + <var: #jumpFixedFieldsDone type: #'AbstractInstruction *'> + <var: #jumpArrayOutOfBounds type: #'AbstractInstruction *'> + <var: #jumpBytesOutOfBounds type: #'AbstractInstruction *'> + <var: #jumpShortsOutOfBounds type: #'AbstractInstruction *'> + <var: #jumpWordsOutOfBounds type: #'AbstractInstruction *'> + <var: #jumpFixedFieldsOutOfBounds type: #'AbstractInstruction *'> + + jumpImmediate := self genJumpImmediate: ReceiverResultReg. + cogit MoveR: Arg0Reg R: Arg1Reg. + jumpBadIndex := self genJumpNotSmallInteger: Arg0Reg. + jumpBadIndex asInteger = UnimplementedOperation ifTrue: + [cogit MoveR: Arg0Reg R: TempReg. + jumpBadIndex := self genJumpNotSmallIntegerInScratchReg: TempReg]. + self genConvertSmallIntegerToIntegerInReg: Arg1Reg. + cogit SubCq: 1 R: Arg1Reg. "1-rel => 0-rel" + + "formatReg := self formatOf: ReceiverResultReg" + self genGetFormatOf: ReceiverResultReg + into: (formatReg := SendNumArgsReg) + leastSignificantHalfOfBaseHeaderIntoScratch: TempReg. + + self genGetNumSlotsOf: ReceiverResultReg into: ClassReg. + + "dispatch on format in a combination of highest dynamic frequency order first and convenience. + 0 = 0 sized objects (UndefinedObject True False et al) + 1 = non-indexable objects with inst vars (Point et al) + 2 = indexable objects with no inst vars (Array et al) + 3 = indexable objects with inst vars (MethodContext AdditionalMethodState et al) + 4 = weak indexable objects with inst vars (WeakArray et al) + 5 = weak non-indexable objects with inst vars (ephemerons) (Ephemeron) + 6 unused, reserved for exotic pointer objects? + 7 Forwarded Object, 1st field is pointer, rest of fields are ignored + 8 unused, reserved for exotic non-pointer objects? + 9 (?) 64-bit indexable + 10 - 11 32-bit indexable + 12 - 15 16-bit indexable + 16 - 23 byte indexable + 24 - 31 compiled method" + cogit CmpCq: objectMemory firstByteFormat R: formatReg. + jumpIsBytes := cogit JumpAboveOrEqual: 0. + cogit CmpCq: objectMemory arrayFormat R: formatReg. + jumpIsArray := cogit JumpZero: 0. + jumpNotIndexable := cogit JumpBelow: 0. + cogit CmpCq: objectMemory weakArrayFormat R: formatReg. + jumpHasFixedFields := cogit JumpBelowOrEqual: 0. + cogit CmpCq: objectMemory firstShortFormat R: formatReg. + jumpIsShorts := cogit JumpAboveOrEqual: 0. + cogit CmpCq: objectMemory firstLongFormat R: formatReg. + jumpIsWords := cogit JumpAboveOrEqual: 0. + "For now ignore 64-bit indexability." + jumpNotIndexable jmpTarget: cogit Label. + jumpNotIndexable := cogit Jump: 0. + + jumpIsBytes jmpTarget: + (cogit LogicalShiftLeftCq: objectMemory shiftForWord R: ClassReg). + cogit AndCq: objectMemory wordSize - 1 R: formatReg. + cogit SubR: formatReg R: ClassReg; + CmpR: Arg1Reg R: ClassReg. + jumpBytesOutOfBounds := cogit JumpBelowOrEqual: 0. + cogit AddCq: objectMemory baseHeaderSize R: Arg1Reg. + cogit MoveXbr: Arg1Reg R: ReceiverResultReg R: ReceiverResultReg. + self genConvertIntegerToSmallIntegerInReg: ReceiverResultReg. + jumpBytesDone := cogit Jump: 0. + + jumpIsShorts jmpTarget: + (cogit LogicalShiftLeftCq: objectMemory shiftForWord - 1 R: ClassReg). + cogit AndCq: 1 R: formatReg. + cogit SubR: formatReg R: ClassReg; + CmpR: Arg1Reg R: ClassReg. + jumpShortsOutOfBounds := cogit JumpBelowOrEqual: 0. + cogit AddR: Arg1Reg R: ReceiverResultReg. + cogit MoveM16: objectMemory baseHeaderSize r: ReceiverResultReg R: ReceiverResultReg. + self genConvertIntegerToSmallIntegerInReg: ReceiverResultReg. + jumpShortsDone := cogit Jump: 0. + + jumpIsWords jmpTarget: + (cogit CmpR: Arg1Reg R: ClassReg). + jumpWordsOutOfBounds := cogit JumpBelowOrEqual: 0. + cogit AddCq: objectMemory baseHeaderSize >> (objectMemory shiftForWord - 1) R: Arg1Reg. + cogit MoveX32r: Arg1Reg R: ReceiverResultReg R: TempReg. + cogit MoveR: TempReg R: ReceiverResultReg. + self genConvertIntegerToSmallIntegerInReg: ReceiverResultReg. + jumpWordsDone := cogit Jump: 0. + + jumpHasFixedFields jmpTarget: + (cogit AndCq: objectMemory classIndexMask R: TempReg). + cogit MoveR: TempReg R: formatReg. + cogit CmpCq: ClassMethodContextCompactIndex R: TempReg. + jumpIsContext := cogit JumpZero: 0. + self genGetClassObjectOfClassIndex: formatReg into: Scratch0Reg scratchReg: TempReg. + self genLoadSlot: InstanceSpecificationIndex sourceReg: Scratch0Reg destReg: formatReg. + self genConvertSmallIntegerToIntegerInReg: formatReg. + cogit + AndCq: objectMemory fixedFieldsOfClassFormatMask R: formatReg; + SubR: formatReg R: ClassReg; + CmpR: Arg1Reg R: ClassReg. + jumpFixedFieldsOutOfBounds := cogit JumpBelowOrEqual: 0. + "index is (formatReg (fixed fields) + Arg1Reg (0-rel index)) * wordSize + baseHeaderSize" + cogit AddR: formatReg R: Arg1Reg. + cogit AddCq: objectMemory baseHeaderSize >> objectMemory shiftForWord R: Arg1Reg. + cogit MoveXwr: Arg1Reg R: ReceiverResultReg R: ReceiverResultReg. + jumpFixedFieldsDone := cogit Jump: 0. + + jumpIsArray jmpTarget: + (cogit CmpR: Arg1Reg R: ClassReg). + jumpArrayOutOfBounds := cogit JumpBelowOrEqual: 0. + cogit AddCq: objectMemory baseHeaderSize >> objectMemory shiftForWord R: Arg1Reg. + cogit MoveXwr: Arg1Reg R: ReceiverResultReg R: ReceiverResultReg. + + jumpFixedFieldsDone jmpTarget: + (jumpWordsDone jmpTarget: + (jumpShortsDone jmpTarget: + (jumpBytesDone jmpTarget: + (cogit RetN: retNoffset)))). + + jumpFixedFieldsOutOfBounds jmpTarget: + (jumpArrayOutOfBounds jmpTarget: + (jumpBytesOutOfBounds jmpTarget: + (jumpShortsOutOfBounds jmpTarget: + (jumpWordsOutOfBounds jmpTarget: + (jumpNotIndexable jmpTarget: + (jumpIsContext jmpTarget: + (jumpBadIndex jmpTarget: + (jumpImmediate jmpTarget: cogit Label)))))))). + + ^0! Item was added: + ----- Method: CogObjectRepresentationForSpur>>genGetNumSlotsOf:into: (in category 'compile abstract instructions') ----- + genGetNumSlotsOf: srcReg into: destReg + "Get the size in word-sized slots of the object in srcReg into destReg. + srcReg may equal destReg." + <var: #jmp type: #'AbstractInstruction *'> + | jmp | + self assert: srcReg ~= destReg. + self genGetRawSlotSizeOfNonImm: srcReg into: destReg. + cogit CmpCq: objectMemory numSlotsMask R: destReg. + jmp := cogit JumpLess: 0. + self genGetOverflowSlotsOf: srcReg into: destReg. + jmp jmpTarget: cogit Label. + ^0! Item was changed: ----- Method: CogObjectRepresentationForSpur>>genGetRawSlotSizeOfNonImm:into: (in category 'compile abstract instructions') ----- genGetRawSlotSizeOfNonImm: sourceReg into: destReg "The raw numSlots field is the most significant byte of the 64-bit header word. MoveMbrR zero-extends." cogit backEnd byteReadsZeroExtend ifFalse: + [cogit MoveCq: 0 R: destReg]. - [self MoveCq: 0 R: destReg]. cogit MoveMb: 7 r: sourceReg R: destReg. ^0! Item was changed: ----- Method: CogRTLOpcodes class>>initialize (in category 'class initialization') ----- initialize "Abstract opcodes are a compound of a one word operation specifier and zero or more operand type specifiers. e.g. MoveRR is the Move opcode with two register operand specifiers and defines a move register to register instruction from operand 0 to operand 1. The word and register size is assumed to be either 32-bits on a 32-bit architecture or 64-bits on a 64-bit architecture. The abstract machine is mostly a 2 address machine with the odd three address instruction added to better exploit RISCs. (self initialize) The operand specifiers are R - general purpose register Rd - double-precision floating-point register Cq - a `quick' constant that can be encoded in the minimum space possible. Cw - a constant with word size where word is the default operand size for the Smalltalk VM, 32-bits for a 32-bit VM, 64-bits for a 64-bit VM. The generated constant must occupy the default number of bits. This allows e.g. a garbage collector to update the value without invalidating the code. C32 - a constant with 32 bit size. The generated constant must occupy 32 bits. C64 - a constant with 64 bit size. The generated constant must occupy 64 bits. Aw - memory word at an absolute address Ab - memory byte at an absolute address Mwr - memory word whose address is at a constant offset from an address in a register Mbr - memory byte whose address is at a constant offset from an address in a register (zero-extended on read) M16r - memory 16-bit halfword whose address is at a constant offset from an address in a register M32r - memory 32-bit halfword whose address is at a constant offset from an address in a register M64r - memory 64-bit doubleword whose address is at a constant offset from an address in a register XbrR - memory word whose address is r * byte size away from an address in a register X16rR - memory word whose address is r * (2 bytes size) away from an address in a register + X32rR - memory word whose address is r * (4 bytes size) away from an address in a register XwrR - memory word whose address is r * word size away from an address in a register XowrR - memory word whose address is (r * word size) + o away from an address in a register (scaled indexed) An alternative would be to decouple opcodes from operands, e.g. Move := 1. Add := 2. Sub := 3... RegisterOperand := 1. ConstantQuickOperand := 2. ConstantWordOperand := 3... But not all combinations make sense and even fewer are used so we stick with the simple compound approach. The assumption is that comparison and arithmetic instructions set condition codes and that move instructions leave the condition codes unaffected. In particular LoadEffectiveAddressMwrR does not set condition codes although it can be used to do arithmetic. Not all of the definitions in opcodeDefinitions below are implemented. In particular we do not implement the XowrR scaled index addressing mode since it requires 4 operands. Note that there are no generic division instructions defined, but a processor may define some. Branch/Call ranges. Jump[Cond] can be generated as short as possible. Call/Jump[Cond]Long must be generated in the same number of bytes irrespective of displacement since their targets may be updated, but they need only span 16Mb, the maximum size of the code zone. This allows e.g. ARM to use single-word call and jump instructions for most calls and jumps. CallFull/JumpFull must also be generated in the same number of bytes irrespective of displacement for the same reason, but they must be able to span the full (32-bit or 64-bit) address space because they are used to call code in the C runtime, which may be distant from the code zone. CallFull/JumpFull are allowed to use the cResultRegister as a scratch if required (e.g. on x64 where there is no direct 64-bit call or jump). Byte reads. If the concrete compiler class answers true to byteReadsZeroExtend then byte reads must zero-extend the byte read into the destination register. If not, the other bits of the register should be left undisturbed and the Cogit will add an instruction to zero the register as required. Under no circumstances should byte reads sign-extend. 16-bit (and on 64-bits, 32-bit) reads. These /are/ expected to always zero-extend." | opcodeNames refs | "A small fixed set of abstract registers are defined and used in code generation for Smalltalk code, and executes on stack pages in the stack zone. These are mapped to processor-specific registers by concreteRegister:" FPReg := -1. "A frame pointer is used for Smalltalk frames." SPReg := -2. ReceiverResultReg := -3. "The receiver at point of send, and return value of a send" TempReg := -4. ClassReg := -5. "The inline send cache class tag is in this register, loaded at the send site" SendNumArgsReg := -6. "Sends > 2 args set the arg count in this reg" Arg0Reg := -7. "In the StackToRegisterMappingCogit 1 & 2 arg sends marshall into these registers." Arg1Reg := -8. "A small fixed set of abstract scratch registers for register-rich machines (ARM can use 1, x64 can use 6)." Scratch0Reg := -9. Scratch1Reg := -10. Scratch2Reg := -11. Scratch3Reg := -12. Scratch4Reg := -13. Scratch5Reg := -14. Scratch6Reg := -15. Scratch7Reg := -16. "RISC-specific registers" LinkReg := -17. RISCTempReg := -18. "Used to synthesize CISC instructions from multiple RISC instructions." PCReg := -19. VarBaseReg := -20. "If useful, points to base of interpreter variables." "Floating-point registers" DPFPReg0 := -21. DPFPReg1 := -22. DPFPReg2 := -23. DPFPReg3 := -24. DPFPReg4 := -25. DPFPReg5 := -26. DPFPReg6 := -27. DPFPReg7 := -28. opcodeNames := #("Noops & Pseudo Ops" Label Literal "a word-sized literal" AlignmentNops FillBytesFrom "output operand 0's worth of bytes from the address in operand 1" Fill8 "output a byte's worth of bytes with operand 0" Fill16 "output two byte's worth of bytes with operand 0" Fill32 "output four byte's worth of bytes with operand 0" FillFromWord "output BytesPerWord's worth of bytes with operand 0 + operand 1" Nop "Control" Call "call within the code zone" CallFull "call anywhere within the full address space" RetN JumpR "Not a regular jump, i.e. not pc dependent." Stop "Halt the processor" "N.B. Jumps are contiguous. Long and Full jumps are contigiuous within them. See FirstJump et al below" JumpFull "Jump anywhere within the address space" JumpLong "Jump anywhere within the 16mb code zone." JumpLongZero "a.k.a. JumpLongEqual" JumpLongNonZero "a.k.a. JumpLongNotEqual" Jump "short jumps; can be encoded in as few bytes as possible; will not be disturbed by GC or relocation." JumpZero "a.k.a. JumpEqual" JumpNonZero "a.k.a. JumpNotEqual" JumpNegative JumpNonNegative JumpOverflow JumpNoOverflow JumpCarry JumpNoCarry JumpLess "signed" JumpGreaterOrEqual JumpGreater JumpLessOrEqual JumpBelow "unsigned" JumpAboveOrEqual JumpAbove JumpBelowOrEqual JumpFPEqual JumpFPNotEqual JumpFPLess JumpFPLessOrEqual JumpFPGreater JumpFPGreaterOrEqual JumpFPOrdered JumpFPUnordered "Data Movement; destination is always last operand" MoveRR MoveAwR MoveRAw MoveAbR MoveRAb MoveMwrR MoveRMwr MoveXwrRR MoveRXwrR MoveXowrR MoveRXowr MoveM16rR MoveRM16r MoveX16rRR MoveRX16rR MoveM32rR MoveRM32r MoveX32rRR MoveRX32rR MoveMbrR MoveRMbr MoveXbrRR MoveRXbrR MoveCqR MoveCwR MoveC32R MoveC64R MoveRdRd MoveM64rRd MoveRdM64r PopR PushR PushCq PushCw PrefetchAw "Arithmetic; destination is always last operand except Cmp; CmpXR is SubRX with no update of result" LoadEffectiveAddressMwrR LoadEffectiveAddressXowrR "Variants of add/multiply" NegateR "2's complement negation" ArithmeticShiftRightCqR ArithmeticShiftRightRR LogicalShiftRightCqR LogicalShiftRightRR LogicalShiftLeftCqR LogicalShiftLeftRR CmpRR AddRR SubRR AndRR OrRR XorRR CmpCqR AddCqR SubCqR AndCqR OrCqR TstCqR XorCqR CmpCwR CmpC32R AddCwR SubCwR AndCwR OrCwR XorCwR AndCqRR CmpRdRd AddRdRd SubRdRd MulRdRd DivRdRd SqrtRd "Conversion" ConvertRRd LastRTLCode). "Magic auto declaration. Add to the classPool any new variables and nuke any obsolete ones, and assign values" "Find the variables directly referenced by this method" refs := (thisContext method literals select: [:l| l isVariableBinding and: [classPool includesKey: l key]]) collect: [:ea| ea key]. "Move to Undeclared any opcodes in classPool not in opcodes or this method." (classPool keys reject: [:k| (opcodeNames includes: k) or: [refs includes: k]]) do: [:k| Undeclared declare: k from: classPool]. "Declare as class variables and number elements of opcodeArray above" opcodeNames withIndexDo: [:classVarName :value| self classPool declare: classVarName from: Undeclared; at: classVarName put: value]. "For CogAbstractInstruction>>isJump etc..." FirstJump := JumpFull. LastJump := JumpFPUnordered. FirstShortJump := Jump. "And now initialize the backends; they add their own opcodes and hence these must be reinitialized." (Smalltalk classNamed: #CogAbstractInstruction) ifNotNil: [:cogAbstractInstruction| cogAbstractInstruction allSubclasses do: [:sc| sc initialize]]! Item was changed: ----- Method: CogX64Compiler>>computeMaximumSize (in category 'generate machine code') ----- computeMaximumSize "Compute the maximum size for each opcode. This allows jump offsets to be determined, provided that all backward branches are long branches." "N.B. The ^N forms are to get around the bytecode compiler's long branch limits which are exceeded when each case jumps around the otherwise." opcode caseOf: { "Noops & Pseudo Ops" [Label] -> [^0]. [AlignmentNops] -> [^(operands at: 0) - 1]. [Fill16] -> [^2]. [Fill32] -> [^4]. [FillFromWord] -> [^4]. [Nop] -> [^1]. "Specific Control/Data Movement" [CDQ] -> [^2]. [IDIVR] -> [^3]. [IMULRR] -> [^4]. [CPUID] -> [^2]. [CMPXCHGAwR] -> [^8]. [CMPXCHGMwrR] -> [^9]. [LFENCE] -> [^3]. [MFENCE] -> [^3]. [SFENCE] -> [^3]. [LOCK] -> [^1]. "[XCHGAwR] -> [^6]. [XCHGMwrR] -> [^7]." [XCHGRR] -> [^((self concreteRegister: (operands at: 0)) = RAX or: [(self concreteRegister: (operands at: 1)) = RAX]) ifTrue: [2] ifFalse: [3]]. "Control" [CallFull] -> [^12]. [Call] -> [^5]. [JumpR] -> [^2]. [JumpFull] -> [self resolveJumpTarget. ^12]. [JumpLong] -> [self resolveJumpTarget. ^5]. [Jump] -> [self resolveJumpTarget. ^5]. [JumpZero] -> [self resolveJumpTarget. ^6]. [JumpNonZero] -> [self resolveJumpTarget. ^6]. [JumpNegative] -> [self resolveJumpTarget. ^6]. [JumpNonNegative] -> [self resolveJumpTarget. ^6]. [JumpOverflow] -> [self resolveJumpTarget. ^6]. [JumpNoOverflow] -> [self resolveJumpTarget. ^6]. [JumpCarry] -> [self resolveJumpTarget. ^6]. [JumpNoCarry] -> [self resolveJumpTarget. ^6]. [JumpLess] -> [self resolveJumpTarget. ^6]. [JumpGreaterOrEqual] -> [self resolveJumpTarget. ^6]. [JumpGreater] -> [self resolveJumpTarget. ^6]. [JumpLessOrEqual] -> [self resolveJumpTarget. ^6]. [JumpBelow] -> [self resolveJumpTarget. ^6]. [JumpAboveOrEqual] -> [self resolveJumpTarget. ^6]. [JumpAbove] -> [self resolveJumpTarget. ^6]. [JumpBelowOrEqual] -> [self resolveJumpTarget. ^6]. [JumpLongZero] -> [self resolveJumpTarget. ^6]. [JumpLongNonZero] -> [self resolveJumpTarget. ^6]. [JumpFPEqual] -> [self resolveJumpTarget. ^6]. [JumpFPNotEqual] -> [self resolveJumpTarget. ^6]. [JumpFPLess] -> [self resolveJumpTarget. ^6]. [JumpFPGreaterOrEqual] -> [self resolveJumpTarget. ^6]. [JumpFPGreater] -> [self resolveJumpTarget. ^6]. [JumpFPLessOrEqual] -> [self resolveJumpTarget. ^6]. [JumpFPOrdered] -> [self resolveJumpTarget. ^6]. [JumpFPUnordered] -> [self resolveJumpTarget. ^6]. [RetN] -> [^(operands at: 0) = 0 ifTrue: [1] ifFalse: [3]]. [Stop] -> [^1]. "Arithmetic" [AddCqR] -> [^self computeSizeOfArithCqR]. [AndCqR] -> [^self computeSizeOfArithCqR]. [CmpCqR] -> [^self computeSizeOfArithCqR]. [OrCqR] -> [^self computeSizeOfArithCqR]. [SubCqR] -> [^self computeSizeOfArithCqR]. [TstCqR] -> [^self computeSizeOfArithCqR]. [AddCwR] -> [^self computeSizeOfArithCwR]. [AndCwR] -> [^self computeSizeOfArithCwR]. [CmpCwR] -> [^self computeSizeOfArithCwR]. [OrCwR] -> [^self computeSizeOfArithCwR]. [SubCwR] -> [^self computeSizeOfArithCwR]. [XorCwR] -> [^self computeSizeOfArithCwR]. [AddRR] -> [^3]. [AndRR] -> [^3]. [CmpRR] -> [^3]. [OrRR] -> [^3]. [XorRR] -> [^3]. [SubRR] -> [^3]. [NegateR] -> [^3]. [LoadEffectiveAddressMwrR] -> [^((self isQuick: (operands at: 0)) ifTrue: [4] ifFalse: [7]) + (((self concreteRegister: (operands at: 1)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. [LogicalShiftLeftCqR] -> [^self computeShiftCqRegSize]. [LogicalShiftRightCqR] -> [^self computeShiftCqRegSize]. [ArithmeticShiftRightCqR] -> [^self computeShiftCqRegSize]. [LogicalShiftLeftRR] -> [^self computeShiftRRSize]. [LogicalShiftRightRR] -> [^self computeShiftRRSize]. [ArithmeticShiftRightRR] -> [^self computeShiftRRSize]. [AddRdRd] -> [^4]. [CmpRdRd] -> [^4]. [SubRdRd] -> [^4]. [MulRdRd] -> [^4]. [DivRdRd] -> [^4]. [SqrtRd] -> [^4]. "Data Movement" [MoveCqR] -> [^(operands at: 0) = 0 ifTrue: [3] ifFalse: [(self is32BitSignedImmediate: (operands at: 0)) ifTrue: [7] ifFalse: [self moveCwRByteSize]]]. [MoveCwR] -> [^(self inCurrentCompilation: (operands at: 0)) ifTrue: [7] ifFalse: [self moveCwRByteSize]]. [MoveC32R] -> [^7]. "N.B. Always inlined." [MoveRR] -> [^3]. [MoveRdRd] -> [^4]. [MoveAwR] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [7] ifFalse: [(self concreteRegister: (operands at: 1)) = RAX ifTrue: [10] ifFalse: [14]]]. [MoveRAw] -> [^(self isAddressRelativeToVarBase: (operands at: 1)) ifTrue: [7] ifFalse: [(self concreteRegister: (operands at: 0)) = RAX ifTrue: [10] ifFalse: [14]]]. [MoveAbR] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [7] ifFalse: [(self concreteRegister: (operands at: 1)) = RAX ifTrue: [10] ifFalse: [14]]]. [MoveRAb] -> [^(self isAddressRelativeToVarBase: (operands at: 1)) ifTrue: [7] ifFalse: [(self concreteRegister: (operands at: 0)) = RAX ifTrue: [10] ifFalse: [14]]]. [MoveRMwr] -> [self assert: (self is32BitSignedImmediate: (operands at: 1)). ^((self isQuick: (operands at: 1)) ifTrue: [((operands at: 1) = 0 and: [((self concreteRegister: (operands at: 2)) bitAnd: 7) ~= RBP]) ifTrue: [3] ifFalse: [4]] ifFalse: [7]) + (((self concreteRegister: (operands at: 2)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. "[MoveRdM64r] -> [^((self isQuick: (operands at: 1)) ifTrue: [5] ifFalse: [8]) + ((self concreteRegister: (operands at: 2)) = ESP ifTrue: [1] ifFalse: [0])]." [MoveMbrR] -> [self assert: (self is32BitSignedImmediate: (operands at: 0)). ^((self isQuick: (operands at: 0)) ifTrue: [((operands at: 0) = 0 and: [((self concreteRegister: (operands at: 1)) bitAnd: 7) ~= RBP]) ifTrue: [3] ifFalse: [4]] ifFalse: [7]) + (((self concreteRegister: (operands at: 1)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. [MoveRMbr] -> [self assert: (self is32BitSignedImmediate: (operands at: 1)). ^((self isQuick: (operands at: 1)) ifTrue: [((operands at: 1) = 0 and: [((self concreteRegister: (operands at: 0)) bitAnd: 7) ~= RBP]) ifTrue: [3] ifFalse: [4]] ifFalse: [7]) + (((self concreteRegister: (operands at: 2)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. [MoveM16rR] -> [^((self isQuick: (operands at: 0)) ifTrue: [((operands at: 0) = 0 and: [((self concreteRegister: (operands at: 1)) bitAnd: 7) ~= RBP]) ifTrue: [4] ifFalse: [5]] ifFalse: [8]) + (((self concreteRegister: (operands at: 1)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. "[MoveM64rRd] -> [^((self isQuick: (operands at: 0)) ifTrue: [5] ifFalse: [8]) + ((self concreteRegister: (operands at: 1)) = ESP ifTrue: [1] ifFalse: [0])]." [MoveMwrR] -> [self assert: (self is32BitSignedImmediate: (operands at: 0)). ^((self isQuick: (operands at: 0)) ifTrue: [((operands at: 0) = 0 and: [((self concreteRegister: (operands at: 1)) bitAnd: 7) ~= RBP]) ifTrue: [3] ifFalse: [4]] ifFalse: [7]) + (((self concreteRegister: (operands at: 1)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. [MoveXbrRR] -> [self assert: (self concreteRegister: (operands at: 0)) ~= RSP. ^((self concreteRegister: (operands at: 1)) bitAnd: 7) = RBP ifTrue: [5] ifFalse: [4]]. [MoveRXbrR] -> [self assert: (self concreteRegister: (operands at: 1)) ~= RSP. ^(((self concreteRegister: (operands at: 0)) < 8 and: [(self concreteRegister: (operands at: 1)) < 8 and: [(self concreteRegister: (operands at: 2)) < 8]]) ifTrue: [3] ifFalse: [4]) + (((self concreteRegister: (operands at: 2)) bitAnd: 7) = RBP ifTrue: [1] ifFalse: [0])]. [MoveXwrRR] -> [self assert: (self concreteRegister: (operands at: 0)) ~= RSP. ^((self concreteRegister: (operands at: 1)) = RBP or: [(self concreteRegister: (operands at: 1)) = R13]) ifTrue: [5] ifFalse: [4]]. [MoveRXwrR] -> [self assert: (self concreteRegister: (operands at: 1)) ~= RSP. ^((self concreteRegister: (operands at: 2)) = RBP or: [(self concreteRegister: (operands at: 2)) = R13]) ifTrue: [5] ifFalse: [4]]. + [MoveX32rRR] -> [self assert: (self concreteRegister: (operands at: 0)) ~= RSP. + ^(((self concreteRegister: (operands at: 1)) = RBP + or: [(self concreteRegister: (operands at: 1)) = R13]) + ifTrue: [7] + ifFalse: [6]) + + (((self concreteRegister: (operands at: 0)) > 7 + or: [(self concreteRegister: (operands at: 1)) > 7 + or: [(self concreteRegister: (operands at: 2)) > 7]]) + ifTrue: [1] + ifFalse: [0])]. [PopR] -> [^(self concreteRegister: (operands at: 0)) < 8 ifTrue: [1] ifFalse: [2]]. [PushR] -> [^(self concreteRegister: (operands at: 0)) < 8 ifTrue: [1] ifFalse: [2]]. [PushCq] -> [^(self isQuick: (operands at: 0)) ifTrue: [2] ifFalse: [5]]. [PushCw] -> [^(self inCurrentCompilation: (operands at: 0)) ifTrue: [9] ifFalse: [self pushCwByteSize]]. [PrefetchAw] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [7] ifFalse: [0]]. "Conversion" "[ConvertRRd] -> [^4]" }. ^0 "to keep C compiler quiet"! Item was changed: ----- Method: CogX64Compiler>>concretizeIDIVR (in category 'generate machine code') ----- concretizeIDIVR "Will get inlined into concretizeAt: switch." <inline: true> | regDivisor | regDivisor := self concreteRegister: (operands at: 0). machineCode + at: 0 put: (self rexR: 0 x: 0 b: regDivisor); - at: 0 put: (self rexR: regDivisor x: 0 b: 0); at: 1 put: 16rF7; at: 2 put: (self mod: ModReg RM: regDivisor RO: 7). ^machineCodeSize := 3! Item was added: + ----- Method: CogX64Compiler>>concretizeMoveX32rRR (in category 'generate machine code') ----- + concretizeMoveX32rRR + "MoveX32rRR is expected to zero-extend, so explicitly zero the destination." + | index base dest offset | + index := self concreteRegister: (operands at: 0). + base := self concreteRegister: (operands at: 1). + dest := self concreteRegister: (operands at: 2). + machineCode + at: 0 put: (self rexR: dest x: 0 b: dest); + at: 1 put: 16r31; + at: 2 put: (self mod: ModReg RM: dest RO: dest). + (index > 7 or: [base > 7 or: [dest > 7]]) + ifTrue: + [machineCode at: 3 put: (self rexw: false r: dest x: index b: base). + offset := 1] + ifFalse: + [offset := 0]. + (base bitAnd: 7) ~= RBP ifTrue: + [machineCode + at: offset + 3 put: 16r8B; + at: offset + 4 put: (self mod: ModRegInd RM: 4 RO: dest); + at: offset + 5 put: (self s: SIB4 i: index b: base). + ^machineCodeSize := offset + 6]. + machineCode + at: offset + 3 put: 16r8B; + at: offset + 4 put: (self mod: ModRegRegDisp8 RM: 4 RO: dest); + at: offset + 5 put: (self s: SIB4 i: index b: base); + at: offset + 6 put: 0. + ^machineCodeSize := offset + 7! Item was changed: ----- Method: CogX64Compiler>>dispatchConcretize (in category 'generate machine code') ----- dispatchConcretize "Attempt to generate concrete machine code for the instruction at address. This is the inner dispatch of concretizeAt: actualAddress which exists only to get around the branch size limits in the SqueakV3 (blue book derived) bytecode set." <returnTypeC: #void> opcode caseOf: { "Noops & Pseudo Ops" [Label] -> [^self concretizeLabel]. [AlignmentNops] -> [^self concretizeAlignmentNops]. [Fill16] -> [^self concretizeFill16]. [Fill32] -> [^self concretizeFill32]. [FillFromWord] -> [^self concretizeFillFromWord]. [Nop] -> [^self concretizeNop]. "Specific Control/Data Movement" [CDQ] -> [^self concretizeCDQ]. [IDIVR] -> [^self concretizeIDIVR]. [IMULRR] -> [^self concretizeMulRR]. [CPUID] -> [^self concretizeCPUID]. [CMPXCHGAwR] -> [^self concretizeCMPXCHGAwR]. [CMPXCHGMwrR] -> [^self concretizeCMPXCHGMwrR]. [LFENCE] -> [^self concretizeFENCE: 5]. [MFENCE] -> [^self concretizeFENCE: 6]. [SFENCE] -> [^self concretizeFENCE: 7]. [LOCK] -> [^self concretizeLOCK]. [XCHGAwR] -> [^self concretizeXCHGAwR]. [XCHGMwrR] -> [^self concretizeXCHGMwrR]. [XCHGRR] -> [^self concretizeXCHGRR]. "Control" [Call] -> [^self concretizeCall]. [CallFull] -> [^self concretizeCallFull]. [JumpR] -> [^self concretizeJumpR]. [JumpFull] -> [^self concretizeJumpFull]. [JumpLong] -> [^self concretizeJumpLong]. [JumpLongZero] -> [^self concretizeConditionalJump: 16r4]. [JumpLongNonZero] -> [^self concretizeConditionalJump: 16r5]. [Jump] -> [^self concretizeJump]. "Table B-1 Intel¬Æ 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture" [JumpZero] -> [^self concretizeConditionalJump: 16r4]. [JumpNonZero] -> [^self concretizeConditionalJump: 16r5]. [JumpNegative] -> [^self concretizeConditionalJump: 16r8]. [JumpNonNegative] -> [^self concretizeConditionalJump: 16r9]. [JumpOverflow] -> [^self concretizeConditionalJump: 16r0]. [JumpNoOverflow] -> [^self concretizeConditionalJump: 16r1]. [JumpCarry] -> [^self concretizeConditionalJump: 16r2]. [JumpNoCarry] -> [^self concretizeConditionalJump: 16r3]. [JumpLess] -> [^self concretizeConditionalJump: 16rC]. [JumpGreaterOrEqual] -> [^self concretizeConditionalJump: 16rD]. [JumpGreater] -> [^self concretizeConditionalJump: 16rF]. [JumpLessOrEqual] -> [^self concretizeConditionalJump: 16rE]. [JumpBelow] -> [^self concretizeConditionalJump: 16r2]. [JumpAboveOrEqual] -> [^self concretizeConditionalJump: 16r3]. [JumpAbove] -> [^self concretizeConditionalJump: 16r7]. [JumpBelowOrEqual] -> [^self concretizeConditionalJump: 16r6]. [JumpFPEqual] -> [^self concretizeConditionalJump: 16r4]. [JumpFPNotEqual] -> [^self concretizeConditionalJump: 16r5]. [JumpFPLess] -> [^self concretizeConditionalJump: 16r2]. [JumpFPGreaterOrEqual] -> [^self concretizeConditionalJump: 16r3]. [JumpFPGreater] -> [^self concretizeConditionalJump: 16r7]. [JumpFPLessOrEqual] -> [^self concretizeConditionalJump: 16r6]. [JumpFPOrdered] -> [^self concretizeConditionalJump: 16rB]. [JumpFPUnordered] -> [^self concretizeConditionalJump: 16rA]. [RetN] -> [^self concretizeRetN]. [Stop] -> [^self concretizeStop]. "Arithmetic" [AddCqR] -> [^self concretizeArithCqRWithRO: 0 raxOpcode: 15r05]. [AddCwR] -> [^self concretizeArithCwR: 16r03]. [AddRR] -> [^self concretizeAddRR]. [AddRdRd] -> [^self concretizeSEE2OpRdRd: 16r58]. [AndCqR] -> [^self concretizeArithCqRWithRO: 4 raxOpcode: 16r25]. [AndCwR] -> [^self concretizeArithCwR: 16r23]. [AndRR] -> [^self concretizeAndRR]. [TstCqR] -> [^self concretizeTstCqR]. [CmpCqR] -> [^self concretizeArithCqRWithRO: 7 raxOpcode: 16r3D]. [CmpCwR] -> [^self concretizeArithCwR: 16r39]. [CmpRR] -> [^self concretizeCmpRR]. [CmpRdRd] -> [^self concretizeCmpRdRd]. [DivRdRd] -> [^self concretizeSEE2OpRdRd: 16r5E]. [MulRdRd] -> [^self concretizeSEE2OpRdRd: 16r59]. [OrCqR] -> [^self concretizeArithCqRWithRO: 1 raxOpcode: 16r0D]. [OrCwR] -> [^self concretizeArithCwR: 16r0B]. [OrRR] -> [^self concretizeOrRR]. [SubCqR] -> [^self concretizeArithCqRWithRO: 5 raxOpcode: 16r2D]. [SubCwR] -> [^self concretizeArithCwR: 16r2B]. [SubRR] -> [^self concretizeSubRR]. [SubRdRd] -> [^self concretizeSEE2OpRdRd: 16r5C]. [SqrtRd] -> [^self concretizeSqrtRd]. [XorCwR] -> [^self concretizeArithCwR: 16r33]. [XorRR] -> [^self concretizeXorRR]. [NegateR] -> [^self concretizeNegateR]. [LoadEffectiveAddressMwrR] -> [^self concretizeLoadEffectiveAddressMwrR]. [ArithmeticShiftRightCqR] -> [^self concretizeShiftCqRegOpcode: 7]. [LogicalShiftRightCqR] -> [^self concretizeShiftCqRegOpcode: 5]. [LogicalShiftLeftCqR] -> [^self concretizeShiftCqRegOpcode: 4]. [ArithmeticShiftRightRR] -> [^self concretizeShiftRegRegOpcode: 7]. [LogicalShiftLeftRR] -> [^self concretizeShiftRegRegOpcode: 4]. "Data Movement" [MoveCqR] -> [^self concretizeMoveCqR]. [MoveCwR] -> [^self concretizeMoveCwR]. [MoveC32R] -> [^self concretizeMoveC32R]. [MoveRR] -> [^self concretizeMoveRR]. [MoveAwR] -> [^self concretizeMoveAwR]. [MoveRAw] -> [^self concretizeMoveRAw]. [MoveAbR] -> [^self concretizeMoveAbR]. [MoveRAb] -> [^self concretizeMoveRAb]. [MoveMbrR] -> [^self concretizeMoveMbrR]. [MoveRMbr] -> [^self concretizeMoveRMbr]. [MoveM16rR] -> [^self concretizeMoveM16rR]. [MoveM64rRd] -> [^self concretizeMoveM64rRd]. [MoveMwrR] -> [^self concretizeMoveMwrR]. [MoveXbrRR] -> [^self concretizeMoveXbrRR]. [MoveRXbrR] -> [^self concretizeMoveRXbrR]. [MoveXwrRR] -> [^self concretizeMoveXwrRR]. [MoveRXwrR] -> [^self concretizeMoveRXwrR]. + [MoveX32rRR] -> [^self concretizeMoveX32rRR]. [MoveRMwr] -> [^self concretizeMoveRMwr]. [MoveRdM64r] -> [^self concretizeMoveRdM64r]. [PopR] -> [^self concretizePopR]. [PushR] -> [^self concretizePushR]. [PushCq] -> [^self concretizePushCq]. [PushCw] -> [^self concretizePushCw]. [PrefetchAw] -> [^self concretizePrefetchAw]. "Conversion" [ConvertRRd] -> [^self concretizeConvertRRd] }! Item was added: + ----- Method: CogX64CompilerForTests class>>doubleWordRegistersWithNamesDo: (in category 'test support') ----- + doubleWordRegistersWithNamesDo: aBinaryBlock + self registers + with: #('%eax' '%ecx' '%edx' '%ebx' '%esp' '%ebp' '%esi' '%edi' '%r8d' '%r9d' '%r10d' '%r11d' '%r12d' '%r13d' '%r14d' '%r15d') + do: aBinaryBlock! Item was changed: ----- Method: CogX64CompilerTests>>testDivQuoRem (in category 'tests') ----- testDivQuoRem "| failures ops | failures := Set new. [ops := (CogX64CompilerTests new testDivQuoRem)] on: TestResult failure do: [:ex| | c | c := ex signalerContext. [c tempNames includes: 'op'] whileFalse: [c := c sender]. failures add: (c namedTempAt: (c tempNames indexOf: 'op')). ex resume]. { ops size. failures size. ops asSortedCollection asArray. failures asSortedCollection asArray}" | map compiler memory ops | map := Dictionary new. compiler := self gen: nil. memory := ByteArray new: 4096 * 2. ops := Set new. self concreteCompilerClass dataRegistersWithAccessorsExcept: #(rbp rsp) do: [:sreg :srget :srset| self concreteCompilerClass dataRegistersWithAccessorsExcept: { #rbp. #rsp. srget } do: [:dreg :drget :drset| | instructions op | self concreteCompilerClass dataRegistersWithAccessorsExcept: #(rbp rsp) do: [:qreg :qrget :qrset| self concreteCompilerClass dataRegistersWithAccessorsExcept: { #rbp. #rsp. qrget } do: [:rreg :rrget :rrset| self resetGen. op := qrget, ' := ', drget, ' quo: ', srget, '. ', rrget, ' := ', drget, ' rem: ', srget. ops add: op. compiler genDivR: sreg R: dreg Quo: qreg Rem: rreg. instructions := self generateInstructions. memory atAllPut: 0; replaceFrom: 1 to: instructions size with: instructions startingAt: 1; at: instructions size + 1 put: self processor nopOpcode. #(-768 -456 -123 123 456 789) with: #(987 654 321 -321 -654 -987) do: [:dd :dv| "| calc mask | mask := 16rFFFFFFFFFFFFFFFF. calc := ((dd quo: dv) bitAnd: mask) hex, ' := ', (dd bitAnd: mask) hex, ' quo: ', (dv bitAnd: mask) hex, '. ', ((dd rem: dv) bitAnd: mask) hex, ' := ', (dd bitAnd: mask) hex, ' rem: ', (dv bitAnd: mask) hex. calc := calc." "Transcript cr; cr; nextPutAll: op; cr; nextPutAll: calc; cr. self processor disassembleFrom: 0 to: instructions size in: memory on: Transcript; printIntegerRegistersOn: Transcript." map at: #rax put: (self processor rax: 16rA5A5A5A5); at: #rbx put: (self processor rbx: 16rB5B5B5B5); at: #rcx put: (self processor rcx: 16rC5C5C5C5); at: #rdx put: (self processor rdx: 16rD5D5D5D5); at: #rsi put: (self processor rsi: 16r51515151); at: #rdi put: (self processor rdi: 16rD1D1D1D1); at: srget put: (self processor perform: srset with: (self processor convertIntegerToInternal: dv)); at: drget put: (self processor perform: drset with: (self processor convertIntegerToInternal: dd)). self processor rsp: memory size; rip: 0. self shouldnt: [[self processor pc < instructions size] whileTrue: [self processor singleStepIn: memory readExecuteOnlyBelow: memory size / 2]] raise: Error. map at: qrget put: (self processor convertIntegerToInternal: (dd quo: dv)); at: rrget put: (self processor convertIntegerToInternal: (dd rem: dv)). map keysAndValuesDo: [:accessor :value| + self assert: value equals: (self processor perform: accessor)]]]]]]. - self assert: value = (self processor perform: accessor)]]]]]]. ^ops! Item was added: + ----- Method: CogX64CompilerTests>>testMoveX32rRR (in category 'tests') ----- + testMoveX32rRR + "self new testMoveX32rRR" + self concreteCompilerClass registersWithNamesDo: + [:idxreg :irname| + irname ~= '%rsp' ifTrue: + [self concreteCompilerClass registersWithNamesDo: + [:basereg :brname| + self concreteCompilerClass doubleWordRegistersWithNamesDo: + [:dreg :drname| + ((1 to: 19 by: 3) collect: [:po2| 2 raisedToInteger: po2]) do: + [:offset| | inst len | + inst := self gen: MoveX32rRR operand: idxreg operand: basereg operand: dreg. + len := inst concretizeAt: 0. + self processor + disassembleInstructionAt: 3 + In: inst machineCode object + into: [:str :sz| | plainJane herIntended | + "Convert e.g. '00000000: movl %eax, 0x2(%eax) : 89 40 02' to 'movl %eax, 0x2(%eax)'" + plainJane := self strip: str. + herIntended := 'movl (', brname, ',', irname, ',4), ',drname. + self assert: (plainJane match: herIntended). + self assert: len - 3 = sz]]]]]]! Item was added: + ----- Method: Cogit>>MoveX32r:R:R: (in category 'abstract instructions') ----- + MoveX32r: indexReg R: baseReg R: destReg + <inline: true> + <returnTypeC: #'AbstractInstruction *'> + ^self gen: MoveX32rRR operand: indexReg operand: baseReg operand: destReg!

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hello
by Sebastián Krynski 04 Nov '15

04 Nov '15

Hello my name is Sebastián Krynski from Buenos Aires, Argentina. Just writing to let you know that I'm starting to work on adding an atomic swap operator in Pharo , guaranteed not to be interrupted by the VM. The operator will be used this way: a :=: b meaning 'swap variable a with variable b'. In order to do this I will be modifying the VM and the Compiler . I'm working under the direction of INRIA and Gabriela Arévalo.

2 2

VM Maker: VMMaker.oscog-eem.1509.mcz
by commits＠source.squeak.org 04 Nov '15

04 Nov '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1509.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1509 Author: eem Time: 4 November 2015, 11:28:10.971 am UUID: f6a1e16a-fc26-4558-b806-cff0653e30a2 Ancestors: VMMaker.oscog-eem.1508 x64 Cogit: Streamline genInnerPrimitiveIdentityHash: to compute the tag pattern only once. Fix shifting by > 31 bits. Fix in-image compilation of same. Fix the simulation assert checking valid jump targets. =============== Diff against VMMaker.oscog-eem.1508 =============== Item was changed: ----- Method: CogAbstractInstruction>>jmpTarget: (in category 'accessing') ----- jmpTarget: anAbstractInstruction "Set the target of a jump instruction. These all have the target in the first operand." <returnTypeC: #'AbstractInstruction *'> <var: #anAbstractInstruction type: #'AbstractInstruction *'> self cCode: [] "check for inadvertent smashing of already-set jmpTargets; development only" inSmalltalk: [self assert: ((operands at: 0) ifNil: [true] + ifNotNil: [:o| + o = 0 + or: [(self isAFixup: o) + or: [self isAnInstruction: anAbstractInstruction]]])]. - ifNotNil: [:o| o = 0 or: [self isAFixup: o]])]. operands at: 0 put: anAbstractInstruction asUnsignedInteger. ^anAbstractInstruction! Item was added: + ----- Method: CogObjectRepresentationFor64BitSpur>>genConvertCharacterToSmallIntegerInReg: (in category 'compile abstract instructions') ----- + genConvertCharacterToSmallIntegerInReg: reg + "Convert the SmallInteger in reg to a Character, assuming + the SmallInteger's value is a valid character." + cogit SubCq: objectMemory characterTag - objectMemory smallIntegerTag R: reg! Item was changed: ----- Method: CogObjectRepresentationFor64BitSpur>>genGetHashFieldNonImmOf:asSmallIntegerInto: (in category 'compile abstract instructions') ----- genGetHashFieldNonImmOf: instReg asSmallIntegerInto: destReg "Fetch the instance's identity hash into destReg, encoded as a SmallInteger." + cogit + MoveMw: 0 r: instReg R: destReg; + "Shift and mask the field leaving room for the SmallInteger tag." + LogicalShiftRightCq: objectMemory identityHashFullWordShift - objectMemory numTagBits R: destReg; + AndCq: objectMemory identityHashHalfWordMask << objectMemory numTagBits R: destReg; + AddCq: objectMemory smallIntegerTag R: destReg. - "Get header word in scratchReg" - cogit MoveMw: 0 r: instReg R: destReg. - "Shift and mask the field leaving room for the SmallInteger tag." - cogit LogicalShiftRightCq: objectMemory identityHashFullWordShift R: destReg. - cogit AndCq: objectMemory identityHashHalfWordMask R: destReg. - self genConvertIntegerToSmallIntegerInReg: destReg. ^0! Item was changed: ----- Method: CogObjectRepresentationFor64BitSpur>>genInnerPrimitiveIdentityHash: (in category 'primitive generators') ----- genInnerPrimitiveIdentityHash: retNoffset + | jumpImm jumpSF jumpNotSet ret | - | jumpImm jumpSI jumpSF jumpNotSet ret | - <var: #jumpSI type: #'AbstractInstruction *'> <var: #jumpSF type: #'AbstractInstruction *'> <var: #jumpImm type: #'AbstractInstruction *'> <var: #jumpNotSet type: #'AbstractInstruction *'> + jumpImm := self genJumpImmediate: ReceiverResultReg. "uses TstCqR" - jumpImm := self genJumpImmediate: ReceiverResultReg. self genGetHashFieldNonImmOf: ReceiverResultReg asSmallIntegerInto: TempReg. cogit CmpCq: ConstZero R: TempReg. jumpNotSet := cogit JumpZero: 0. cogit MoveR: TempReg R: ReceiverResultReg. ret := cogit RetN: retNoffset. jumpImm jmpTarget: cogit Label. + jumpSF := cogit "Fail SmallFloat because their hash uses rotatedFloatBitsOf: the oop" + AndCq: objectMemory tagMask R: ReceiverResultReg R: TempReg; + CmpCq: objectMemory smallIntegerTag R: TempReg; + JumpZero: ret; + CmpCq: objectMemory characterTag R: TempReg; + JumpNonZero: 0. - jumpSI := self genJumpSmallInteger: ReceiverResultReg. - jumpSI asInteger = UnimplementedOperation ifTrue: - [cogit MoveR: ReceiverResultReg R: TempReg. - jumpSI := self genJumpSmallIntegerInScratchReg: TempReg]. - jumpSI jmpTarget: ret. - "Fail SmallFloat because their hash uses rotatedFloatBitsOf: the oop" - jumpSF := self genJumpSmallFloat: ReceiverResultReg. - jumpSF asInteger = UnimplementedOperation ifTrue: - [cogit MoveR: ReceiverResultReg R: TempReg. - jumpSI := self genJumpSmallFloatInScratchReg: TempReg]. self genConvertCharacterToSmallIntegerInReg: ReceiverResultReg. cogit Jump: ret. jumpNotSet jmpTarget: (jumpSF jmpTarget: cogit Label). ^0! Item was added: + ----- Method: CogObjectRepresentationFor64BitSpur>>genJumpNotSmallFloat:scratchReg: (in category 'compile abstract instructions') ----- + genJumpNotSmallFloat: reg scratchReg: scratch + "Generate a compare and branch to test if aRegister contains other than a SmallFloat. + Answer the jump." + cogit AndCq: objectMemory tagMask R: reg R: scratch. + cogit CmpCq: objectMemory smallFloatTag R: scratch. + ^cogit JumpNonZero: 0! Item was added: + ----- Method: CogObjectRepresentationFor64BitSpur>>genJumpNotSmallFloatInScratchReg: (in category 'compile abstract instructions') ----- + genJumpNotSmallFloatInScratchReg: aRegister + ^self genJumpNotSmallFloat: aRegister scratchReg: TempReg! Item was added: + ----- Method: CogObjectRepresentationFor64BitSpur>>genJumpSmallFloat: (in category 'compile abstract instructions') ----- + genJumpSmallFloat: aRegister + "Generate a compare and branch to test if aRegister contains a SmallFloat. + Answer the jump, or UnimplementedOperation if this cannot be done with + a single register." + <returnTypeC: #'AbstractInstruction *'> + <inline: true> + ^cogit cCoerceSimple: UnimplementedOperation to: #'AbstractInstruction *'! Item was added: + ----- Method: CogObjectRepresentationFor64BitSpur>>genJumpSmallFloat:scratchReg: (in category 'compile abstract instructions') ----- + genJumpSmallFloat: reg scratchReg: scratch + "Generate a compare and branch to test if aRegister contains a SmallFloat. + Answer the jump. Override since scratch is needed." + cogit AndCq: objectMemory tagMask R: reg R: scratch. + cogit CmpCq: objectMemory smallFloatTag R: scratch. + ^cogit JumpZero: 0! Item was added: + ----- Method: CogObjectRepresentationFor64BitSpur>>genJumpSmallFloatInScratchReg: (in category 'compile abstract instructions') ----- + genJumpSmallFloatInScratchReg: aRegister + ^self genJumpSmallFloat: aRegister scratchReg: TempReg! Item was added: + ----- Method: CogObjectRepresentationFor64BitSpur>>genJumpSmallIntegerInScratchReg: (in category 'compile abstract instructions') ----- + genJumpSmallIntegerInScratchReg: aRegister + ^self genJumpSmallInteger: aRegister scratchReg: TempReg! Item was changed: ----- Method: CogX64Compiler>>computeMaximumSize (in category 'generate machine code') ----- computeMaximumSize "Compute the maximum size for each opcode. This allows jump offsets to be determined, provided that all backward branches are long branches." "N.B. The ^N forms are to get around the bytecode compiler's long branch limits which are exceeded when each case jumps around the otherwise." opcode caseOf: { "Noops & Pseudo Ops" [Label] -> [^0]. [AlignmentNops] -> [^(operands at: 0) - 1]. [Fill16] -> [^2]. [Fill32] -> [^4]. [FillFromWord] -> [^4]. [Nop] -> [^1]. "Specific Control/Data Movement" [CDQ] -> [^2]. [IDIVR] -> [^3]. [IMULRR] -> [^4]. [CPUID] -> [^2]. [CMPXCHGAwR] -> [^8]. [CMPXCHGMwrR] -> [^9]. [LFENCE] -> [^3]. [MFENCE] -> [^3]. [SFENCE] -> [^3]. [LOCK] -> [^1]. "[XCHGAwR] -> [^6]. [XCHGMwrR] -> [^7]." [XCHGRR] -> [^((self concreteRegister: (operands at: 0)) = RAX or: [(self concreteRegister: (operands at: 1)) = RAX]) ifTrue: [2] ifFalse: [3]]. "Control" [CallFull] -> [^12]. [Call] -> [^5]. [JumpR] -> [^2]. [JumpFull] -> [self resolveJumpTarget. ^12]. [JumpLong] -> [self resolveJumpTarget. ^5]. [Jump] -> [self resolveJumpTarget. ^5]. [JumpZero] -> [self resolveJumpTarget. ^6]. [JumpNonZero] -> [self resolveJumpTarget. ^6]. [JumpNegative] -> [self resolveJumpTarget. ^6]. [JumpNonNegative] -> [self resolveJumpTarget. ^6]. [JumpOverflow] -> [self resolveJumpTarget. ^6]. [JumpNoOverflow] -> [self resolveJumpTarget. ^6]. [JumpCarry] -> [self resolveJumpTarget. ^6]. [JumpNoCarry] -> [self resolveJumpTarget. ^6]. [JumpLess] -> [self resolveJumpTarget. ^6]. [JumpGreaterOrEqual] -> [self resolveJumpTarget. ^6]. [JumpGreater] -> [self resolveJumpTarget. ^6]. [JumpLessOrEqual] -> [self resolveJumpTarget. ^6]. [JumpBelow] -> [self resolveJumpTarget. ^6]. [JumpAboveOrEqual] -> [self resolveJumpTarget. ^6]. [JumpAbove] -> [self resolveJumpTarget. ^6]. [JumpBelowOrEqual] -> [self resolveJumpTarget. ^6]. [JumpLongZero] -> [self resolveJumpTarget. ^6]. [JumpLongNonZero] -> [self resolveJumpTarget. ^6]. [JumpFPEqual] -> [self resolveJumpTarget. ^6]. [JumpFPNotEqual] -> [self resolveJumpTarget. ^6]. [JumpFPLess] -> [self resolveJumpTarget. ^6]. [JumpFPGreaterOrEqual] -> [self resolveJumpTarget. ^6]. [JumpFPGreater] -> [self resolveJumpTarget. ^6]. [JumpFPLessOrEqual] -> [self resolveJumpTarget. ^6]. [JumpFPOrdered] -> [self resolveJumpTarget. ^6]. [JumpFPUnordered] -> [self resolveJumpTarget. ^6]. [RetN] -> [^(operands at: 0) = 0 ifTrue: [1] ifFalse: [3]]. [Stop] -> [^1]. "Arithmetic" [AddCqR] -> [^self computeSizeOfArithCqR]. [AndCqR] -> [^self computeSizeOfArithCqR]. [CmpCqR] -> [^self computeSizeOfArithCqR]. [OrCqR] -> [^self computeSizeOfArithCqR]. [SubCqR] -> [^self computeSizeOfArithCqR]. [TstCqR] -> [^self computeSizeOfArithCqR]. [AddCwR] -> [^self computeSizeOfArithCwR]. [AndCwR] -> [^self computeSizeOfArithCwR]. [CmpCwR] -> [^self computeSizeOfArithCwR]. [OrCwR] -> [^self computeSizeOfArithCwR]. [SubCwR] -> [^self computeSizeOfArithCwR]. [XorCwR] -> [^self computeSizeOfArithCwR]. [AddRR] -> [^3]. [AndRR] -> [^3]. [CmpRR] -> [^3]. [OrRR] -> [^3]. [XorRR] -> [^3]. [SubRR] -> [^3]. [NegateR] -> [^3]. [LoadEffectiveAddressMwrR] -> [^((self isQuick: (operands at: 0)) ifTrue: [4] ifFalse: [7]) + (((self concreteRegister: (operands at: 1)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. + [LogicalShiftLeftCqR] -> [^self computeShiftCqRegSize]. + [LogicalShiftRightCqR] -> [^self computeShiftCqRegSize]. + [ArithmeticShiftRightCqR] -> [^self computeShiftCqRegSize]. - [LogicalShiftLeftCqR] -> [^(operands at: 0) = 1 ifTrue: [3] ifFalse: [4]]. - [LogicalShiftRightCqR] -> [^(operands at: 0) = 1 ifTrue: [3] ifFalse: [4]]. - [ArithmeticShiftRightCqR] -> [^(operands at: 0) = 1 ifTrue: [3] ifFalse: [4]]. [LogicalShiftLeftRR] -> [^self computeShiftRRSize]. [LogicalShiftRightRR] -> [^self computeShiftRRSize]. [ArithmeticShiftRightRR] -> [^self computeShiftRRSize]. [AddRdRd] -> [^4]. [CmpRdRd] -> [^4]. [SubRdRd] -> [^4]. [MulRdRd] -> [^4]. [DivRdRd] -> [^4]. [SqrtRd] -> [^4]. "Data Movement" [MoveCqR] -> [^(operands at: 0) = 0 ifTrue: [3] ifFalse: [(self is32BitSignedImmediate: (operands at: 0)) ifTrue: [7] ifFalse: [self moveCwRByteSize]]]. [MoveCwR] -> [^(self inCurrentCompilation: (operands at: 0)) ifTrue: [7] ifFalse: [self moveCwRByteSize]]. [MoveC32R] -> [^7]. "N.B. Always inlined." [MoveRR] -> [^3]. [MoveRdRd] -> [^4]. [MoveAwR] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [7] ifFalse: [(self concreteRegister: (operands at: 1)) = RAX ifTrue: [10] ifFalse: [14]]]. [MoveRAw] -> [^(self isAddressRelativeToVarBase: (operands at: 1)) ifTrue: [7] ifFalse: [(self concreteRegister: (operands at: 0)) = RAX ifTrue: [10] ifFalse: [14]]]. [MoveAbR] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [7] ifFalse: [(self concreteRegister: (operands at: 1)) = RAX ifTrue: [10] ifFalse: [14]]]. [MoveRAb] -> [^(self isAddressRelativeToVarBase: (operands at: 1)) ifTrue: [7] ifFalse: [(self concreteRegister: (operands at: 0)) = RAX ifTrue: [10] ifFalse: [14]]]. [MoveRMwr] -> [self assert: (self is32BitSignedImmediate: (operands at: 1)). ^((self isQuick: (operands at: 1)) ifTrue: [((operands at: 1) = 0 and: [((self concreteRegister: (operands at: 2)) bitAnd: 7) ~= RBP]) ifTrue: [3] ifFalse: [4]] ifFalse: [7]) + (((self concreteRegister: (operands at: 2)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. "[MoveRdM64r] -> [^((self isQuick: (operands at: 1)) ifTrue: [5] ifFalse: [8]) + ((self concreteRegister: (operands at: 2)) = ESP ifTrue: [1] ifFalse: [0])]." [MoveMbrR] -> [self assert: (self is32BitSignedImmediate: (operands at: 0)). ^((self isQuick: (operands at: 0)) ifTrue: [((operands at: 0) = 0 and: [((self concreteRegister: (operands at: 1)) bitAnd: 7) ~= RBP]) ifTrue: [3] ifFalse: [4]] ifFalse: [7]) + (((self concreteRegister: (operands at: 1)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. [MoveRMbr] -> [self assert: (self is32BitSignedImmediate: (operands at: 1)). ^((self isQuick: (operands at: 1)) ifTrue: [((operands at: 1) = 0 and: [((self concreteRegister: (operands at: 0)) bitAnd: 7) ~= RBP]) ifTrue: [3] ifFalse: [4]] ifFalse: [7]) + (((self concreteRegister: (operands at: 2)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. [MoveM16rR] -> [^((self isQuick: (operands at: 0)) ifTrue: [((operands at: 0) = 0 and: [((self concreteRegister: (operands at: 1)) bitAnd: 7) ~= RBP]) ifTrue: [4] ifFalse: [5]] ifFalse: [8]) + (((self concreteRegister: (operands at: 1)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. "[MoveM64rRd] -> [^((self isQuick: (operands at: 0)) ifTrue: [5] ifFalse: [8]) + ((self concreteRegister: (operands at: 1)) = ESP ifTrue: [1] ifFalse: [0])]." [MoveMwrR] -> [self assert: (self is32BitSignedImmediate: (operands at: 0)). ^((self isQuick: (operands at: 0)) ifTrue: [((operands at: 0) = 0 and: [((self concreteRegister: (operands at: 1)) bitAnd: 7) ~= RBP]) ifTrue: [3] ifFalse: [4]] ifFalse: [7]) + (((self concreteRegister: (operands at: 1)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. [MoveXbrRR] -> [self assert: (self concreteRegister: (operands at: 0)) ~= RSP. ^((self concreteRegister: (operands at: 1)) bitAnd: 7) = RBP ifTrue: [5] ifFalse: [4]]. [MoveRXbrR] -> [self assert: (self concreteRegister: (operands at: 1)) ~= RSP. ^(((self concreteRegister: (operands at: 0)) < 8 and: [(self concreteRegister: (operands at: 1)) < 8 and: [(self concreteRegister: (operands at: 2)) < 8]]) ifTrue: [3] ifFalse: [4]) + (((self concreteRegister: (operands at: 2)) bitAnd: 7) = RBP ifTrue: [1] ifFalse: [0])]. [MoveXwrRR] -> [self assert: (self concreteRegister: (operands at: 0)) ~= RSP. ^((self concreteRegister: (operands at: 1)) = RBP or: [(self concreteRegister: (operands at: 1)) = R13]) ifTrue: [5] ifFalse: [4]]. [MoveRXwrR] -> [self assert: (self concreteRegister: (operands at: 1)) ~= RSP. ^((self concreteRegister: (operands at: 2)) = RBP or: [(self concreteRegister: (operands at: 2)) = R13]) ifTrue: [5] ifFalse: [4]]. [PopR] -> [^(self concreteRegister: (operands at: 0)) < 8 ifTrue: [1] ifFalse: [2]]. [PushR] -> [^(self concreteRegister: (operands at: 0)) < 8 ifTrue: [1] ifFalse: [2]]. [PushCq] -> [^(self isQuick: (operands at: 0)) ifTrue: [2] ifFalse: [5]]. [PushCw] -> [^(self inCurrentCompilation: (operands at: 0)) ifTrue: [9] ifFalse: [self pushCwByteSize]]. [PrefetchAw] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [7] ifFalse: [0]]. "Conversion" "[ConvertRRd] -> [^4]" }. ^0 "to keep C compiler quiet"! Item was added: + ----- Method: CogX64Compiler>>computeShiftCqRegSize (in category 'generate machine code') ----- + computeShiftCqRegSize + "Immediate shifts are limited to a maximum of 31." + <inline: true> + | distance | + distance := operands at: 0. + distance = 1 ifTrue: + [^3]. + distance <= 31 ifTrue: + [^4]. + distance = 32 ifTrue: + [^7]. + ^8! Item was changed: ----- Method: CogX64Compiler>>concretizeShiftCqRegOpcode: (in category 'generate machine code') ----- concretizeShiftCqRegOpcode: regOpcode "Will get inlined into concretizeAt: switch." <inline: true> | distance reg | + distance := operands at: 0. + self assert: (distance between: 1 and: 63). - distance := (operands at: 0) min: 31. reg := self concreteRegister: (operands at: 1). machineCode at: 0 put: (self rexR: 0 x: 0 b: reg). distance = 1 ifTrue: [machineCode at: 1 put: 16rD1; at: 2 put: (self mod: ModReg RM: reg RO: regOpcode). ^machineCodeSize := 3]. machineCode at: 1 put: 16rC1; at: 2 put: (self mod: ModReg RM: reg RO: regOpcode); + at: 3 put: (distance min: 31). + distance <= 31 ifTrue: + [^machineCodeSize := 4]. + distance = 32 ifTrue: + [machineCode + at: 4 put: 16rD1; + at: 5 put: (self mod: ModReg RM: reg RO: regOpcode). + ^machineCodeSize := 7]. + machineCode + at: 4 put: 16rC1; + at: 5 put: (self mod: ModReg RM: reg RO: regOpcode); + at: 6 put: distance - 31. + ^machineCodeSize := 8! - at: 3 put: distance. - ^machineCodeSize := 4! Item was added: + ----- Method: CurrentImageCoInterpreterFacadeFor64BitSpurObjectRepresentation>>smallFloatTag (in category 'accessing') ----- + smallFloatTag + ^objectMemory smallFloatTag! Item was added: + ----- Method: CurrentImageCoInterpreterFacadeForSpurObjectRepresentation>>identityHashFullWordShift (in category 'accessing') ----- + identityHashFullWordShift + ^objectMemory identityHashFullWordShift! Item was added: + ----- Method: CurrentImageCoInterpreterFacadeForSpurObjectRepresentation>>numTagBits (in category 'accessing') ----- + numTagBits + ^objectMemory numTagBits!

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VM Maker: Cog-eem.293.mcz
by commits＠source.squeak.org 04 Nov '15

04 Nov '15

Eliot Miranda uploaded a new version of Cog to project VM Maker: http://source.squeak.org/VMMaker/Cog-eem.293.mcz ==================== Summary ==================== Name: Cog-eem.293 Author: eem Time: 4 November 2015, 11:27:15.516 am UUID: dfb25eb6-c5e9-4ddd-b05e-8fb59524a70e Ancestors: Cog-eem.292 Reduce those 64-bit call/jump offsets in assembly decoration. =============== Diff against Cog-eem.292 =============== Item was changed: ----- Method: BochsX64Alien>>decorateDisassembly:for: (in category 'disassembly') ----- decorateDisassembly: anInstructionString for: aSymbolManager "<Cogit>" | string i1 i2 v extra | string := anInstructionString. ((i1 := string indexOfSubCollection: '%ds:(') > 0 or: [(i1 := string indexOfSubCollection: '%ss:(') > 0]) ifTrue: [string := string copyReplaceFrom: i1 to: i1 + 3 with: '']. (i1 := string indexOfSubCollection: '%ds:0x') > 0 ifTrue: [i2 := i1 + 6. ['0123456789abcdef' includes: (string at: i2)] whileTrue: [i2 := i2 + 1]. (v := string copyFrom: i2 to: (i2 + 5 min: string size)) = '(%rbx)' ifTrue: [v := Integer readFrom: (ReadStream on: string from: i1 + 6 to: i2 - 1) base: 16. (aSymbolManager lookupAddress: aSymbolManager varBaseAddress + v) ifNotNil: [:varName| extra := ' = ', varName]]. v = '(%rip)' ifTrue: [v := string size - (string indexOf: $: startingAt: i2 + 5) - 1 / 3. "Count number of instruction bytes to find size of instruction" v := v + (Integer readFrom: (ReadStream on: string from: 1 to: 8) base: 16). "Add address of instruction" v := v + (Integer readFrom: (ReadStream on: string from: i1 + 6 to: i2 - 1) base: 16) signedIntFromLong64. "Add offset to yield pc-relative address" (aSymbolManager lookupAddress: v) ifNotNil: [:methodName| extra := ' = ', methodName]]. string := string copyReplaceFrom: i1 to: i2 - 1 with: (aSymbolManager lookupCHexString: (string copyFrom: i1 + 4 to: i2 - 1))]. (i1 := string indexOfSubCollection: '%ss:0x') > 0 ifTrue: [i2 := i1 + 6. ['0123456789abcdef' includes: (string at: i2)] whileTrue: [i2 := i2 + 1]. ((string at: i2) = $( and: [(string at: i2 + 1) = $%]) ifTrue: [v := Integer readFrom: (ReadStream on: string from: i1 + 6 to: i2 - 1) base: 16. string := string copyReplaceFrom: i1 to: i2 - 1 with: ((v bitAnd: (1 bitShift: 31) - 1) - (v bitAnd: (1 bitShift: 31))) printString]]. (i1 := string indexOfSubCollection: '$0x') > 0 ifTrue: [i2 := i1 + 3. ['0123456789abcdef' includes: (string at: i2)] whileTrue: [i2 := i2 + 1]. string := string copyReplaceFrom: i1 + 1 to: i2 - 1 with: (aSymbolManager lookupCHexString: (string copyFrom: i1 + 1 to: i2 - 1))]. ((i1 := string indexOf: $() > 1 and: [(string at: i1 + 1) isDigit and: [i1 < (i2 := string indexOf: $))]]) ifTrue: [string := string copyReplaceFrom: i1 + 1 to: i2 - 1 + with: (aSymbolManager lookupCHexString: (string copyFrom: i1 + 1 to: i2 - 1)). + i1 := string indexOfSubCollection: '+0x'. "calls & jumps" + i1 > 0 ifTrue: + [v := Integer readFrom: (i2 := ReadStream on: string from: i1 + 3 to: string size) base: 16. + v := ((v bitAnd: (1 bitShift: 63) - 1) - (v bitAnd: (1 bitShift: 63))) printStringRadix: 16. + v := v first = $1 + ifTrue: [v copyReplaceFrom: 1 to: 3 with: '+0x'] + ifFalse: [v copyReplaceFrom: 2 to: 4 with: '0x']. + string := string copyReplaceFrom: i1 to: i2 position with: v]]. - with: (aSymbolManager lookupCHexString: (string copyFrom: i1 + 1 to: i2 - 1))]. ^extra ifNil: [string] ifNotNil: [i1 := string lastIndexOf: $:. string copyReplaceFrom: i1 - 1 to: i1 - 2 with: extra]!

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VM Maker: VMMaker.oscog-eem.1508.mcz
by commits＠source.squeak.org 04 Nov '15

04 Nov '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1508.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1508 Author: eem Time: 4 November 2015, 8:38:48.263 am UUID: 4d5233a4-5fe7-4211-8e7d-d4b3e4ed4fec Ancestors: VMMaker.oscog-eem.1507 x64 Cogit: Refactor some instantiation routines in the Spur object representation to use the header initialization abstraction. Add instruction sizing to allow disassembly of methods containing blocks. =============== Diff against VMMaker.oscog-eem.1507 =============== Item was added: + ----- Method: CogAbstractInstruction>>instructionSizeAt: (in category 'disassembly') ----- + instructionSizeAt: pc + "Answer the instruction size at pc. This is used in method disassembly + to decode the jumps in block dispatch to discover where block methods + occur within a larger method." + ^4! Item was added: + ----- Method: CogObjectRepresentationFor32BitSpur>>genLoadHeader:intoNewInstance:using: (in category 'initialization') ----- + genLoadHeader: header intoNewInstance: rcvrReg using: scratchReg + "Generate the instructions to move the constant header into a new instance pointed to by rcvrReg." + <inline: true> + self flag: #endianness. + cogit + MoveCq: (self low32BitsOf: header) R: scratchReg; + MoveR: scratchReg Mw: 0 r: rcvrReg; + MoveCq: header >> 32 R: scratchReg; + MoveR: scratchReg Mw: 4 r: rcvrReg! Item was removed: - ----- Method: CogObjectRepresentationFor32BitSpur>>genLoadHeaderIntoNewInstance: (in category 'initialization') ----- - genLoadHeaderIntoNewInstance: header - "Generate the instructions to move the constant header into a new instance pointed to by ReceiverResultReg." - <inline: true> - self flag: #endianness. - cogit - MoveCq: (self low32BitsOf: header) R: TempReg; - MoveR: TempReg Mw: 0 r: ReceiverResultReg; - MoveCq: header >> 32 R: TempReg; - MoveR: TempReg Mw: 4 r: ReceiverResultReg! Item was removed: - ----- Method: CogObjectRepresentationFor32BitSpur>>genNewArrayOfSize:initialized: (in category 'bytecode generator support') ----- - genNewArrayOfSize: size initialized: initialized - "Generate a call to code that allocates a new Array of size. - The Array should be initialized with nils iff initialized is true. - The size arg is passed in SendNumArgsReg, the result - must come back in ReceiverResultReg." - | header skip | - <var: #skip type: #'AbstractInstruction *'> - self assert: size < objectMemory numSlotsMask. - header := objectMemory - headerForSlots: size - format: objectMemory arrayFormat - classIndex: ClassArrayCompactIndex. - self flag: #endianness. - cogit - MoveAw: objectMemory freeStartAddress R: ReceiverResultReg; - MoveCq: (self low32BitsOf: header) R: TempReg; - MoveR: TempReg Mw: 0 r: ReceiverResultReg; - MoveCq: header >> 32 R: TempReg; - MoveR: TempReg Mw: 4 r: ReceiverResultReg. - (initialized and: [size > 0]) ifTrue: - [cogit genMoveConstant: objectMemory nilObject R: TempReg. - 1 to: size do: - [:i| cogit MoveR: TempReg Mw: i * 4 + 4 r: ReceiverResultReg]]. - cogit - MoveR: ReceiverResultReg R: TempReg; - AddCq: (objectMemory smallObjectBytesForSlots: size) R: TempReg; - MoveR: TempReg Aw: objectMemory freeStartAddress; - CmpCq: objectMemory getScavengeThreshold R: TempReg. - skip := cogit JumpBelow: 0. - cogit CallRT: ceScheduleScavengeTrampoline. - skip jmpTarget: cogit Label. - ^0! Item was removed: - ----- Method: CogObjectRepresentationFor32BitSpur>>genNoPopCreateClosureAt:numArgs:numCopied:contextNumArgs:large:inBlock: (in category 'bytecode generator support') ----- - genNoPopCreateClosureAt: bcpc numArgs: numArgs numCopied: numCopied contextNumArgs: ctxtNumArgs large: isLargeCtxt inBlock: isInBlock - "Create a closure with the given startpc, numArgs and numCopied - within a context with ctxtNumArgs, large if isLargeCtxt that is in a - block if isInBlock. Do /not/ initialize the copied values." - | numSlots byteSize header skip | - <var: #skip type: #'AbstractInstruction *'> - - "First get thisContext into ReceiverResultRega and thence in ClassReg." - self genGetActiveContextNumArgs: ctxtNumArgs large: isLargeCtxt inBlock: isInBlock. - cogit MoveR: ReceiverResultReg R: ClassReg. - - numSlots := ClosureFirstCopiedValueIndex + numCopied. - byteSize := objectMemory smallObjectBytesForSlots: numSlots. - header := objectMemory - headerForSlots: numSlots - format: objectMemory indexablePointersFormat - classIndex: ClassBlockClosureCompactIndex. - cogit - MoveAw: objectMemory freeStartAddress R: ReceiverResultReg; - MoveCq: (self low32BitsOf: header) R: TempReg; - MoveR: TempReg Mw: 0 r: ReceiverResultReg; - MoveCq: header >> 32 R: TempReg; - MoveR: TempReg Mw: 4 r: ReceiverResultReg; - LoadEffectiveAddressMw: byteSize r: ReceiverResultReg R: TempReg; - MoveR: TempReg Aw: objectMemory freeStartAddress; - CmpCq: objectMemory getScavengeThreshold R: TempReg. - skip := cogit JumpBelow: 0. - cogit CallRT: ceScheduleScavengeTrampoline. - skip jmpTarget: cogit Label. - - cogit - MoveR: ClassReg Mw: ClosureOuterContextIndex * objectMemory bytesPerOop + objectMemory baseHeaderSize r: ReceiverResultReg; - MoveCq: (objectMemory integerObjectOf: bcpc) R: TempReg; - MoveR: TempReg Mw: ClosureStartPCIndex * objectMemory bytesPerOop + objectMemory baseHeaderSize r: ReceiverResultReg; - MoveCq: (objectMemory integerObjectOf: numArgs) R: TempReg; - MoveR: TempReg Mw: ClosureNumArgsIndex * objectMemory bytesPerOop + objectMemory baseHeaderSize r: ReceiverResultReg. - ^0! Item was added: + ----- Method: CogObjectRepresentationFor64BitSpur>>genLoadHeader:intoNewInstance:using: (in category 'initialization') ----- + genLoadHeader: header intoNewInstance: rcvrReg using: scratchReg + "Generate the instructions to move the constant header into a new instance pointed to by rcvrReg." + <inline: true> + cogit + MoveCq: header R: scratchReg; + MoveR: TempReg Mw: 0 r: rcvrReg! Item was removed: - ----- Method: CogObjectRepresentationFor64BitSpur>>genLoadHeaderIntoNewInstance: (in category 'initialization') ----- - genLoadHeaderIntoNewInstance: header - "Generate the instructions to move the constant header into a new instance pointed to by ReceiverResultReg." - <inline: true> - self flag: #endianness. - cogit - MoveCq: header R: TempReg; - MoveR: TempReg Mw: 0 r: ReceiverResultReg! Item was removed: - ----- Method: CogObjectRepresentationFor64BitSpur>>genNoPopCreateClosureAt:numArgs:numCopied:contextNumArgs:large:inBlock: (in category 'bytecode generator support') ----- - genNoPopCreateClosureAt: bcpc numArgs: numArgs numCopied: numCopied contextNumArgs: ctxtNumArgs large: isLargeCtxt inBlock: isInBlock - "Create a closure with the given startpc, numArgs and numCopied - within a context with ctxtNumArgs, large if isLargeCtxt that is in a - block if isInBlock. Do /not/ initialize the copied values." - | numSlots byteSize header skip | - <var: #skip type: #'AbstractInstruction *'> - - "First get thisContext into ReceiverResultRega and thence in ClassReg." - self genGetActiveContextNumArgs: ctxtNumArgs large: isLargeCtxt inBlock: isInBlock. - cogit MoveR: ReceiverResultReg R: ClassReg. - - numSlots := ClosureFirstCopiedValueIndex + numCopied. - byteSize := objectMemory smallObjectBytesForSlots: numSlots. - header := objectMemory - headerForSlots: numSlots - format: objectMemory indexablePointersFormat - classIndex: ClassBlockClosureCompactIndex. - cogit - MoveAw: objectMemory freeStartAddress R: ReceiverResultReg; - MoveCq: header R: TempReg; - MoveR: TempReg Mw: 0 r: ReceiverResultReg; - LoadEffectiveAddressMw: byteSize r: ReceiverResultReg R: TempReg; - MoveR: TempReg Aw: objectMemory freeStartAddress; - CmpCq: objectMemory getScavengeThreshold R: TempReg. - skip := cogit JumpBelow: 0. - cogit CallRT: ceScheduleScavengeTrampoline. - skip jmpTarget: cogit Label. - - cogit - MoveR: ClassReg Mw: ClosureOuterContextIndex * objectMemory bytesPerOop + objectMemory baseHeaderSize r: ReceiverResultReg; - MoveCq: (objectMemory integerObjectOf: bcpc) R: TempReg; - MoveR: TempReg Mw: ClosureStartPCIndex * objectMemory bytesPerOop + objectMemory baseHeaderSize r: ReceiverResultReg; - MoveCq: (objectMemory integerObjectOf: numArgs) R: TempReg; - MoveR: TempReg Mw: ClosureNumArgsIndex * objectMemory bytesPerOop + objectMemory baseHeaderSize r: ReceiverResultReg. - ^0! Item was changed: ----- Method: CogObjectRepresentationForSpur>>genAllocFloatValue:into:scratchReg:scratchReg: (in category 'primitive generators') ----- genAllocFloatValue: dpreg into: resultReg scratchReg: scratch1 scratchReg: scratch2 <returnTypeC: #'AbstractInstruction *'> | allocSize newFloatHeader jumpFail | <var: #jumpFail type: #'AbstractInstruction *'> allocSize := objectMemory baseHeaderSize + (objectMemory sizeof: #double). newFloatHeader := objectMemory headerForSlots: (self sizeof: #double) / objectMemory wordSize format: objectMemory firstLongFormat classIndex: ClassFloatCompactIndex. cogit MoveAw: objectMemory freeStartAddress R: resultReg. cogit LoadEffectiveAddressMw: allocSize r: resultReg R: scratch1. cogit CmpCq: objectMemory getScavengeThreshold R: scratch1. jumpFail := cogit JumpAboveOrEqual: 0. cogit MoveR: scratch1 Aw: objectMemory freeStartAddress. + self genLoadHeader: newFloatHeader intoNewInstance: resultReg using: scratch1. - cogit MoveCq: newFloatHeader R: scratch2. - objectMemory wordSize = objectMemory baseHeaderSize - ifTrue: [cogit MoveR: scratch2 Mw: 0 r: resultReg] - ifFalse: - [self flag: #endianness. - cogit MoveCq: newFloatHeader >> 32 R: scratch1. - cogit MoveR: scratch2 Mw: 0 r: resultReg. - cogit MoveR: scratch1 Mw: objectMemory wordSize r: resultReg]. cogit MoveRd: dpreg M64: objectMemory baseHeaderSize r: resultReg. ^jumpFail! Item was changed: ----- Method: CogObjectRepresentationForSpur>>genGetActiveContextLarge:inBlock: (in category 'initialization') ----- genGetActiveContextLarge: isLarge inBlock: isInBlock "Create a trampoline to answer the active context that will answer it if a frame is already married, and create it otherwise. Assume numArgs is in SendNumArgsReg and ClassReg is free." | header slotSize jumpSingle loopHead jumpNeedScavenge continuation exit | <var: #jumpNeedScavenge type: #'AbstractInstruction *'> <var: #continuation type: #'AbstractInstruction *'> <var: #jumpSingle type: #'AbstractInstruction *'> <var: #loopHead type: #'AbstractInstruction *'> <var: #exit type: #'AbstractInstruction *'> cogit "load the flag; stash it in both TempReg & ClassReg; do the compare (a prime candidated for use of AndCq:R:R:)" MoveMw: FoxMethod r: FPReg R: ClassReg; AndCq: MFMethodFlagHasContextFlag R: ClassReg R: TempReg. jumpSingle := cogit JumpZero: 0. "jump if flag bit not set" cogit "since the flag bit was set, get the context in the receiver reg and return" MoveMw: FoxThisContext r: FPReg R: ReceiverResultReg; RetN: 0. jumpSingle jmpTarget: cogit Label. "OK, it doesn't exist; instantiate and initialize it" "set the hasContext flag; See CoInterpreter class>>initializeFrameIndices" cogit OrCq: MFMethodFlagHasContextFlag R: ClassReg; MoveR: ClassReg Mw: FoxMethod r: FPReg. "now get the home CogMethod into ClassReg and save for post-instantiation." isInBlock ifTrue: [cogit SubCq: 3 R: ClassReg; "-3 is -(hasContext+isBlock) flags" MoveM16: 0 r: ClassReg R: TempReg; SubR: TempReg R: ClassReg] ifFalse: [cogit SubCq: 1 R: ClassReg]. "-1 is hasContext flag" "instantiate the context..." slotSize := isLarge ifTrue: [LargeContextSlots] ifFalse: [SmallContextSlots]. header := objectMemory headerForSlots: slotSize format: objectMemory indexablePointersFormat classIndex: ClassMethodContextCompactIndex. self flag: #endianness. cogit MoveAw: objectMemory freeStartAddress R: ReceiverResultReg. + self genLoadHeader: header intoNewInstance: ReceiverResultReg using: TempReg. - self genLoadHeaderIntoNewInstance: header. cogit MoveR: ReceiverResultReg R: TempReg; AddCq: (objectMemory smallObjectBytesForSlots: slotSize) R: TempReg; MoveR: TempReg Aw: objectMemory freeStartAddress; CmpCq: objectMemory getScavengeThreshold R: TempReg. jumpNeedScavenge := cogit JumpAboveOrEqual: 0. "Now initialize the fields of the context. See CoInterpreter>>marryFrame:SP:copyTemps:" "sender gets frame pointer as a SmallInteger" continuation := cogit MoveR: FPReg R: TempReg. self genSetSmallIntegerTagsIn: TempReg. cogit MoveR: TempReg Mw: objectMemory baseHeaderSize + (SenderIndex * objectMemory bytesPerOop) r: ReceiverResultReg. "pc gets frame caller as a SmallInteger" cogit MoveMw: FoxSavedFP r: FPReg R: TempReg. self genSetSmallIntegerTagsIn: TempReg. cogit MoveR: TempReg Mw: objectMemory baseHeaderSize + (InstructionPointerIndex * objectMemory bytesPerOop) r: ReceiverResultReg. "Set the method field, freeing up ClassReg again, and frame's context field," cogit MoveMw: (cogit offset: CogMethod of: #methodObject) r: ClassReg R: TempReg; MoveR: TempReg Mw: objectMemory baseHeaderSize + (MethodIndex * objectMemory wordSize) r: ReceiverResultReg; MoveR: ReceiverResultReg Mw: FoxThisContext r: FPReg. "Now compute stack pointer; this is stackPointer (- 1 for return pc if a CISC) - framePointer - wordSize (1 each for saved pc, method, context, receiver) + 1 (1-relative) + numArgs" "TPR note - the code here is actually doing context stackPointer := ((((fp - sp) / wordSize) - [3|4]) + num args) asSmallInteger" cogit MoveR: FPReg R: TempReg; SubR: SPReg R: TempReg; LogicalShiftRightCq: self log2BytesPerWord R: TempReg; SubCq: (cogit backEnd hasLinkRegister ifTrue: [3] ifFalse: [4]) R: TempReg; AddR: SendNumArgsReg R: TempReg. self genConvertIntegerToSmallIntegerInReg: TempReg. cogit MoveR: TempReg Mw: objectMemory baseHeaderSize + (StackPointerIndex * objectMemory bytesPerOop) r: ReceiverResultReg. "Set closureOrNil to either the stacked receiver or nil" isInBlock ifTrue: [cogit MoveR: SendNumArgsReg R: TempReg; AddCq: 2 R: TempReg; "+2 for saved fp and saved pc" MoveXwr: TempReg R: FPReg R: TempReg] ifFalse: [cogit genMoveConstant: objectMemory nilObject R: TempReg]. cogit MoveR: TempReg Mw: objectMemory baseHeaderSize + (ClosureIndex * objectMemory bytesPerOop) r: ReceiverResultReg. "Set the receiver" cogit MoveMw: FoxMFReceiver r: FPReg R: TempReg; MoveR: TempReg Mw: objectMemory baseHeaderSize + (ReceiverIndex * objectMemory bytesPerOop) r: ReceiverResultReg. "Now copy the arguments. This is tricky because of the shortage of registers,. ClassReg ranges from 1 to numArgs (SendNumArgsReg), and from ReceiverIndex + 1 to ReceiverIndex + numArgs. 1 to: numArgs do: [:i| temp := longAt(FPReg + ((SendNumArgs - i + 2) * wordSize)). +2 for saved pc and savedfp longAtput(FPReg + FoxMFReceiver + (i * wordSize), temp)]" "TPR note: this is a prime candidate for passing off to the backend to do at least faintly optimal code" cogit MoveCq: 1 R: ClassReg. loopHead := cogit CmpR: SendNumArgsReg R: ClassReg. exit := cogit JumpGreater: 0. cogit MoveR: SendNumArgsReg R: TempReg; SubR: ClassReg R: TempReg; AddCq: 2 R: TempReg; "+2 for saved fp and saved pc" MoveXwr: TempReg R: FPReg R: TempReg; AddCq: ReceiverIndex + (objectMemory baseHeaderSize / objectMemory wordSize) R: ClassReg; "Now convert ClassReg from frame index to context index" MoveR: TempReg Xwr: ClassReg R: ReceiverResultReg; SubCq: ReceiverIndex + (objectMemory baseHeaderSize / objectMemory wordSize) - 1 R: ClassReg; "convert back adding 1 ;-)" Jump: loopHead. exit jmpTarget: cogit Label. "Finally nil or copy the non-argument temps. ClassReg := FPReg + FoxMFReceiver. SendNumArgsReg := SendNumArgsReg+ReceiverIndex. [ClassReg := ClassReg - wordSize. backEnd hasLinkRegister ifTrue: [ClassReg > SPReg] ifFalse: [ClassReg >= SPReg]] whileTrue: [receiver[SendNumArgsReg] := *ClassReg. SendNumArgsReg := SendNumArgsReg + 1]]" coInterpreter marryFrameCopiesTemps ifFalse: [cogit MoveCq: objectMemory nilObject R: TempReg]. cogit MoveR: FPReg R: ClassReg; AddCq: FoxMFReceiver R: ClassReg; AddCq: ReceiverIndex + 1 + (objectMemory baseHeaderSize / objectMemory wordSize) R: SendNumArgsReg. loopHead := cogit SubCq: objectMemory wordSize R: ClassReg. cogit CmpR: SPReg R: ClassReg. "If on a CISC there's a retpc for the trampoline call on top of stack; if on a RISC there isn't." exit := cogit backEnd hasLinkRegister ifTrue: [cogit JumpBelow: 0] ifFalse: [cogit JumpBelowOrEqual: 0]. coInterpreter marryFrameCopiesTemps ifTrue: [cogit MoveMw: 0 r: ClassReg R: TempReg]. cogit MoveR: TempReg Xwr: SendNumArgsReg R: ReceiverResultReg; AddCq: 1 R: SendNumArgsReg; Jump: loopHead. exit jmpTarget: cogit Label. cogit RetN: 0. jumpNeedScavenge jmpTarget: cogit Label. cogit backEnd saveAndRestoreLinkRegAround: [cogit CallRT: ceScheduleScavengeTrampoline]. cogit Jump: continuation. ^0! Item was added: + ----- Method: CogObjectRepresentationForSpur>>genLoadHeader:intoNewInstance:using: (in category 'initialization') ----- + genLoadHeader: header intoNewInstance: rcvrReg using: scratchReg + "Generate the instructions to move the constant header into a new instance pointed to by rcvrReg." + <inline: true> + self subclassResponsibility! Item was removed: - ----- Method: CogObjectRepresentationForSpur>>genLoadHeaderIntoNewInstance: (in category 'initialization') ----- - genLoadHeaderIntoNewInstance: header - "Generate the instructions to move the constant header into a new instance pointed to by ReceiverResultReg." - ^self subclassResponsibility! Item was added: + ----- Method: CogObjectRepresentationForSpur>>genNewArrayOfSize:initialized: (in category 'bytecode generator support') ----- + genNewArrayOfSize: size initialized: initialized + "Generate a call to code that allocates a new Array of size. + The Array should be initialized with nils iff initialized is true. + The size arg is passed in SendNumArgsReg, the result + must come back in ReceiverResultReg." + | header skip | + <var: #skip type: #'AbstractInstruction *'> + self assert: size < objectMemory numSlotsMask. + header := objectMemory + headerForSlots: size + format: objectMemory arrayFormat + classIndex: ClassArrayCompactIndex. + cogit MoveAw: objectMemory freeStartAddress R: ReceiverResultReg. + self genLoadHeader: header intoNewInstance: ReceiverResultReg using: TempReg. + (initialized and: [size > 0]) ifTrue: + [cogit genMoveConstant: objectMemory nilObject R: TempReg. + 0 to: size - 1 do: + [:i| cogit MoveR: TempReg + Mw: i * objectMemory wordSize + objectMemory baseHeaderSize + r: ReceiverResultReg]]. + cogit + LoadEffectiveAddressMw: (objectMemory smallObjectBytesForSlots: size) r: ReceiverResultReg R: TempReg; + MoveR: TempReg Aw: objectMemory freeStartAddress; + CmpCq: objectMemory getScavengeThreshold R: TempReg. + skip := cogit JumpBelow: 0. + cogit CallRT: ceScheduleScavengeTrampoline. + skip jmpTarget: cogit Label. + ^0! Item was added: + ----- Method: CogObjectRepresentationForSpur>>genNoPopCreateClosureAt:numArgs:numCopied:contextNumArgs:large:inBlock: (in category 'bytecode generator support') ----- + genNoPopCreateClosureAt: bcpc numArgs: numArgs numCopied: numCopied contextNumArgs: ctxtNumArgs large: isLargeCtxt inBlock: isInBlock + "Create a closure with the given startpc, numArgs and numCopied + within a context with ctxtNumArgs, large if isLargeCtxt that is in a + block if isInBlock. Do /not/ initialize the copied values." + | numSlots byteSize header skip | + <var: #skip type: #'AbstractInstruction *'> + + "First get thisContext into ReceiverResultRega and thence in ClassReg." + self genGetActiveContextNumArgs: ctxtNumArgs large: isLargeCtxt inBlock: isInBlock. + cogit MoveR: ReceiverResultReg R: ClassReg. + + numSlots := ClosureFirstCopiedValueIndex + numCopied. + byteSize := objectMemory smallObjectBytesForSlots: numSlots. + header := objectMemory + headerForSlots: numSlots + format: objectMemory indexablePointersFormat + classIndex: ClassBlockClosureCompactIndex. + cogit MoveAw: objectMemory freeStartAddress R: ReceiverResultReg. + self genLoadHeader: header intoNewInstance: ReceiverResultReg using: TempReg. + cogit + LoadEffectiveAddressMw: byteSize r: ReceiverResultReg R: TempReg; + MoveR: TempReg Aw: objectMemory freeStartAddress; + CmpCq: objectMemory getScavengeThreshold R: TempReg. + skip := cogit JumpBelow: 0. + cogit CallRT: ceScheduleScavengeTrampoline. + skip jmpTarget: cogit Label. + + cogit + MoveR: ClassReg Mw: ClosureOuterContextIndex * objectMemory bytesPerOop + objectMemory baseHeaderSize r: ReceiverResultReg; + MoveCq: (objectMemory integerObjectOf: bcpc) R: TempReg; + MoveR: TempReg Mw: ClosureStartPCIndex * objectMemory bytesPerOop + objectMemory baseHeaderSize r: ReceiverResultReg; + MoveCq: (objectMemory integerObjectOf: numArgs) R: TempReg; + MoveR: TempReg Mw: ClosureNumArgsIndex * objectMemory bytesPerOop + objectMemory baseHeaderSize r: ReceiverResultReg. + ^0! Item was added: + ----- Method: CogX64Compiler>>instructionSizeAt: (in category 'disassembly') ----- + instructionSizeAt: pc + "Answer the instruction size at pc. This is used in method disassembly + to decode the jumps in block dispatch to discover where block methods + occur within a larger method. This is very far from a full decode." + | op | + op := objectMemory byteAt: pc. + (op bitAnd: 16rF8) = 16r48 ifTrue: + [^1 + (self instructionSizeAt: pc + 1)]. + ^op caseOf: + { [16r0F] -> [self twoByteInstructionSizeAt: pc]. + [16r3D] -> [5]. "cmp EAX,imm32" + [16r70] -> [2]. "short conditional jumps" + [16r71] -> [2]. + [16r72] -> [2]. + [16r73] -> [2]. + [16r74] -> [2]. + [16r75] -> [2]. + [16r76] -> [2]. + [16r77] -> [2]. + [16r78] -> [2]. + [16r79] -> [2]. + [16r7A] -> [2]. + [16r7B] -> [2]. + [16r7C] -> [2]. + [16r7D] -> [2]. + [16r7E] -> [2]. + [16r7F] -> [2]. + [16r83] -> [self sizeImmediateGroup1: op at: pc]. + [16r89] -> [2]. "MOV Eb,Gb" + [16r8B] -> [self sizeHasModrm: op at: pc]. + [16r90] -> [1]. "nop" + [16rE9] -> [5]. "long unconditional jump" + [16rEB] -> [2] "short unconditional jump" }! Item was added: + ----- Method: CogX64Compiler>>jumpTargetPCAt: (in category 'disassembly') ----- + jumpTargetPCAt: pc + <returnTypeC: #usqInt> + | size byte offset | + size := self instructionSizeAt: pc. + size = 2 + ifTrue: + [byte := objectMemory byteAt: pc + 1. + offset := (byte bitAnd: 16r80) = 0 ifTrue: [byte] ifFalse: [byte - 256]] + ifFalse: + [byte := objectMemory byteAt: pc + size - 1. + offset := (byte bitAnd: 16r80) = 0 ifTrue: [byte] ifFalse: [byte - 256]. + offset := offset << 8 + (objectMemory byteAt: pc + size - 2). + offset := offset << 8 + (objectMemory byteAt: pc + size - 3). + offset := offset << 8 + (objectMemory byteAt: pc + size - 4)]. + ^pc + size + offset! Item was added: + ----- Method: CogX64Compiler>>sizeHasModrm:at: (in category 'disassembly') ----- + sizeHasModrm: op at: pc + | modrm mod ro rm | + modrm := objectMemory byteAt: pc + 1. + mod := modrm >> 6. + ro := modrm >> 3 bitAnd: 7. + rm := modrm bitAnd: 7. + mod = 3 ifTrue: + [^2]. + rm ~= 4 ifTrue: "no SIB byte" + [^mod caseOf: + { [0] -> [rm = 5 + ifTrue: [6] "reg or 32-bit displacement" + ifFalse: [3]]. + [1] -> [3]. "8-bit displacement" + [2] -> [6] }]. + self halt: 'fall through in sizeHasModrm:at:'. + ^0! Item was added: + ----- Method: CogX64Compiler>>twoByteInstructionSizeAt: (in category 'disassembly') ----- + twoByteInstructionSizeAt: pc + | op | + op := objectMemory byteAt: pc + 1. + ^(op bitAnd: 16rF0) caseOf: + { [16r80] -> [6 "long conditional jumps"] }!

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VM Maker: VMMaker.oscog-eem.1507.mcz
by commits＠source.squeak.org 04 Nov '15

04 Nov '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1507.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1507 Author: eem Time: 3 November 2015, 7:19:44.589 pm UUID: 89bfdb3d-78c9-442b-80d8-3be3b6577397 Ancestors: VMMaker.oscog-eem.1506 x64 Cogit: Fix ceDereferenceSelectorIndex for blocks; must locate the homeMethod to fetch literals. Implement Fill32 and fix compileBlockEntry:. Fix JumpFull & NegateR. Some way to implementing identity hash (still needs SmallFloat testing). Comment assumption of sign-extension for 16-bit & 32-bit partial word reads. Revise the generation of accessors for surrogates, so that one can look at the generated code without necessarily compiling it. Fix the failure to round up the bit position to derive the alignedByteSize. Fix alignedByteSize for CogBlockMethodSurrogate64. Comment typos. =============== Diff against VMMaker.oscog-eem.1506 =============== Item was changed: ----- Method: CogBlockMethodSurrogate64 class>>alignedByteSize (in category 'accessing') ----- alignedByteSize + ^8 + self baseHeaderSize! - ^4 + self baseHeaderSize! Item was added: + ----- Method: CogObjectRepresentationFor64BitSpur>>genGetHashFieldNonImmOf:asSmallIntegerInto: (in category 'compile abstract instructions') ----- + genGetHashFieldNonImmOf: instReg asSmallIntegerInto: destReg + "Fetch the instance's identity hash into destReg, encoded as a SmallInteger." + "Get header word in scratchReg" + cogit MoveMw: 0 r: instReg R: destReg. + "Shift and mask the field leaving room for the SmallInteger tag." + cogit LogicalShiftRightCq: objectMemory identityHashFullWordShift R: destReg. + cogit AndCq: objectMemory identityHashHalfWordMask R: destReg. + self genConvertIntegerToSmallIntegerInReg: destReg. + ^0! Item was added: + ----- Method: CogObjectRepresentationFor64BitSpur>>genInnerPrimitiveIdentityHash: (in category 'primitive generators') ----- + genInnerPrimitiveIdentityHash: retNoffset + | jumpImm jumpSI jumpSF jumpNotSet ret | + <var: #jumpSI type: #'AbstractInstruction *'> + <var: #jumpSF type: #'AbstractInstruction *'> + <var: #jumpImm type: #'AbstractInstruction *'> + <var: #jumpNotSet type: #'AbstractInstruction *'> + jumpImm := self genJumpImmediate: ReceiverResultReg. + self genGetHashFieldNonImmOf: ReceiverResultReg asSmallIntegerInto: TempReg. + cogit CmpCq: ConstZero R: TempReg. + jumpNotSet := cogit JumpZero: 0. + cogit MoveR: TempReg R: ReceiverResultReg. + ret := cogit RetN: retNoffset. + jumpImm jmpTarget: cogit Label. + jumpSI := self genJumpSmallInteger: ReceiverResultReg. + jumpSI asInteger = UnimplementedOperation ifTrue: + [cogit MoveR: ReceiverResultReg R: TempReg. + jumpSI := self genJumpSmallIntegerInScratchReg: TempReg]. + jumpSI jmpTarget: ret. + "Fail SmallFloat because their hash uses rotatedFloatBitsOf: the oop" + jumpSF := self genJumpSmallFloat: ReceiverResultReg. + jumpSF asInteger = UnimplementedOperation ifTrue: + [cogit MoveR: ReceiverResultReg R: TempReg. + jumpSI := self genJumpSmallFloatInScratchReg: TempReg]. + self genConvertCharacterToSmallIntegerInReg: ReceiverResultReg. + cogit Jump: ret. + jumpNotSet jmpTarget: (jumpSF jmpTarget: cogit Label). + ^0! Item was changed: ----- Method: CogObjectRepresentationFor64BitSpur>>maybeGenerateSelectorIndexDereferenceRoutine (in category 'initialization') ----- maybeGenerateSelectorIndexDereferenceRoutine "Generate the routine that converts selector indices into selector objects. It is called from the send trampolines. If the selector index is negative, convert it into a positive index into the special selectors array and index that. Otherwise, index the current method." + | jumpNegative jumpNotBlock | - | jumpNegative | <var: 'jumpNegative' type: #'AbstractInstruction *'> + <var: 'jumpNotBlock' type: #'AbstractInstruction *'> cogit zeroOpcodeIndex. cogit CmpCq: 0 R: ClassReg. jumpNegative := cogit JumpLess: 0. cogit MoveMw: FoxMethod r: FPReg R: Scratch0Reg; AddCq: 2 R: ClassReg; "Change selector index to 1-relative, skipping the method header" + TstCq: MFMethodFlagIsBlockFlag R: Scratch0Reg. + jumpNotBlock := cogit JumpZero: 0. + cogit "If in a block, need to find the home method..." AndCq: methodZone alignment negated R: Scratch0Reg; + MoveM16: 0 r: Scratch0Reg R: Scratch1Reg; + SubR: Scratch1Reg R: Scratch0Reg. + jumpNotBlock jmpTarget: cogit Label. + cogit "Now fetch the method object and index with the literal index to retrieve the selector" + AndCq: methodZone alignment negated R: Scratch0Reg; MoveMw: (cogit offset: CogMethod of: #methodObject) r: Scratch0Reg R: Scratch1Reg; MoveXwr: ClassReg R: Scratch1Reg R: ClassReg; RetN: 0. jumpNegative jmpTarget: cogit Label. cogit NegateR: ClassReg; LogicalShiftLeftCq: 1 R: ClassReg; MoveAw: objectMemory specialObjectsArrayAddress R: Scratch0Reg; SubCq: 1 R: ClassReg; MoveMw: SpecialSelectors + 1 * objectMemory wordSize r: Scratch0Reg R: Scratch1Reg; "Index, including header size" MoveXwr: ClassReg R: Scratch1Reg R: ClassReg; RetN: 0. ceDereferenceSelectorIndex := cogit methodZoneBase. cogit outputInstructionsForGeneratedRuntimeAt: ceDereferenceSelectorIndex; recordGeneratedRunTime: 'ceDereferenceSelectorIndex' address: ceDereferenceSelectorIndex; recordRunTimeObjectReferences! Item was changed: ----- Method: CogRTLOpcodes class>>initialize (in category 'class initialization') ----- initialize "Abstract opcodes are a compound of a one word operation specifier and zero or more operand type specifiers. e.g. MoveRR is the Move opcode with two register operand specifiers and defines a move register to register instruction from operand 0 to operand 1. The word and register size is assumed to be either 32-bits on a 32-bit architecture or 64-bits on a 64-bit architecture. The abstract machine is mostly a 2 address machine with the odd three address instruction added to better exploit RISCs. (self initialize) The operand specifiers are R - general purpose register Rd - double-precision floating-point register Cq - a `quick' constant that can be encoded in the minimum space possible. Cw - a constant with word size where word is the default operand size for the Smalltalk VM, 32-bits for a 32-bit VM, 64-bits for a 64-bit VM. The generated constant must occupy the default number of bits. This allows e.g. a garbage collector to update the value without invalidating the code. C32 - a constant with 32 bit size. The generated constant must occupy 32 bits. C64 - a constant with 64 bit size. The generated constant must occupy 64 bits. Aw - memory word at an absolute address Ab - memory byte at an absolute address Mwr - memory word whose address is at a constant offset from an address in a register Mbr - memory byte whose address is at a constant offset from an address in a register (zero-extended on read) M16r - memory 16-bit halfword whose address is at a constant offset from an address in a register M32r - memory 32-bit halfword whose address is at a constant offset from an address in a register M64r - memory 64-bit doubleword whose address is at a constant offset from an address in a register XbrR - memory word whose address is r * byte size away from an address in a register X16rR - memory word whose address is r * (2 bytes size) away from an address in a register XwrR - memory word whose address is r * word size away from an address in a register XowrR - memory word whose address is (r * word size) + o away from an address in a register (scaled indexed) An alternative would be to decouple opcodes from operands, e.g. Move := 1. Add := 2. Sub := 3... RegisterOperand := 1. ConstantQuickOperand := 2. ConstantWordOperand := 3... But not all combinations make sense and even fewer are used so we stick with the simple compound approach. The assumption is that comparison and arithmetic instructions set condition codes and that move instructions leave the condition codes unaffected. In particular LoadEffectiveAddressMwrR does not set condition codes although it can be used to do arithmetic. Not all of the definitions in opcodeDefinitions below are implemented. In particular we do not implement the XowrR scaled index addressing mode since it requires 4 operands. Note that there are no generic division instructions defined, but a processor may define some. Branch/Call ranges. Jump[Cond] can be generated as short as possible. Call/Jump[Cond]Long must be generated in the same number of bytes irrespective of displacement since their targets may be updated, but they need only span 16Mb, the maximum size of the code zone. This allows e.g. ARM to use single-word call and jump instructions for most calls and jumps. CallFull/JumpFull must also be generated in the same number of bytes irrespective of displacement for the same reason, but they must be able to span the full (32-bit or 64-bit) address space because they are used to call code in the C runtime, which may be distant from the code zone. CallFull/JumpFull are allowed to use the cResultRegister as a scratch if required (e.g. on x64 where there is no direct 64-bit call or jump). Byte reads. If the concrete compiler class answers true to byteReadsZeroExtend then byte reads must zero-extend the byte read into the destination register. If not, the other bits of the register should be left undisturbed and the + Cogit will add an instruction to zero the register as required. Under no circumstances should byte reads sign-extend. - Cogit will add an instruction to zero the register as required. Under no circumstances should byte reads sign-extend." + 16-bit (and on 64-bits, 32-bit) reads. These /are/ expected to always zero-extend." + | opcodeNames refs | "A small fixed set of abstract registers are defined and used in code generation for Smalltalk code, and executes on stack pages in the stack zone. These are mapped to processor-specific registers by concreteRegister:" FPReg := -1. "A frame pointer is used for Smalltalk frames." SPReg := -2. ReceiverResultReg := -3. "The receiver at point of send, and return value of a send" TempReg := -4. ClassReg := -5. "The inline send cache class tag is in this register, loaded at the send site" SendNumArgsReg := -6. "Sends > 2 args set the arg count in this reg" Arg0Reg := -7. "In the StackToRegisterMappingCogit 1 & 2 arg sends marshall into these registers." Arg1Reg := -8. "A small fixed set of abstract scratch registers for register-rich machines (ARM can use 1, x64 can use 6)." Scratch0Reg := -9. Scratch1Reg := -10. Scratch2Reg := -11. Scratch3Reg := -12. Scratch4Reg := -13. Scratch5Reg := -14. Scratch6Reg := -15. Scratch7Reg := -16. "RISC-specific registers" LinkReg := -17. RISCTempReg := -18. "Used to synthesize CISC instructions from multiple RISC instructions." PCReg := -19. VarBaseReg := -20. "If useful, points to base of interpreter variables." "Floating-point registers" DPFPReg0 := -21. DPFPReg1 := -22. DPFPReg2 := -23. DPFPReg3 := -24. DPFPReg4 := -25. DPFPReg5 := -26. DPFPReg6 := -27. DPFPReg7 := -28. opcodeNames := #("Noops & Pseudo Ops" Label Literal "a word-sized literal" AlignmentNops FillBytesFrom "output operand 0's worth of bytes from the address in operand 1" Fill8 "output a byte's worth of bytes with operand 0" Fill16 "output two byte's worth of bytes with operand 0" Fill32 "output four byte's worth of bytes with operand 0" FillFromWord "output BytesPerWord's worth of bytes with operand 0 + operand 1" Nop "Control" Call "call within the code zone" CallFull "call anywhere within the full address space" RetN JumpR "Not a regular jump, i.e. not pc dependent." Stop "Halt the processor" "N.B. Jumps are contiguous. Long and Full jumps are contigiuous within them. See FirstJump et al below" JumpFull "Jump anywhere within the address space" JumpLong "Jump anywhere within the 16mb code zone." JumpLongZero "a.k.a. JumpLongEqual" JumpLongNonZero "a.k.a. JumpLongNotEqual" Jump "short jumps; can be encoded in as few bytes as possible; will not be disturbed by GC or relocation." JumpZero "a.k.a. JumpEqual" JumpNonZero "a.k.a. JumpNotEqual" JumpNegative JumpNonNegative JumpOverflow JumpNoOverflow JumpCarry JumpNoCarry JumpLess "signed" JumpGreaterOrEqual JumpGreater JumpLessOrEqual JumpBelow "unsigned" JumpAboveOrEqual JumpAbove JumpBelowOrEqual JumpFPEqual JumpFPNotEqual JumpFPLess JumpFPLessOrEqual JumpFPGreater JumpFPGreaterOrEqual JumpFPOrdered JumpFPUnordered "Data Movement; destination is always last operand" MoveRR MoveAwR MoveRAw MoveAbR MoveRAb MoveMwrR MoveRMwr MoveXwrRR MoveRXwrR MoveXowrR MoveRXowr MoveM16rR MoveRM16r MoveX16rRR MoveRX16rR MoveM32rR MoveRM32r MoveX32rRR MoveRX32rR MoveMbrR MoveRMbr MoveXbrRR MoveRXbrR MoveCqR MoveCwR MoveC32R MoveC64R MoveRdRd MoveM64rRd MoveRdM64r PopR PushR PushCq PushCw PrefetchAw "Arithmetic; destination is always last operand except Cmp; CmpXR is SubRX with no update of result" LoadEffectiveAddressMwrR LoadEffectiveAddressXowrR "Variants of add/multiply" NegateR "2's complement negation" ArithmeticShiftRightCqR ArithmeticShiftRightRR LogicalShiftRightCqR LogicalShiftRightRR LogicalShiftLeftCqR LogicalShiftLeftRR CmpRR AddRR SubRR AndRR OrRR XorRR CmpCqR AddCqR SubCqR AndCqR OrCqR TstCqR XorCqR CmpCwR CmpC32R AddCwR SubCwR AndCwR OrCwR XorCwR AndCqRR CmpRdRd AddRdRd SubRdRd MulRdRd DivRdRd SqrtRd "Conversion" ConvertRRd LastRTLCode). "Magic auto declaration. Add to the classPool any new variables and nuke any obsolete ones, and assign values" "Find the variables directly referenced by this method" refs := (thisContext method literals select: [:l| l isVariableBinding and: [classPool includesKey: l key]]) collect: [:ea| ea key]. "Move to Undeclared any opcodes in classPool not in opcodes or this method." (classPool keys reject: [:k| (opcodeNames includes: k) or: [refs includes: k]]) do: [:k| Undeclared declare: k from: classPool]. "Declare as class variables and number elements of opcodeArray above" opcodeNames withIndexDo: [:classVarName :value| self classPool declare: classVarName from: Undeclared; at: classVarName put: value]. "For CogAbstractInstruction>>isJump etc..." FirstJump := JumpFull. LastJump := JumpFPUnordered. FirstShortJump := Jump. "And now initialize the backends; they add their own opcodes and hence these must be reinitialized." (Smalltalk classNamed: #CogAbstractInstruction) ifNotNil: [:cogAbstractInstruction| cogAbstractInstruction allSubclasses do: [:sc| sc initialize]]! Item was changed: ----- Method: CogX64Compiler>>concretizeCallFull (in category 'generate machine code') ----- concretizeCallFull "Since CallFull (and JumpFull) is used to invoke code in dynamically-loaded plugins it shouldn't assume that code will be loaded within 2Gb of the code zone. Hence generate a full 64-bit call, + movabsq 0x123456789abcdef0, %rax; callq *%rax." - movabsq 0x123456789abcdef0, %rax; callq %rax." <inline: true> | operand | operand := operands at: 0. machineCode at: 0 put: 16r48; at: 1 put: 16rA1; at: 2 put: (operand bitAnd: 16rFF); at: 3 put: (operand >> 8 bitAnd: 16rFF); at: 4 put: (operand >> 16 bitAnd: 16rFF); at: 5 put: (operand >> 24 bitAnd: 16rFF); at: 6 put: (operand >> 32 bitAnd: 16rFF); at: 7 put: (operand >> 40 bitAnd: 16rFF); at: 8 put: (operand >> 48 bitAnd: 16rFF); at: 9 put: (operand >> 56 bitAnd: 16rFF); at: 10 put: 16rFF; + at: 11 put: (self mod: ModReg RM: RAX RO: 2). - at: 11 put: (self mod: 3 RM: RAX RO: 2). ^machineCodeSize := 12! Item was added: + ----- Method: CogX64Compiler>>concretizeFill32 (in category 'generate machine code') ----- + concretizeFill32 + <inline: true> + | word | + <var: #word type: #'unsigned long'> + word := operands at: 0. + machineCode at: 0 put: (word bitAnd: 16rFF). + machineCode at: 1 put: word >> 8. + machineCode at: 2 put: word >> 16. + machineCode at: 3 put: word >> 24. + ^machineCodeSize := 4! Item was changed: ----- Method: CogX64Compiler>>concretizeJumpFull (in category 'generate machine code') ----- concretizeJumpFull "Since JumpFull (and CallFull) is used to invoke code in dynamically-loaded plugins it shouldn't assume that code will be loaded within 2Gb of the code zone. Hence generate a full 64-bit call, + movabsq 0x123456789abcdef0, %rax; jmpq *%rax." - movabsq 0x123456789abcdef0, %rax; callq %rax." <inline: true> | operand | operand := operands at: 0. machineCode at: 0 put: 16r48; at: 1 put: 16rA1; at: 2 put: (operand bitAnd: 16rFF); at: 3 put: (operand >> 8 bitAnd: 16rFF); at: 4 put: (operand >> 16 bitAnd: 16rFF); at: 5 put: (operand >> 24 bitAnd: 16rFF); at: 6 put: (operand >> 32 bitAnd: 16rFF); at: 7 put: (operand >> 40 bitAnd: 16rFF); at: 8 put: (operand >> 48 bitAnd: 16rFF); at: 9 put: (operand >> 56 bitAnd: 16rFF); at: 10 put: 16rFF; + at: 11 put: (self mod: ModReg RM: RAX RO: 4). - at: 11 put: (self mod: 4 RM: RAX RO: 2). ^machineCodeSize := 12! Item was changed: ----- Method: CogX64Compiler>>concretizeNegateR (in category 'generate machine code') ----- concretizeNegateR "Will get inlined into concretizeAt: switch." <inline: true> | reg | reg := self concreteRegister: (operands at: 0). machineCode + at: 0 put: (self rexR: 0 x: 0 b: reg); - at: 0 put: (self rexR: reg x: 0 b: reg); at: 1 put: 16rF7; at: 2 put: (self mod: ModReg RM: reg RO: 3). ^machineCodeSize := 3! Item was added: + ----- Method: CogX64Compiler>>isJumpAt: (in category 'disassembly') ----- + isJumpAt: pc + | op | + op := objectMemory byteAt: pc. + ^ (op between: 16r70 and: 16r7F) "short conditional jumps" + or: [op = 16rE9 "long unconditional jump" + or: [op = 16rEB "short unconditional jump" + or: [(op = 16r0F "long conditional jumps" + and: [(objectMemory byteAt: pc + 1) between: 16r80 and: 16r8F]) + or: [op = 16r48 "full unconditional jumps" + and: [(objectMemory byteAt: pc + 1) = 16rA1 + and: [(objectMemory byteAt: pc + 10) = 16rFF + and: [(objectMemory byteAt: pc + 11) = 16rE0]]]]]]]! Item was changed: ----- Method: Cogit>>compileBlockEntry: (in category 'compile abstract instructions') ----- compileBlockEntry: blockStart "Compile a block's entry. This looks like a dummy CogBlockMethod header (for frame parsing) followed by either a frame build, if a frame is required, or nothing. The CogMethodHeader's objectHeader field is a back pointer to the method, but this can't be filled in until code generation." <var: #blockStart type: #'BlockStart *'> self AlignmentNops: self blockAlignment. blockStart fakeHeader: self Label. (self sizeof: CogBlockMethod) caseOf: + { [8] "ObjectMemory" - { [2 * objectMemory wordSize] "ObjectMemory" -> [self Fill32: 0. "gets filled in later with the homeOffset and startpc" self Fill32: 0]. "gets filled in later with numArgs et al" + [12] "Spur 32-bit" - [3 * objectMemory wordSize] "Spur" -> [self Fill32: 0. "gets filled in later with the homeOffset and startpc" self Fill32: 0. "is left fallow" self Fill32: 0]. "gets filled in later with numArgs et al" + [16] "Spur 64-bit" + -> [self Fill32: 0. "gets filled in later with the homeOffset and startpc" + self Fill32: 0. "is left fallow" + self Fill32: 0. "gets filled in later with numArgs et al" + self Fill32: 0]. }. blockStart entryLabel: self Label. needsFrame ifTrue: [self compileBlockFrameBuild: blockStart. self recordBlockTrace ifTrue: [self CallRT: ceTraceBlockActivationTrampoline]] ifFalse: [self compileBlockFramelessEntry: blockStart]! Item was added: + ----- Method: VMStructType class>>changedAccesorsForSurrogate:bytesPerWord: (in category 'code generation') ----- + changedAccesorsForSurrogate: surrogateClass bytesPerWord: bytesPerWord + "Answer the changed accessor methods for the fields of the receiver and the alignedByteSize class method." + + "{CogBlockMethod changedAccesorsForSurrogate: CogBlockMethodSurrogate32 bytesPerWord: 4. + CogMethod changedAccesorsForSurrogate: CogMethodSurrogate32 bytesPerWord: 4. + CogBlockMethod changedAccesorsForSurrogate: CogBlockMethodSurrogate64 bytesPerWord: 8. + CogMethod changedAccesorsForSurrogate: CogMethodSurrogate64 bytesPerWord: 8}" + + ^Dictionary withAll: ((self fieldAccessorSourceFor: surrogateClass bytesPerWord: bytesPerWord) associationsSelect: + [:a| a value ~= a key sourceString])! Item was removed: - ----- Method: VMStructType class>>checkGenerateFieldAccessors:bitPosition:in: (in category 'code generation') ----- - checkGenerateFieldAccessors: fieldSpecs bitPosition: firstBitPosition in: surrogateClass - | bitPosition alignedByteSize currentOffset code | - bitPosition := firstBitPosition. - fieldSpecs do: - [:spec| - "reset the bitPosition if the offset expression changes." - currentOffset ~= (self offsetForInstVar: spec first) ifTrue: - [bitPosition := firstBitPosition. - currentOffset := self offsetForInstVar: spec first]. - "If the accessor is already defined in a superclass don't redefine it in the subclass. - We assume it is correctly defined in the superclass." - (spec first ~= #unused - and: [(surrogateClass whichClassIncludesSelector: spec first asSymbol) - ifNil: [true] - ifNotNil: [:implementingClass| - self assert: (implementingClass inheritsFrom: Object). - implementingClass == surrogateClass]]) ifTrue: - [code := self getter: spec first - bitPosition: bitPosition - bitWidth: spec second - type: (spec at: 3 ifAbsent: []). - code ~= (surrogateClass sourceCodeAt: spec first asSymbol ifAbsent: ['']) asString ifTrue: - [surrogateClass compile: code classified: #accessing]. - code := self setter: spec first - bitPosition: bitPosition - bitWidth: spec second - type: (spec at: 3 ifAbsent: []). - code ~= (surrogateClass sourceCodeAt: (spec first, ':') asSymbol ifAbsent: ['']) asString ifTrue: - [surrogateClass compile: code classified: #accessing]]. - bitPosition := bitPosition + spec second]. - alignedByteSize := bitPosition / 8. - self assert: alignedByteSize isInteger. - code := 'alignedByteSize' - , (String with: Character cr with: Character tab with: $^) - , alignedByteSize printString, - (currentOffset ifNil: [''] ifNotNil: [' + self ', currentOffset]). - code ~= (surrogateClass class sourceCodeAt: #alignedByteSize) asString ifTrue: - [surrogateClass class compile: code classified: #accessing]! Item was changed: ----- Method: VMStructType class>>checkGenerateSurrogate:bytesPerWord: (in category 'code generation') ----- + checkGenerateSurrogate: surrogateClass bytesPerWord: bytesPerWord + "Check the accessor methods for the fields of the receiver and if necessary install new + or updated versions in the surrogate class alpng with the alignedByteSize class method." - checkGenerateSurrogate: class bytesPerWord: bytesPerWord - self checkGenerateFieldAccessors: (self fieldAccessorsForBytesPerWord: bytesPerWord) - bitPosition: 0 - in: class "CogBlockMethod checkGenerateSurrogate: CogBlockMethodSurrogate32 bytesPerWord: 4. + CogMethod checkGenerateSurrogate: CogMethodSurrogate32 bytesPerWord: 4. + CogBlockMethod checkGenerateSurrogate: CogBlockMethodSurrogate64 bytesPerWord: 8. + CogMethod checkGenerateSurrogate: CogMethodSurrogate64 bytesPerWord: 8" + | accessors | + accessors := self fieldAccessorSourceFor: surrogateClass bytesPerWord: bytesPerWord. + accessors keysAndValuesDo: + [:mr :source| + source ~= mr sourceString ifTrue: + [mr actualClass compile: source classified: #accessing]] + + "Dictionary withAll: ((self fieldAccessorSourceFor: surrogateClass bytesPerWord: bytesPerWord) associationsSelect: + [:a| a value ~= a key sourceString])"! - CogMethod checkGenerateSurrogate: CogMethodSurrogate32 bytesPerWord: 4"! Item was added: + ----- Method: VMStructType class>>fieldAccessorSourceFor:bytesPerWord: (in category 'code generation') ----- + fieldAccessorSourceFor: surrogateClass bytesPerWord: bytesPerWord + "Answer a Dictionary of MethodReference to source for the accessors of the inst vars of the + receiver and the alignedByteSize class method in surrogateClass with the given word size." + + "{CogBlockMethod fieldAccessorSourceFor: CogBlockMethodSurrogate32 bytesPerWord: 4. + CogMethod fieldAccessorSourceFor: CogMethodSurrogate32 bytesPerWord: 4. + CogBlockMethod fieldAccessorSourceFor: CogBlockMethodSurrogate64 bytesPerWord: 8. + CogMethod fieldAccessorSourceFor: CogMethodSurrogate64 bytesPerWord: 8}" + | methods bitPosition alignedByteSize currentOffset | + methods := Dictionary new. + bitPosition := 0. + (self fieldAccessorsForBytesPerWord: bytesPerWord) do: + [:spec| + "reset the bitPosition if the offset expression changes." + currentOffset ~= (self offsetForInstVar: spec first) ifTrue: + [bitPosition := 0. + currentOffset := self offsetForInstVar: spec first]. + "If the accessor is already defined in a superclass don't redefine it in the subclass. + We assume it is correctly defined in the superclass." + (spec first ~= #unused + and: [(surrogateClass whichClassIncludesSelector: spec first asSymbol) + ifNil: [true] + ifNotNil: [:implementingClass| + self assert: (implementingClass inheritsFrom: Object). + implementingClass == surrogateClass]]) ifTrue: + [methods + at: (MethodReference class: surrogateClass selector: spec first asSymbol) + put: (self getter: spec first + bitPosition: bitPosition + bitWidth: spec second + type: (spec at: 3 ifAbsent: [])); + at: (MethodReference class: surrogateClass selector: (spec first, ':') asSymbol) + put: (self setter: spec first + bitPosition: bitPosition + bitWidth: spec second + type: (spec at: 3 ifAbsent: []))]. + bitPosition := bitPosition + spec second]. + alignedByteSize := (self roundUpBitPosition: bitPosition toWordBoundary: bytesPerWord) / 8. + self assert: alignedByteSize isInteger. + methods + at: (MethodReference class: surrogateClass class selector: #alignedByteSize) + put: #alignedByteSize + , (String with: Character cr with: Character tab with: $^) + , alignedByteSize printString, + (currentOffset ifNil: [''] ifNotNil: [' + self ', currentOffset]). + ^methods! Item was added: + ----- Method: VMStructType class>>roundUpBitPosition:toWordBoundary: (in category 'code generation') ----- + roundUpBitPosition: bitPosition toWordBoundary: bytesPerWord + ^bitPosition + 7 // 8 + bytesPerWord - 1 // bytesPerWord * bytesPerWord * 8!

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[commit][3481] JMM - adjustments to arc/nonarc via Nicolas Cellier, 64bit cleanup, fix zombie at quit time SQK-21
by commits＠squeakvm.org 04 Nov '15

04 Nov '15

Revision: 3481 Author: johnmci Date: 2015-11-01 16:02:54 -0800 (Sun, 01 Nov 2015) Log Message: ----------- JMM - adjustments to arc/nonarc via Nicolas Cellier, 64bit cleanup, fix zombie at quit time SQK-21 Modified Paths: -------------- branches/Cog/build.macos32x86/squeak.cog.spur/SqueakCogSpur32x86.xcodeproj/project.pbxproj branches/Cog/build.macos32x86/squeak.cog.spur/SqueakCogSpur32x86.xcworkspace/xcuserdata/johnmci.xcuserdatad/UserInterfaceState.xcuserstate branches/Cog/build.macos64x64/squeak.stack.spur/SqueakPureObjcCog.xcodeproj/project.xcworkspace/xcuserdata/johnmci.xcuserdatad/UserInterfaceState.xcuserstate branches/Cog/build.macos64x64/squeak.stack.spur/SqueakPureObjc_Prefix.pch branches/Cog/platforms/Mac OS/plugins/MIDIPlugin/sqMacMIDI.c branches/Cog/platforms/iOS/plugins/ClipboardExtendedPlugin/sqMacExtendedClipboard.h branches/Cog/platforms/iOS/plugins/ClipboardExtendedPlugin/sqMacExtendedClipboard.m branches/Cog/platforms/iOS/plugins/MIDIPlugin/sqMacMIDI.m branches/Cog/platforms/iOS/plugins/MacMenubarPlugin/MacMenuOS9ToOSX.m branches/Cog/platforms/iOS/plugins/MacMenubarPlugin/MacMenubarPlugin.h branches/Cog/platforms/iOS/plugins/SoundPlugin/sqSqueakSoundCoreAudio.m branches/Cog/platforms/iOS/plugins/SqueakObjectiveC/squeakProxy.m branches/Cog/platforms/iOS/vm/Common/Classes/Queue.m branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakAppDelegate.m branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakFileDirectoryAPI.m branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakFileDirectoryInterface.m branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakInfoPlistInterface.m branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakMainApplication+events.m branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakMainApplication.m branches/Cog/platforms/iOS/vm/OSX/SqViewBitmapConversion.m branches/Cog/platforms/iOS/vm/OSX/SqueakOSXAppDelegate.m branches/Cog/platforms/iOS/vm/OSX/plugins/HostWindowPlugin/sqMacHostWindow.m branches/Cog/platforms/iOS/vm/OSX/sqMacUnixExternalPrims.m branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXApplication+clipboard.m branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXApplication+cursor.m branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXApplication+events.m branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXApplication.m branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXCGView.m branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXFileDirectoryInterface.m branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXOpenGLView.m branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXScreenAndWindow.m branches/Cog/platforms/iOS/vm/SqueakPureObjc_Prefix.pch branches/Cog/platforms/iOS/vm/iPhone/sqMacV2Memory.c branches/Cog/platforms/unix/plugins/AsynchFilePlugin/sqUnixAsynchFile.c branches/Cog/platforms/unix/vm/sqUnixHeartbeat.c Modified: branches/Cog/build.macos32x86/squeak.cog.spur/SqueakCogSpur32x86.xcodeproj/project.pbxproj =================================================================== --- branches/Cog/build.macos32x86/squeak.cog.spur/SqueakCogSpur32x86.xcodeproj/project.pbxproj 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/build.macos32x86/squeak.cog.spur/SqueakCogSpur32x86.xcodeproj/project.pbxproj 2015-11-02 00:02:54 UTC (rev 3481) @@ -11,9 +11,9 @@ 9402DD7010CE0E91005C2102 /* SqViewClut.m in Sources */ = {isa = PBXBuildFile; fileRef = 9402DD6F10CE0E91005C2102 /* SqViewClut.m */; }; 9422C3B51AFFFAC500448DC0 /* Localizable.strings in Resources */ = {isa = PBXBuildFile; fileRef = 9422C3B31AFFFAC500448DC0 /* Localizable.strings */; }; 943B9CA11235C5120056205E /* sqMacHostWindow.m in Sources */ = {isa = PBXBuildFile; fileRef = 943B9C9E1235C5120056205E /* sqMacHostWindow.m */; }; - 944154941BD595710062FCDE /* sqMacUnixExternalPrims.m in Sources */ = {isa = PBXBuildFile; fileRef = 946DA9FF10C0D35500F26F56 /* sqMacUnixExternalPrims.m */; settings = {ASSET_TAGS = (); }; }; - 94502E951BB609AC00EA8942 /* sqUnixSpurMemory.c in Sources */ = {isa = PBXBuildFile; fileRef = 94502E941BB609AC00EA8942 /* sqUnixSpurMemory.c */; settings = {ASSET_TAGS = (); }; }; - 94502E971BB71A9200EA8942 /* sqSqueakMainApplication+imageReadWrite.m in Sources */ = {isa = PBXBuildFile; fileRef = 94A0E8840DE5EF430071C8B9 /* sqSqueakMainApplication+imageReadWrite.m */; settings = {ASSET_TAGS = (); }; }; + 944154941BD595710062FCDE /* sqMacUnixExternalPrims.m in Sources */ = {isa = PBXBuildFile; fileRef = 946DA9FF10C0D35500F26F56 /* sqMacUnixExternalPrims.m */; }; + 94502E951BB609AC00EA8942 /* sqUnixSpurMemory.c in Sources */ = {isa = PBXBuildFile; fileRef = 94502E941BB609AC00EA8942 /* sqUnixSpurMemory.c */; }; + 94502E971BB71A9200EA8942 /* sqSqueakMainApplication+imageReadWrite.m in Sources */ = {isa = PBXBuildFile; fileRef = 94A0E8840DE5EF430071C8B9 /* sqSqueakMainApplication+imageReadWrite.m */; }; 94584FDB10F02378001401E7 /* sqMacExtendedClipboard.m in Sources */ = {isa = PBXBuildFile; fileRef = 94584FD910F02378001401E7 /* sqMacExtendedClipboard.m */; }; 9463C1BF1AEE13F3009C5CE5 /* ADPCMCodecPlugin.c in Sources */ = {isa = PBXBuildFile; fileRef = 94E658E40DDD03FE00358328 /* ADPCMCodecPlugin.c */; }; 9463C1C01AEE145C009C5CE5 /* B2DPlugin.c in Sources */ = {isa = PBXBuildFile; fileRef = 94E658E60DDD03FE00358328 /* B2DPlugin.c */; }; @@ -171,11 +171,11 @@ 949382791B001C7A00C802B2 /* sqSqueakOSXInfoPlistInterface.m in Sources */ = {isa = PBXBuildFile; fileRef = 94BCAE6810ACA10100F87527 /* sqSqueakOSXInfoPlistInterface.m */; }; 9493827A1B001C7E00C802B2 /* sqSqueakInfoPlistInterface.m in Sources */ = {isa = PBXBuildFile; fileRef = 9412CAE50E6C05EC00DB8625 /* sqSqueakInfoPlistInterface.m */; }; 94B9533510E6BD7100DC476A /* MacMenuOS9ToOSX.m in Sources */ = {isa = PBXBuildFile; fileRef = 94B9533410E6BD7100DC476A /* MacMenuOS9ToOSX.m */; }; - 94BB096E1BB47DDB0016BFDF /* Security.framework in Frameworks */ = {isa = PBXBuildFile; fileRef = 94BB096B1BB47DDB0016BFDF /* Security.framework */; settings = {ASSET_TAGS = (); }; }; + 94BB096E1BB47DDB0016BFDF /* Security.framework in Frameworks */ = {isa = PBXBuildFile; fileRef = 94BB096B1BB47DDB0016BFDF /* Security.framework */; }; 94BB09721BB47F9B0016BFDF /* libz.tbd in Frameworks */ = {isa = PBXBuildFile; fileRef = 94BB09711BB47F9B0016BFDF /* libz.tbd */; }; 94BB09741BB47FB20016BFDF /* libstdc++.tbd in Frameworks */ = {isa = PBXBuildFile; fileRef = 94BB09731BB47FB20016BFDF /* libstdc++.tbd */; }; 94BB09761BB47FCD0016BFDF /* libc++.tbd in Frameworks */ = {isa = PBXBuildFile; fileRef = 94BB09751BB47FCD0016BFDF /* libc++.tbd */; }; - 94BB09781BB480AC0016BFDF /* HostWindowPlugin.c in Sources */ = {isa = PBXBuildFile; fileRef = 94E658FA0DDD03FE00358328 /* HostWindowPlugin.c */; settings = {ASSET_TAGS = (); }; }; + 94BB09781BB480AC0016BFDF /* HostWindowPlugin.c in Sources */ = {isa = PBXBuildFile; fileRef = 94E658FA0DDD03FE00358328 /* HostWindowPlugin.c */; }; 94C315341AD4949B0096E59D /* AsynchFilePlugin.c in Sources */ = {isa = PBXBuildFile; fileRef = 94C315311AD4949B0096E59D /* AsynchFilePlugin.c */; }; 94C317511AD495CD0096E59D /* JoystickTabletPlugin.c in Sources */ = {isa = PBXBuildFile; fileRef = 94C317491AD495CD0096E59D /* JoystickTabletPlugin.c */; }; 94C317541AD495CD0096E59D /* LocalePlugin.c in Sources */ = {isa = PBXBuildFile; fileRef = 94C3174B1AD495CD0096E59D /* LocalePlugin.c */; }; @@ -191,14 +191,14 @@ 94D921571AC6321800A5970F /* LargeIntegers.c in Sources */ = {isa = PBXBuildFile; fileRef = 94E659040DDD03FE00358328 /* LargeIntegers.c */; }; 94D921581AC6321E00A5970F /* ZipPlugin.c in Sources */ = {isa = PBXBuildFile; fileRef = 94E6591F0DDD03FE00358328 /* ZipPlugin.c */; }; 94D9215B1AC6337D00A5970F /* sqManualSurface.c in Sources */ = {isa = PBXBuildFile; fileRef = 94BD816F11C8A58D00556751 /* sqManualSurface.c */; }; - 94F478C91BB527440069E57B /* gcc3x-cointerp.c in Sources */ = {isa = PBXBuildFile; fileRef = 94F478C51BB527440069E57B /* gcc3x-cointerp.c */; settings = {ASSET_TAGS = (); }; }; - 94F478D01BB52D8D0069E57B /* cogitIA32.c in Sources */ = {isa = PBXBuildFile; fileRef = 94F478CA1BB52D3A0069E57B /* cogitIA32.c */; settings = {ASSET_TAGS = (); }; }; - 94FA4CD51BB4D43900C1BE8F /* b3dAlloc.c in Sources */ = {isa = PBXBuildFile; fileRef = 94E659980DDD053900358328 /* b3dAlloc.c */; settings = {ASSET_TAGS = (); }; }; - 94FA4CD61BB4D43900C1BE8F /* b3dDraw.c in Sources */ = {isa = PBXBuildFile; fileRef = 94E6599A0DDD053900358328 /* b3dDraw.c */; settings = {ASSET_TAGS = (); }; }; - 94FA4CD71BB4D43900C1BE8F /* b3dMain.c in Sources */ = {isa = PBXBuildFile; fileRef = 94E6599C0DDD053900358328 /* b3dMain.c */; settings = {ASSET_TAGS = (); }; }; - 94FA4CD81BB4D43900C1BE8F /* b3dRemap.c in Sources */ = {isa = PBXBuildFile; fileRef = 94E6599D0DDD053900358328 /* b3dRemap.c */; settings = {ASSET_TAGS = (); }; }; + 94F478C91BB527440069E57B /* gcc3x-cointerp.c in Sources */ = {isa = PBXBuildFile; fileRef = 94F478C51BB527440069E57B /* gcc3x-cointerp.c */; }; + 94F478D01BB52D8D0069E57B /* cogitIA32.c in Sources */ = {isa = PBXBuildFile; fileRef = 94F478CA1BB52D3A0069E57B /* cogitIA32.c */; }; + 94FA4CD51BB4D43900C1BE8F /* b3dAlloc.c in Sources */ = {isa = PBXBuildFile; fileRef = 94E659980DDD053900358328 /* b3dAlloc.c */; }; + 94FA4CD61BB4D43900C1BE8F /* b3dDraw.c in Sources */ = {isa = PBXBuildFile; fileRef = 94E6599A0DDD053900358328 /* b3dDraw.c */; }; + 94FA4CD71BB4D43900C1BE8F /* b3dMain.c in Sources */ = {isa = PBXBuildFile; fileRef = 94E6599C0DDD053900358328 /* b3dMain.c */; }; + 94FA4CD81BB4D43900C1BE8F /* b3dRemap.c in Sources */ = {isa = PBXBuildFile; fileRef = 94E6599D0DDD053900358328 /* b3dRemap.c */; }; 94FA4CE31BB4DD9000C1BE8F /* OpenGL.framework in Frameworks */ = {isa = PBXBuildFile; fileRef = 94329ECA12275FFA0090298B /* OpenGL.framework */; }; - 94FA4CE51BB4DE1400C1BE8F /* Images-2.xcassets in Resources */ = {isa = PBXBuildFile; fileRef = 94FA4CE41BB4DE1400C1BE8F /* Images-2.xcassets */; settings = {ASSET_TAGS = (); }; }; + 94FA4CE51BB4DE1400C1BE8F /* Images-2.xcassets in Resources */ = {isa = PBXBuildFile; fileRef = 94FA4CE41BB4DE1400C1BE8F /* Images-2.xcassets */; }; 94FE5EC31B7A6232000D6014 /* sqSqueakOSXCGView.m in Sources */ = {isa = PBXBuildFile; fileRef = 94FE5EC21B7A6232000D6014 /* sqSqueakOSXCGView.m */; }; /* End PBXBuildFile section */ @@ -1862,7 +1862,6 @@ ASSETCATALOG_COMPILER_APPICON_NAME = AppIcon; CLANG_ENABLE_OBJC_ARC = NO; CLANG_USE_OPTIMIZATION_PROFILE = NO; - CODE_SIGN_IDENTITY = "Developer ID Application"; COMBINE_HIDPI_IMAGES = YES; FRAMEWORK_SEARCH_PATHS = ( "$(inherited)", @@ -1886,7 +1885,7 @@ OTHER_CFLAGS = ""; PRODUCT_BUNDLE_IDENTIFIER = org.squeak.osx3286.cog; PRODUCT_NAME = Squeak; - PROVISIONING_PROFILE = "a81f3cd0-20de-4e0b-b7a8-a98bcd57ec0c"; + PROVISIONING_PROFILE = ""; }; name = Debug; }; @@ -1897,7 +1896,6 @@ ASSETCATALOG_COMPILER_APPICON_NAME = AppIcon; CLANG_ENABLE_OBJC_ARC = NO; CLANG_USE_OPTIMIZATION_PROFILE = NO; - CODE_SIGN_IDENTITY = "Developer ID Application"; COMBINE_HIDPI_IMAGES = YES; FRAMEWORK_SEARCH_PATHS = ( "$(inherited)", Modified: branches/Cog/build.macos32x86/squeak.cog.spur/SqueakCogSpur32x86.xcworkspace/xcuserdata/johnmci.xcuserdatad/UserInterfaceState.xcuserstate =================================================================== (Binary files differ) Modified: branches/Cog/build.macos64x64/squeak.stack.spur/SqueakPureObjcCog.xcodeproj/project.xcworkspace/xcuserdata/johnmci.xcuserdatad/UserInterfaceState.xcuserstate =================================================================== (Binary files differ) Modified: branches/Cog/build.macos64x64/squeak.stack.spur/SqueakPureObjc_Prefix.pch =================================================================== --- branches/Cog/build.macos64x64/squeak.stack.spur/SqueakPureObjc_Prefix.pch 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/build.macos64x64/squeak.stack.spur/SqueakPureObjc_Prefix.pch 2015-11-02 00:02:54 UTC (rev 3481) @@ -5,3 +5,15 @@ #ifdef __OBJC__ #import <Cocoa/Cocoa.h> #endif + +#if __has_feature(objc_arc) +#define RELEASEOBJ(x) +#define RETAINOBJ(x) x +#define AUTORELEASEOBJ(x) x +#define SUPERDEALLOC +#else +#define RELEASEOBJ(x) [x release] +#define RETAINOBJ(x) [x retain] +#define AUTORELEASEOBJ(x) [x autorelease] +#define SUPERDEALLOC [super dealloc]; +#endif \ No newline at end of file Modified: branches/Cog/platforms/Mac OS/plugins/MIDIPlugin/sqMacMIDI.c =================================================================== --- branches/Cog/platforms/Mac OS/plugins/MIDIPlugin/sqMacMIDI.c 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/Mac OS/plugins/MIDIPlugin/sqMacMIDI.c 2015-11-02 00:02:54 UTC (rev 3481) @@ -290,7 +290,7 @@ } } -int sqMIDIGetPortName(int portNum, int namePtr, int length) { +int sqMIDIGetPortName(int portNum, char * namePtr, int length) { /* Copy the name of the given MIDI port into the string at the given address. Copy at most length characters, and return the number of characters copied. Fail if there is no port of the given number.*/ @@ -427,7 +427,7 @@ return 0; } -int sqMIDIPortReadInto(int portNum, int count, int bufferPtr) { +int sqMIDIPortReadInto(int portNum, int count, char * bufferPtr) { /* bufferPtr is the address of the first byte of a Smalltalk ByteArray of the given length. Copy up to (length - 4) bytes of incoming MIDI data into that buffer, preceded by a 4-byte @@ -456,7 +456,7 @@ return bytesRead + 4; } -int sqMIDIPortWriteFromAt(int portNum, int count, int bufferPtr, int time) { +int sqMIDIPortWriteFromAt(int portNum, int count, char *bufferPtr, int time) { /* bufferPtr is the address of the first byte of a Smalltalk ByteArray of the given length. Send its contents to the given port when the MIDI clock reaches the given time. If time equals Modified: branches/Cog/platforms/iOS/plugins/ClipboardExtendedPlugin/sqMacExtendedClipboard.h =================================================================== --- branches/Cog/platforms/iOS/plugins/ClipboardExtendedPlugin/sqMacExtendedClipboard.h 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/plugins/ClipboardExtendedPlugin/sqMacExtendedClipboard.h 2015-11-02 00:02:54 UTC (rev 3481) @@ -30,6 +30,7 @@ /* The virtual machine proxy definition */ #include "sqVirtualMachine.h" #ifdef BUILD_FOR_OSX +#import <Cocoa/Cocoa.h> typedef NSPasteboard * CLIPBOARDTYPE; #else typedef UIPasteboard * CLIPBOARDTYPE; Modified: branches/Cog/platforms/iOS/plugins/ClipboardExtendedPlugin/sqMacExtendedClipboard.m =================================================================== --- branches/Cog/platforms/iOS/plugins/ClipboardExtendedPlugin/sqMacExtendedClipboard.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/plugins/ClipboardExtendedPlugin/sqMacExtendedClipboard.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -75,8 +75,8 @@ void sqPasteboardPutItemFlavordatalengthformatTypeformatLength ( CLIPBOARDTYPE inPasteboard, char* inData, sqInt dataLength, char* format, sqInt formatLength) { - NSString *formatType = [[[NSString alloc] initWithBytes: format length: formatLength encoding: NSUTF8StringEncoding] AUTORELEASEOBJ]; - NSData* data = [[[NSData alloc ] initWithBytes: inData length: dataLength] AUTORELEASEOBJ]; + NSString *formatType = AUTORELEASEOBJ([[NSString alloc] initWithBytes: format length: formatLength encoding: NSUTF8StringEncoding]); + NSData* data = AUTORELEASEOBJ([[NSData alloc ] initWithBytes: inData length: dataLength]); NSArray *arrayOfTypes = @[formatType]; [inPasteboard declareTypes: arrayOfTypes owner: nil]; @@ -86,7 +86,7 @@ sqInt sqPasteboardCopyItemFlavorDataformatformatLength ( CLIPBOARDTYPE inPasteboard, char* format, sqInt formatLength) { - NSString *formatType = [[[NSString alloc] initWithBytes: format length: formatLength encoding: NSUTF8StringEncoding] AUTORELEASEOBJ]; + NSString *formatType = AUTORELEASEOBJ([[NSString alloc] initWithBytes: format length: formatLength encoding: NSUTF8StringEncoding]); NSArray *arrayOfTypes = @[formatType]; NSString *type= [inPasteboard availableTypeFromArray: arrayOfTypes]; Modified: branches/Cog/platforms/iOS/plugins/MIDIPlugin/sqMacMIDI.m =================================================================== --- branches/Cog/platforms/iOS/plugins/MIDIPlugin/sqMacMIDI.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/plugins/MIDIPlugin/sqMacMIDI.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -291,7 +291,7 @@ } } -int sqMIDIGetPortName(int portNum, int namePtr, int length) { +int sqMIDIGetPortName(int portNum, char * namePtr, int length) { /* Copy the name of the given MIDI port into the string at the given address. Copy at most length characters, and return the number of characters copied. Fail if there is no port of the given number.*/ @@ -428,7 +428,7 @@ return 0; } -int sqMIDIPortReadInto(int portNum, int count, int bufferPtr) { +int sqMIDIPortReadInto(int portNum, int count, char * bufferPtr) { /* bufferPtr is the address of the first byte of a Smalltalk ByteArray of the given length. Copy up to (length - 4) bytes of incoming MIDI data into that buffer, preceded by a 4-byte @@ -457,7 +457,7 @@ return bytesRead + 4; } -int sqMIDIPortWriteFromAt(int portNum, int count, int bufferPtr, int time) { +int sqMIDIPortWriteFromAt(int portNum, int count, char * bufferPtr, int time) { /* bufferPtr is the address of the first byte of a Smalltalk ByteArray of the given length. Send its contents to the given port when the MIDI clock reaches the given time. If time equals Modified: branches/Cog/platforms/iOS/plugins/MacMenubarPlugin/MacMenuOS9ToOSX.m =================================================================== --- branches/Cog/platforms/iOS/plugins/MacMenubarPlugin/MacMenuOS9ToOSX.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/plugins/MacMenubarPlugin/MacMenuOS9ToOSX.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -7,6 +7,7 @@ // #import "MacMenuOS9ToOSX.h" +#import <Cocoa/Cocoa.h> Boolean ioCheckMenuHandle(MenuHandle menuHandle) { Modified: branches/Cog/platforms/iOS/plugins/MacMenubarPlugin/MacMenubarPlugin.h =================================================================== --- branches/Cog/platforms/iOS/plugins/MacMenubarPlugin/MacMenubarPlugin.h 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/plugins/MacMenubarPlugin/MacMenubarPlugin.h 2015-11-02 00:02:54 UTC (rev 3481) @@ -34,7 +34,7 @@ Boolean ioCheckMenuHandle(MenuHandle menuHandle); -#define TARGET_API_MAC_CARBON 1 +//#define TARGET_API_MAC_CARBON 1 #define kHICommandHide 'hide' MenuRef GetMenuHandle(MenuID menuID); Modified: branches/Cog/platforms/iOS/plugins/SoundPlugin/sqSqueakSoundCoreAudio.m =================================================================== --- branches/Cog/platforms/iOS/plugins/SoundPlugin/sqSqueakSoundCoreAudio.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/plugins/SoundPlugin/sqSqueakSoundCoreAudio.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -59,6 +59,7 @@ atom = [myInstance.soundOutQueue returnAndRemoveOldest]; inBuffer->mAudioDataByteSize = (int) atom.byteCount; memcpy(inBuffer->mAudioData,atom.data,atom.byteCount); + RELEASEOBJ(atom); //NSLog(@"%i Fill sound buffer with %i bytesA",ioMSecs(),inBuffer->mAudioDataByteSize); } else { inBuffer->mAudioDataByteSize = (int) MIN(atom.byteCount - atom.startOffset,inBuffer->mAudioDataBytesCapacity); @@ -66,6 +67,7 @@ atom.startOffset = atom.startOffset + inBuffer->mAudioDataByteSize; if (atom.startOffset == atom.byteCount) { atom = [myInstance.soundOutQueue returnAndRemoveOldest]; //ignore now it's empty + RELEASEOBJ(atom); } //NSLog(@"%i Fill sound buffer with %i bytesB",ioMSecs(),inBuffer->mAudioDataByteSize); } @@ -114,7 +116,7 @@ return; if (inNumberPacketDescriptions > 0) { - soundAtom *atom = [[[soundAtom alloc] initWith: inBuffer->mAudioData count: inBuffer->mAudioDataByteSize] AUTORELEASEOBJ]; + soundAtom *atom = AUTORELEASEOBJ([[soundAtom alloc] initWith: inBuffer->mAudioData count: inBuffer->mAudioDataByteSize]); [myInstance.soundInQueue addItem: atom]; } @@ -281,7 +283,7 @@ OSStatus result = AudioQueueDispose (self.outputAudioQueue,true); #pragma unused(result) self.outputAudioQueue = nil; - self.soundOutQueue = [[[Queue alloc] init] AUTORELEASEOBJ]; + self.soundOutQueue = AUTORELEASEOBJ([[Queue alloc] init]); return 1; } @@ -308,7 +310,7 @@ return interpreterProxy->primitiveFail(); //NSLog(@"%i sound place samples on queue frames %i startIndex %i count %i",ioMSecs(),frameCount,startIndex,byteCount-startIndex); - soundAtom *atom = [[[soundAtom alloc] initWith: arrayIndex+startIndex count: (unsigned) (byteCount-startIndex)] AUTORELEASEOBJ]; + soundAtom *atom = AUTORELEASEOBJ([[soundAtom alloc] initWith: arrayIndex+startIndex count: (unsigned) (byteCount-startIndex)]); [self.soundOutQueue addItem: atom]; if (!self.outputIsRunning) { @@ -396,7 +398,7 @@ return 0; result = AudioQueueDispose (self.inputAudioQueue,true); self.inputAudioQueue = nil; - self.soundInQueue = [[[Queue alloc] init] AUTORELEASEOBJ]; + self.soundInQueue = AUTORELEASEOBJ([[Queue alloc] init]); return 1; } @@ -424,6 +426,7 @@ atom = [self.soundInQueue returnAndRemoveOldest]; memcpy(arrayIndex+start,atom.data,atom.byteCount); count= MIN(atom.byteCount, bufferSizeInBytes - start); + RELEASEOBJ(atom); return count / (SqueakFrameSize / 2) / self.inputChannels; } else { count= MIN(atom.byteCount-atom.startOffset, bufferSizeInBytes - start); @@ -431,6 +434,7 @@ atom.startOffset = atom.startOffset + (count); if (atom.startOffset == atom.byteCount) { atom = [self.soundInQueue returnAndRemoveOldest]; //ignore now it's empty + RELEASEOBJ(atom); } return count / (SqueakFrameSize / 2) / self.inputChannels; } Modified: branches/Cog/platforms/iOS/plugins/SqueakObjectiveC/squeakProxy.m =================================================================== --- branches/Cog/platforms/iOS/plugins/SqueakObjectiveC/squeakProxy.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/plugins/SqueakObjectiveC/squeakProxy.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -92,11 +92,11 @@ return; } - if([lockForSqueak lockWhenCondition: 0 beforeDate: (timeout = [[[NSDate alloc] initWithTimeIntervalSinceNow: 3.0] AUTORELEASEOBJ])]) + if([lockForSqueak lockWhenCondition: 0 beforeDate: (timeout = AUTORELEASEOBJ([[NSDate alloc] initWithTimeIntervalSinceNow: 3.0]))]) { // NSLog(@"inside lock 0"); [lockForSqueak unlockWithCondition: 1]; - invocation = [anInvocation RETAINOBJ]; + invocation = RETAINOBJ(anInvocation); // NSLog(@"signalling squeak"); interpreterProxy->signalSemaphoreWithIndex(sem); @@ -104,7 +104,7 @@ if (isCarbonVM) interpreterProxy->callbackEnter(&callbackid); - if([lockForSqueak lockWhenCondition: 2 beforeDate: (timeout = [[[NSDate alloc] initWithTimeIntervalSinceNow: 5.0] AUTORELEASEOBJ])] ) + if([lockForSqueak lockWhenCondition: 2 beforeDate: (timeout = AUTORELEASEOBJ([[NSDate alloc] initWithTimeIntervalSinceNow: 5.0]))] ) { // NSLog(@"inside lock 2"); invocation = nil; @@ -189,9 +189,9 @@ - (void) dealloc { - [lockForSqueak RELEASEOBJ]; - [sigs RELEASEOBJ]; - [target RELEASEOBJ]; + RELEASEOBJ(lockForSqueak); + RELEASEOBJ(sigs); + RELEASEOBJ(target); SUPERDEALLOC } Modified: branches/Cog/platforms/iOS/vm/Common/Classes/Queue.m =================================================================== --- branches/Cog/platforms/iOS/vm/Common/Classes/Queue.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/Common/Classes/Queue.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -73,7 +73,7 @@ - (void) dealloc { - [mItemArray RELEASEOBJ]; + RELEASEOBJ(mItemArray); SUPERDEALLOC } @@ -86,6 +86,7 @@ anObject = [mItemArray lastObject]; if (anObject) { + RETAINOBJ(anObject); [mItemArray removeLastObject]; } } Modified: branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakAppDelegate.m =================================================================== --- branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakAppDelegate.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakAppDelegate.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -45,7 +45,7 @@ @synthesize squeakApplication,squeakThread; - (void)dealloc { - [squeakApplication RELEASEOBJ]; + RELEASEOBJ(squeakApplication); SUPERDEALLOC } Modified: branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakFileDirectoryAPI.m =================================================================== --- branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakFileDirectoryAPI.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakFileDirectoryAPI.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -191,7 +191,7 @@ NSString* createFilePathFromString(char * aFilenameString, sqInt filenameLength, sqInt resolveAlias) { - NSString * filePath = [[[NSString alloc] initWithBytes: aFilenameString length: (NSUInteger) filenameLength encoding: NSUTF8StringEncoding] AUTORELEASEOBJ]; + NSString * filePath = AUTORELEASEOBJ([[NSString alloc] initWithBytes: aFilenameString length: (NSUInteger) filenameLength encoding: NSUTF8StringEncoding]); if (!filePath) { return NULL; } @@ -203,7 +203,7 @@ NSString *newFilePath = [gDelegateApp.squeakApplication.fileDirectoryLogic resolvedAliasFiles: owningDirectoryPath]; filePath = [newFilePath stringByAppendingPathComponent: [filePath lastPathComponent]]; } - [filePath RETAINOBJ]; + return filePath; } Modified: branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakFileDirectoryInterface.m =================================================================== --- branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakFileDirectoryInterface.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakFileDirectoryInterface.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -133,8 +133,8 @@ if (nameStringLength <= 0 || pathStringLength <= 0) return BAD_PATH; - directoryPath = [[[NSString alloc] initWithBytes: pathString length: (NSUInteger) pathStringLength encoding: NSUTF8StringEncoding] AUTORELEASEOBJ]; - fileName = [[[NSString alloc] initWithBytes: nameString length: (NSUInteger) nameStringLength encoding: NSUTF8StringEncoding] AUTORELEASEOBJ]; + directoryPath = AUTORELEASEOBJ([[NSString alloc] initWithBytes: pathString length: (NSUInteger) pathStringLength encoding: NSUTF8StringEncoding]); + fileName = AUTORELEASEOBJ([[NSString alloc] initWithBytes: nameString length: (NSUInteger) nameStringLength encoding: NSUTF8StringEncoding]); if (![directoryPath hasSuffix: @"/"]) { directoryPath = [directoryPath stringByAppendingString: @"/"]; @@ -190,7 +190,7 @@ } if (pathStringLength > 0) { - directoryPath = [[[NSString alloc] initWithBytes: pathString length: (NSUInteger) pathStringLength encoding: NSUTF8StringEncoding] AUTORELEASEOBJ]; + directoryPath = AUTORELEASEOBJ([[NSString alloc] initWithBytes: pathString length: (NSUInteger) pathStringLength encoding: NSUTF8StringEncoding]); } if (directoryPath == NULL) { return BAD_PATH; @@ -376,9 +376,9 @@ } - (void)dealloc { + RELEASEOBJ(lastPathForDirLookup); + RELEASEOBJ(directoryContentsForDirLookup); SUPERDEALLOC - [lastPathForDirLookup RELEASEOBJ]; - [directoryContentsForDirLookup RELEASEOBJ]; } Modified: branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakInfoPlistInterface.m =================================================================== --- branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakInfoPlistInterface.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakInfoPlistInterface.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -56,7 +56,7 @@ } - (void)dealloc { - [defaults RELEASEOBJ]; + RELEASEOBJ(defaults); SUPERDEALLOC } Modified: branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakMainApplication+events.m =================================================================== --- branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakMainApplication+events.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakMainApplication+events.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -76,6 +76,7 @@ @autoreleasepool { [self processAsOldEventOrComplexEvent: event placeIn: evt]; } + RELEASEOBJ(event); } } Modified: branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakMainApplication.m =================================================================== --- branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakMainApplication.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/Common/Classes/sqSqueakMainApplication.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -209,11 +209,13 @@ } +#ifndef SPURVM #if COGVM void sqMacMemoryFree(); #else void sqMacMemoryFree(void); #endif +#endif - (void) ioExit { [self ioExitWithErrorCode: 0]; Modified: branches/Cog/platforms/iOS/vm/OSX/SqViewBitmapConversion.m =================================================================== --- branches/Cog/platforms/iOS/vm/OSX/SqViewBitmapConversion.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/OSX/SqViewBitmapConversion.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -64,7 +64,7 @@ copyImage1To32(srcBits, dBits, srcPixelWidth, height, left, top, right, bottom,colorMap); - CHECKANDRETURN([[[NSBitmapImageRep alloc] initWithBitmapDataPlanes:(unsigned char **)&dBits + CHECKANDRETURN(AUTORELEASEOBJ([[NSBitmapImageRep alloc] initWithBitmapDataPlanes:(unsigned char **)&dBits pixelsWide:right-left pixelsHigh:bottom-top bitsPerSample:bitsPerSample @@ -73,7 +73,7 @@ isPlanar:NO colorSpaceName:colorSpace bytesPerRow:bytesPerRow - bitsPerPixel:bitsPerPixel] AUTORELEASEOBJ]); + bitsPerPixel:bitsPerPixel])); }//extractPixels_1_to_32; @@ -96,7 +96,7 @@ copyImage2To32(srcBits, dBits, srcPixelWidth, height, left, top, right, bottom,colorMap); - CHECKANDRETURN([[[NSBitmapImageRep alloc] initWithBitmapDataPlanes:(unsigned char **)&dBits + CHECKANDRETURN(AUTORELEASEOBJ([[NSBitmapImageRep alloc] initWithBitmapDataPlanes:(unsigned char **)&dBits pixelsWide:right-left pixelsHigh:bottom-top bitsPerSample:bitsPerSample @@ -105,7 +105,7 @@ isPlanar:NO colorSpaceName:colorSpace bytesPerRow:bytesPerRow - bitsPerPixel:bitsPerPixel] AUTORELEASEOBJ]); + bitsPerPixel:bitsPerPixel])); }//extractPixels_2_to_32; -(CGImageRef)extractPixels_4_to_32:(void*)srcBits @@ -127,7 +127,7 @@ copyImage4To32(srcBits, dBits, srcPixelWidth, height, left, top, right, bottom,colorMap); - CHECKANDRETURN([[[NSBitmapImageRep alloc] initWithBitmapDataPlanes:(unsigned char **)&dBits + CHECKANDRETURN(AUTORELEASEOBJ([[NSBitmapImageRep alloc] initWithBitmapDataPlanes:(unsigned char **)&dBits pixelsWide:right-left pixelsHigh:bottom-top bitsPerSample:bitsPerSample @@ -136,7 +136,7 @@ isPlanar:NO colorSpaceName:colorSpace bytesPerRow:bytesPerRow - bitsPerPixel:bitsPerPixel] AUTORELEASEOBJ]); + bitsPerPixel:bitsPerPixel])); }//extractPixels_4_to_32; @@ -159,7 +159,7 @@ copyImage8To32(srcBits, dBits, srcPixelWidth, height, left, top, right, bottom,colorMap); - CHECKANDRETURN([[[NSBitmapImageRep alloc] initWithBitmapDataPlanes:(unsigned char **)&dBits + CHECKANDRETURN(AUTORELEASEOBJ([[NSBitmapImageRep alloc] initWithBitmapDataPlanes:(unsigned char **)&dBits pixelsWide:right-left pixelsHigh:bottom-top bitsPerSample:bitsPerSample @@ -168,7 +168,7 @@ isPlanar:NO colorSpaceName:colorSpace bytesPerRow:bytesPerRow - bitsPerPixel:bitsPerPixel] AUTORELEASEOBJ]); + bitsPerPixel:bitsPerPixel])); }//extractPixels_8_to_32; @@ -189,7 +189,7 @@ copyImage16To32(srcBits, dBits, srcPixelWidth, height, left, top, right, bottom); - CHECKANDRETURN([[[NSBitmapImageRep alloc] initWithBitmapDataPlanes:(unsigned char **)&dBits + CHECKANDRETURN(AUTORELEASEOBJ([[NSBitmapImageRep alloc] initWithBitmapDataPlanes:(unsigned char **)&dBits pixelsWide:right-left pixelsHigh:bottom-top bitsPerSample:bitsPerSample @@ -198,7 +198,7 @@ isPlanar:NO colorSpaceName:colorSpace bytesPerRow:bytesPerRow - bitsPerPixel:bitsPerPixel] AUTORELEASEOBJ]); + bitsPerPixel:bitsPerPixel])); }//extractPixels_16_to_32; -(CGImageRef)computeBitmapFromBitsIndex:(void*)srcBits Modified: branches/Cog/platforms/iOS/vm/OSX/SqueakOSXAppDelegate.m =================================================================== --- branches/Cog/platforms/iOS/vm/OSX/SqueakOSXAppDelegate.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/OSX/SqueakOSXAppDelegate.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -43,8 +43,8 @@ #import "sqSqueakOSXInfoPlistInterface.h" #if defined(i386) || defined(__i386) || defined(__i386__) #else -#import <Fabric/Fabric.h> -#import <Crashlytics/Crashlytics.h> +//#import <Fabric/Fabric.h> +//#import <Crashlytics/Crashlytics.h> #endif #ifndef USE_CORE_GRAPHICS @@ -63,7 +63,7 @@ @synthesize window,mainView,possibleImageNameAtLaunchTime,checkForFileNameOnFirstParm,windowHandler; - (sqSqueakMainApplication *) makeApplicationInstance { - return [[[sqSqueakOSXApplication alloc] init] AUTORELEASEOBJ]; + return AUTORELEASEOBJ([[sqSqueakOSXApplication alloc] init]); } - (void)applicationWillFinishLaunching:(NSNotification *)aNotification { @@ -75,13 +75,13 @@ #if defined(i386) || defined(__i386) || defined(__i386__) #else // [Crashlytics startWithAPIKey:@"add501476623fc20212a60334cd537d16dfd566f"]; - [Fabric with:@[[Crashlytics class]]]; + //[Fabric with:@[[Crashlytics class]]]; #endif @autoreleasepool { gDelegateApp = self; self.squeakApplication = [self makeApplicationInstance]; - self.windowHandler = [[[sqSqueakOSXScreenAndWindow alloc] init] AUTORELEASEOBJ]; + self.windowHandler = AUTORELEASEOBJ([[sqSqueakOSXScreenAndWindow alloc] init]); windowHandler.mainViewOnWindow = self.mainView; self.mainView.windowLogic = windowHandler; windowHandler.windowIndex = 1; @@ -176,7 +176,7 @@ //It can right now, I have two implementations to pick (CoreGraphics or OpenGL), muy more/different could be added //in the future. - NSView *view = [[[ContentViewClass alloc] initWithFrame:[[self window] frame]] AUTORELEASEOBJ]; + NSView *view = AUTORELEASEOBJ([[ContentViewClass alloc] initWithFrame:[[self window] frame]]); self.mainView = (id) view; [[self window] setContentView: view]; Modified: branches/Cog/platforms/iOS/vm/OSX/plugins/HostWindowPlugin/sqMacHostWindow.m =================================================================== --- branches/Cog/platforms/iOS/vm/OSX/plugins/HostWindowPlugin/sqMacHostWindow.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/OSX/plugins/HostWindowPlugin/sqMacHostWindow.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -101,7 +101,7 @@ } sqInt ioSetTitleOfWindow(sqInt windowIndex, char * newTitle, sqInt sizeOfTitle) { - NSString *title = [[[NSString alloc] initWithBytes:newTitle length:sizeOfTitle encoding:NSUTF8StringEncoding] AUTORELEASEOBJ]; + NSString *title = AUTORELEASEOBJ([[NSString alloc] initWithBytes:newTitle length:sizeOfTitle encoding:NSUTF8StringEncoding]); [[[NSApplication sharedApplication] mainWindow] setTitle:title]; return 1; } Modified: branches/Cog/platforms/iOS/vm/OSX/sqMacUnixExternalPrims.m =================================================================== --- branches/Cog/platforms/iOS/vm/OSX/sqMacUnixExternalPrims.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/OSX/sqMacUnixExternalPrims.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -208,7 +208,7 @@ OSErr err = FSFindFolder(kSystemDomain, kFrameworksFolderType, false, &frameworksFolderRef); #pragma unused(err) NSURL *myURLRef = (NSURL *) CFBridgingRelease(CFURLCreateFromFSRef(kCFAllocatorDefault, &frameworksFolderRef)); - systemFolder = [[myURLRef path] RETAINOBJ]; + systemFolder = RETAINOBJ([myURLRef path]); } pluginNameLength = strlen(pluginName); Modified: branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXApplication+clipboard.m =================================================================== --- branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXApplication+clipboard.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXApplication+clipboard.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -74,7 +74,7 @@ - (void) clipboardWrite: (sqInt) count from: (char *)byteArrayIndex startingAt: (sqInt) startIndex { NSPasteboard *pboard= [NSPasteboard generalPasteboard]; - NSString * string = [[[NSString alloc] initWithBytes: byteArrayIndex length:(NSUInteger)count encoding: NSUTF8StringEncoding] AUTORELEASEOBJ]; + NSString * string = AUTORELEASEOBJ([[NSString alloc] initWithBytes: byteArrayIndex length:(NSUInteger)count encoding: NSUTF8StringEncoding]); [pboard declareTypes: @[NSStringPboardType] owner: nil]; [pboard setString: string forType: NSStringPboardType]; } Modified: branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXApplication+cursor.m =================================================================== --- branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXApplication+cursor.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXApplication+cursor.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -62,13 +62,13 @@ return; @autoreleasepool { - NSBitmapImageRep *bitmap= [[[NSBitmapImageRep alloc] + NSBitmapImageRep *bitmap= AUTORELEASEOBJ([[NSBitmapImageRep alloc] initWithBitmapDataPlanes: NULL pixelsWide: 16 pixelsHigh: 16 bitsPerSample: 1 samplesPerPixel: 2 hasAlpha: YES isPlanar: YES colorSpaceName: NSCalibratedBlackColorSpace bytesPerRow: 2 - bitsPerPixel: 0] AUTORELEASEOBJ]; + bitsPerPixel: 0]); unsigned char* planes[5]; [bitmap getBitmapDataPlanes:planes]; @@ -93,7 +93,7 @@ mask[i*2 + 1]= (word >> 16) & 0xFF; } - NSImage *image = [[[NSImage alloc] init] AUTORELEASEOBJ]; + NSImage *image = AUTORELEASEOBJ([[NSImage alloc] init]); [image addRepresentation: bitmap]; @@ -125,13 +125,13 @@ @autoreleasepool { - NSBitmapImageRep *bitmap= [[[NSBitmapImageRep alloc] + NSBitmapImageRep *bitmap= AUTORELEASEOBJ([[NSBitmapImageRep alloc] initWithBitmapDataPlanes: NULL pixelsWide: extentX pixelsHigh: extentY bitsPerSample: 8 samplesPerPixel: 4 hasAlpha: YES isPlanar: NO colorSpaceName: NSCalibratedRGBColorSpace bytesPerRow: extentX * 4 - bitsPerPixel: 0] AUTORELEASEOBJ]; + bitsPerPixel: 0]); unsigned int *planes[5]; [bitmap getBitmapDataPlanes: (unsigned char **) planes]; unsigned int *src= (unsigned int*) pointerForOop(cursorBitsIndex); @@ -144,7 +144,7 @@ *dst= (*src & 0xFF00FF00) | ((*src & 0x000000FF) << 16) | ((*src & 0x00FF0000) >> 16); // BGRA to RGBA #endif } - NSImage *image= [[[NSImage alloc] init] AUTORELEASEOBJ]; + NSImage *image= AUTORELEASEOBJ([[NSImage alloc] init]); [image addRepresentation: bitmap]; NSPoint hotSpot= { -offsetX, -offsetY }; self.squeakHasCursor = YES; Modified: branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXApplication+events.m =================================================================== --- branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXApplication+events.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXApplication+events.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -156,10 +156,7 @@ } - (void) pushEventToQueue: (sqInputEvent *) evt { - NSMutableArray* data = [NSMutableArray arrayWithCapacity: 2]; - [data addObject: @1]; - [data addObject: [NSData dataWithBytes:(const void *) evt length: sizeof(sqInputEvent)]]; - [eventQueue addItem: data]; + [eventQueue addItem: @[@1,[NSData dataWithBytes:(const void *) evt length: sizeof(sqInputEvent)]]]; } - (void) recordCharEvent:(NSString *) unicodeString fromView: (sqSqueakOSXOpenGLView *) mainView { @@ -195,7 +192,7 @@ } } - NSString *lookupString = [[[NSString alloc] initWithCharacters: &unicode length: 1] AUTORELEASEOBJ]; + NSString *lookupString = AUTORELEASEOBJ([[NSString alloc] initWithCharacters: &unicode length: 1]); [lookupString getBytes: &macRomanCharacter maxLength: 1 usedLength: NULL encoding: NSMacOSRomanStringEncoding options: 0 range: picker remainingRange: NULL]; Modified: branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXApplication.m =================================================================== --- branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXApplication.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXApplication.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -126,7 +126,7 @@ } - (void) setupSoundLogic { - self.soundInterfaceLogic = [[[sqSqueakOSXSoundCoreAudio alloc] init] AUTORELEASEOBJ]; + self.soundInterfaceLogic = AUTORELEASEOBJ([[sqSqueakOSXSoundCoreAudio alloc] init]); [(sqSqueakOSXSoundCoreAudio *) self.soundInterfaceLogic soundInitOverride]; snd_Start(2644, 22050, 1, 0); @@ -195,7 +195,7 @@ if ([args count] < 2) return; - NSMutableArray *revisedArgs = [[args mutableCopyWithZone: NULL] AUTORELEASEOBJ]; + NSMutableArray *revisedArgs = AUTORELEASEOBJ([args mutableCopyWithZone: NULL]); [revisedArgs removeObjectAtIndex:0]; NSUInteger i,result; Modified: branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXCGView.m =================================================================== --- branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXCGView.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXCGView.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -73,7 +73,7 @@ NSOpenGLPFABackingStore, 0 }; - return[[[NSOpenGLPixelFormat alloc] initWithAttributes:attrs] AUTORELEASEOBJ]; + return AUTORELEASEOBJ([[NSOpenGLPixelFormat alloc] initWithAttributes:attrs]); } - (id)initWithFrame:(NSRect)frameRect { @@ -335,11 +335,11 @@ //http://www.internet4classrooms.com/mac_ext.gif //http://developer.apple.com/legacy/mac/library/documentation/mac/Text/Text-571.html - keyBoardStrokeDetails *aKeyBoardStrokeDetails = [[[keyBoardStrokeDetails alloc] init] AUTORELEASEOBJ]; + keyBoardStrokeDetails *aKeyBoardStrokeDetails = AUTORELEASEOBJ([[keyBoardStrokeDetails alloc] init]); aKeyBoardStrokeDetails.keyCode = [theEvent keyCode]; aKeyBoardStrokeDetails.modifierFlags = [theEvent modifierFlags]; - NSArray *down = [[[NSArray alloc] initWithObjects: theEvent,nil] AUTORELEASEOBJ]; + NSArray *down = @[theEvent]; @synchronized(self) { lastSeenKeyBoardStrokeDetails = aKeyBoardStrokeDetails; @@ -355,11 +355,11 @@ } -(void)keyDown:(NSEvent*)theEvent { - keyBoardStrokeDetails *aKeyBoardStrokeDetails = [[[keyBoardStrokeDetails alloc] init] AUTORELEASEOBJ]; + keyBoardStrokeDetails *aKeyBoardStrokeDetails = AUTORELEASEOBJ([[keyBoardStrokeDetails alloc] init]); aKeyBoardStrokeDetails.keyCode = [theEvent keyCode]; aKeyBoardStrokeDetails.modifierFlags = [theEvent modifierFlags]; - NSArray *down = [[[NSArray alloc] initWithObjects: theEvent,nil] AUTORELEASEOBJ]; + NSArray *down = @[theEvent]; // NSLog(@"sqSqueakOSXCGView.m>>keyDown:"); @synchronized(self) { lastSeenKeyBoardStrokeDetails = aKeyBoardStrokeDetails; @@ -389,7 +389,7 @@ - (void)flagsChanged:(NSEvent *)theEvent { // NSLog(@"sqSqueakOSXCGView.m>>flagsChanged -- %d, %d", [theEvent keyCode], [theEvent modifierFlags] ); - keyBoardStrokeDetails *aKeyBoardStrokeDetails = [[[keyBoardStrokeDetails alloc] init] AUTORELEASEOBJ]; + keyBoardStrokeDetails *aKeyBoardStrokeDetails = AUTORELEASEOBJ([[keyBoardStrokeDetails alloc] init]); aKeyBoardStrokeDetails.keyCode = [theEvent keyCode]; aKeyBoardStrokeDetails.modifierFlags = [theEvent modifierFlags]; self.lastSeenKeyBoardModifierDetails = aKeyBoardStrokeDetails; @@ -464,7 +464,7 @@ else return; @synchronized(self) { - keyBoardStrokeDetails *aKeyBoardStrokeDetails = [[[keyBoardStrokeDetails alloc] init] AUTORELEASEOBJ]; + keyBoardStrokeDetails *aKeyBoardStrokeDetails = AUTORELEASEOBJ([[keyBoardStrokeDetails alloc] init]); aKeyBoardStrokeDetails.keyCode = keyCode; aKeyBoardStrokeDetails.modifierFlags = self.lastSeenKeyBoardModifierDetails.modifierFlags; lastSeenKeyBoardStrokeDetails = aKeyBoardStrokeDetails; Modified: branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXFileDirectoryInterface.m =================================================================== --- branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXFileDirectoryInterface.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXFileDirectoryInterface.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -74,7 +74,7 @@ - (NSString *)resolvedAliasFiles:(NSString *)filePath { NSArray *compoents = [[filePath stringByStandardizingPath] pathComponents]; NSString *thisComponent; - NSString *path = [[[NSString alloc] init] AUTORELEASEOBJ]; + NSString *path = AUTORELEASEOBJ([[NSString alloc] init]); for (thisComponent in compoents) { path = [path stringByAppendingPathComponent:thisComponent]; if (![[NSFileManager defaultManager] fileExistsAtPath:path]) Modified: branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXOpenGLView.m =================================================================== --- branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXOpenGLView.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXOpenGLView.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -70,7 +70,7 @@ NSOpenGLPFABackingStore, 0 }; - return[[[NSOpenGLPixelFormat alloc] initWithAttributes:attrs] AUTORELEASEOBJ]; + return AUTORELEASEOBJ([[NSOpenGLPixelFormat alloc] initWithAttributes:attrs]); } - (id)initWithFrame:(NSRect)frameRect { @@ -415,7 +415,7 @@ //http://www.internet4classrooms.com/mac_ext.gif //http://developer.apple.com/legacy/mac/library/documentation/mac/Text/Text-571.html - keyBoardStrokeDetails *aKeyBoardStrokeDetails = [[[keyBoardStrokeDetails alloc] init] AUTORELEASEOBJ]; + keyBoardStrokeDetails *aKeyBoardStrokeDetails = AUTORELEASEOBJ([[keyBoardStrokeDetails alloc] init]); aKeyBoardStrokeDetails.keyCode = [theEvent keyCode]; aKeyBoardStrokeDetails.modifierFlags = [theEvent modifierFlags]; @@ -433,7 +433,7 @@ } -(void)keyDown:(NSEvent*)theEvent { - keyBoardStrokeDetails *aKeyBoardStrokeDetails = [[[keyBoardStrokeDetails alloc] init] AUTORELEASEOBJ]; + keyBoardStrokeDetails *aKeyBoardStrokeDetails = AUTORELEASEOBJ([[keyBoardStrokeDetails alloc] init]); aKeyBoardStrokeDetails.keyCode = [theEvent keyCode]; aKeyBoardStrokeDetails.modifierFlags = [theEvent modifierFlags]; @@ -462,7 +462,7 @@ } - (void)flagsChanged:(NSEvent *)theEvent { - keyBoardStrokeDetails *aKeyBoardStrokeDetails = [[[keyBoardStrokeDetails alloc] init] AUTORELEASEOBJ]; + keyBoardStrokeDetails *aKeyBoardStrokeDetails = AUTORELEASEOBJ([[keyBoardStrokeDetails alloc] init]); aKeyBoardStrokeDetails.keyCode = [theEvent keyCode]; aKeyBoardStrokeDetails.modifierFlags = [theEvent modifierFlags]; self.lastSeenKeyBoardModifierDetails = aKeyBoardStrokeDetails; @@ -549,7 +549,7 @@ return; @synchronized(self) { - keyBoardStrokeDetails *aKeyBoardStrokeDetails = [[[keyBoardStrokeDetails alloc] init] AUTORELEASEOBJ]; + keyBoardStrokeDetails *aKeyBoardStrokeDetails = AUTORELEASEOBJ([[keyBoardStrokeDetails alloc] init]); aKeyBoardStrokeDetails.keyCode = keyCode; aKeyBoardStrokeDetails.modifierFlags = self.lastSeenKeyBoardModifierDetails.modifierFlags; lastSeenKeyBoardStrokeDetails = aKeyBoardStrokeDetails; Modified: branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXScreenAndWindow.m =================================================================== --- branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXScreenAndWindow.m 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/OSX/sqSqueakOSXScreenAndWindow.m 2015-11-02 00:02:54 UTC (rev 3481) @@ -53,7 +53,7 @@ } - (void) dealloc { - [mainViewOnWindow RELEASEOBJ]; + RELEASEOBJ(mainViewOnWindow); SUPERDEALLOC } Modified: branches/Cog/platforms/iOS/vm/SqueakPureObjc_Prefix.pch =================================================================== --- branches/Cog/platforms/iOS/vm/SqueakPureObjc_Prefix.pch 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/SqueakPureObjc_Prefix.pch 2015-11-02 00:02:54 UTC (rev 3481) @@ -7,12 +7,13 @@ #endif #if __has_feature(objc_arc) -#define RELEASEOBJ -#define RETAINOBJ -#define AUTORELEASEOBJ +#define RELEASEOBJ(x) +#define RETAINOBJ(x) x +#define AUTORELEASEOBJ(x) x +#define SUPERDEALLOC #else -#define RELEASEOBJ release -#define RETAINOBJ retain -#define AUTORELEASEOBJ autorelease +#define RELEASEOBJ(x) [x release] +#define RETAINOBJ(x) [x retain] +#define AUTORELEASEOBJ(x) [x autorelease] #define SUPERDEALLOC [super dealloc]; -#endif \ No newline at end of file +#endif Modified: branches/Cog/platforms/iOS/vm/iPhone/sqMacV2Memory.c =================================================================== --- branches/Cog/platforms/iOS/vm/iPhone/sqMacV2Memory.c 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/iOS/vm/iPhone/sqMacV2Memory.c 2015-11-02 00:02:54 UTC (rev 3481) @@ -167,6 +167,7 @@ return gMaxHeapSize - gHeapSize; } +#ifndef SPURVM void sqMacMemoryFree() { if (gSqueakUseFileMappedMMAP) { @@ -174,6 +175,7 @@ munmap(startOfmmapForANONMemory,freeSpaceRoundedUpToPageSize); } } +#endif #ifdef BUILD_FOR_OSX size_t @@ -249,4 +251,36 @@ if (munmap(addr, sz) != 0) perror("sqDeallocateMemorySegment... munmap"); } + +static int mmax(size_t x, size_t y) { return (x > y) ? x : y; } + + +/* Answer the address of minHeapSize rounded up to page size bytes of memory. */ +usqInt +sqAllocateMemory(usqInt minHeapSize, usqInt desiredHeapSize) +{ + char *hint, *address, *alloc; + unsigned long alignment, allocBytes; + + if (pageSize) { + fprintf(stderr, "sqAllocateMemory: already called\n"); + exit(1); + } + pageSize = getpagesize(); + pageMask = ~(pageSize - 1); + + hint = sbrk(0); + + alignment = mmax(pageSize,1024*1024); + address = (char *)(((usqInt)hint + alignment - 1) & ~(alignment - 1)); + + alloc = sqAllocateMemorySegmentOfSizeAboveAllocatedSizeInto + (roundUpToPage(desiredHeapSize), address, &allocBytes); + if (!alloc) { + fprintf(stderr, "sqAllocateMemory: initial alloc failed!\n"); + exit(errno); + } + return (usqInt)alloc; +} + #endif /* SPURVM */ Modified: branches/Cog/platforms/unix/plugins/AsynchFilePlugin/sqUnixAsynchFile.c =================================================================== --- branches/Cog/platforms/unix/plugins/AsynchFilePlugin/sqUnixAsynchFile.c 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/unix/plugins/AsynchFilePlugin/sqUnixAsynchFile.c 2015-11-02 00:02:54 UTC (rev 3481) @@ -140,7 +140,7 @@ return fp; } -INLINE static allocateBuffer(struct FileBuf *buf, int size) +INLINE static int allocateBuffer(struct FileBuf *buf, int size) { if (buf->capacity >= size) return 1; Modified: branches/Cog/platforms/unix/vm/sqUnixHeartbeat.c =================================================================== --- branches/Cog/platforms/unix/vm/sqUnixHeartbeat.c 2015-10-26 04:05:32 UTC (rev 3480) +++ branches/Cog/platforms/unix/vm/sqUnixHeartbeat.c 2015-11-02 00:02:54 UTC (rev 3481) @@ -463,9 +463,9 @@ unsigned long ioHeartbeatFrequency(int resetStats) { - unsigned duration = (ioUTCMicroseconds() - get64(frequencyMeasureStart)) + unsigned long duration = (ioUTCMicroseconds() - get64(frequencyMeasureStart)) / MicrosecondsPerSecond; - unsigned frequency = duration ? heartbeats / duration : 0; + unsigned long frequency = duration ? heartbeats / duration : 0; if (resetStats) { unsigned long long zero = 0;

3 2

VM Maker: VMMaker.oscog-eem.1506.mcz
by commits＠source.squeak.org 03 Nov '15

03 Nov '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1506.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1506 Author: eem Time: 3 November 2015, 1:54:20.959 pm UUID: 1eef10b5-fab7-41fe-a8fc-b5d77379ce72 Ancestors: VMMaker.oscog-eem.1505 Oops! remember to comment the byte read convention in CogRTLOpcodes class>>initialize =============== Diff against VMMaker.oscog-eem.1505 =============== Item was changed: ----- Method: CogRTLOpcodes class>>initialize (in category 'class initialization') ----- initialize "Abstract opcodes are a compound of a one word operation specifier and zero or more operand type specifiers. e.g. MoveRR is the Move opcode with two register operand specifiers and defines a move register to register instruction from operand 0 to operand 1. The word and register size is assumed to be either 32-bits on a 32-bit architecture or 64-bits on a 64-bit architecture. The abstract machine is mostly a 2 address machine with the odd three address instruction added to better exploit RISCs. (self initialize) The operand specifiers are R - general purpose register Rd - double-precision floating-point register Cq - a `quick' constant that can be encoded in the minimum space possible. Cw - a constant with word size where word is the default operand size for the Smalltalk VM, 32-bits for a 32-bit VM, 64-bits for a 64-bit VM. The generated constant must occupy the default number of bits. This allows e.g. a garbage collector to update the value without invalidating the code. C32 - a constant with 32 bit size. The generated constant must occupy 32 bits. C64 - a constant with 64 bit size. The generated constant must occupy 64 bits. Aw - memory word at an absolute address Ab - memory byte at an absolute address Mwr - memory word whose address is at a constant offset from an address in a register Mbr - memory byte whose address is at a constant offset from an address in a register (zero-extended on read) M16r - memory 16-bit halfword whose address is at a constant offset from an address in a register M32r - memory 32-bit halfword whose address is at a constant offset from an address in a register M64r - memory 64-bit doubleword whose address is at a constant offset from an address in a register XbrR - memory word whose address is r * byte size away from an address in a register X16rR - memory word whose address is r * (2 bytes size) away from an address in a register XwrR - memory word whose address is r * word size away from an address in a register XowrR - memory word whose address is (r * word size) + o away from an address in a register (scaled indexed) An alternative would be to decouple opcodes from operands, e.g. Move := 1. Add := 2. Sub := 3... RegisterOperand := 1. ConstantQuickOperand := 2. ConstantWordOperand := 3... But not all combinations make sense and even fewer are used so we stick with the simple compound approach. The assumption is that comparison and arithmetic instructions set condition codes and that move instructions leave the condition codes unaffected. In particular LoadEffectiveAddressMwrR does not set condition codes although it can be used to do arithmetic. Not all of the definitions in opcodeDefinitions below are implemented. In particular we do not implement the + XowrR scaled index addressing mode since it requires 4 operands. - XowrR scaled index addressing mode since it requires 4 operands. Note that there are no generic division instructions defined, but a processor may define some. Branch/Call ranges. Jump[Cond] can be generated as short as possible. Call/Jump[Cond]Long must be generated in the same number of bytes irrespective of displacement since their targets may be updated, but they need only span 16Mb, the maximum size of the code zone. This allows e.g. ARM to use single-word call and jump instructions for most calls and jumps. CallFull/JumpFull must also be generated in the same number of bytes irrespective of displacement for the same reason, but they must be able to span the full (32-bit or 64-bit) address space because they are used to call code in the C runtime, which may be distant from the code zone. CallFull/JumpFull are allowed + to use the cResultRegister as a scratch if required (e.g. on x64 where there is no direct 64-bit call or jump). - to use the cResultRegister as a scratch if required (e.g. on x64 where there is no direct 64-bit call or jump)." + Byte reads. If the concrete compiler class answers true to byteReadsZeroExtend then byte reads must zero-extend + the byte read into the destination register. If not, the other bits of the register should be left undisturbed and the + Cogit will add an instruction to zero the register as required. Under no circumstances should byte reads sign-extend." + | opcodeNames refs | "A small fixed set of abstract registers are defined and used in code generation for Smalltalk code, and executes on stack pages in the stack zone. These are mapped to processor-specific registers by concreteRegister:" FPReg := -1. "A frame pointer is used for Smalltalk frames." SPReg := -2. ReceiverResultReg := -3. "The receiver at point of send, and return value of a send" TempReg := -4. ClassReg := -5. "The inline send cache class tag is in this register, loaded at the send site" SendNumArgsReg := -6. "Sends > 2 args set the arg count in this reg" Arg0Reg := -7. "In the StackToRegisterMappingCogit 1 & 2 arg sends marshall into these registers." Arg1Reg := -8. "A small fixed set of abstract scratch registers for register-rich machines (ARM can use 1, x64 can use 6)." Scratch0Reg := -9. Scratch1Reg := -10. Scratch2Reg := -11. Scratch3Reg := -12. Scratch4Reg := -13. Scratch5Reg := -14. Scratch6Reg := -15. Scratch7Reg := -16. "RISC-specific registers" LinkReg := -17. RISCTempReg := -18. "Used to synthesize CISC instructions from multiple RISC instructions." PCReg := -19. VarBaseReg := -20. "If useful, points to base of interpreter variables." "Floating-point registers" DPFPReg0 := -21. DPFPReg1 := -22. DPFPReg2 := -23. DPFPReg3 := -24. DPFPReg4 := -25. DPFPReg5 := -26. DPFPReg6 := -27. DPFPReg7 := -28. opcodeNames := #("Noops & Pseudo Ops" Label Literal "a word-sized literal" AlignmentNops FillBytesFrom "output operand 0's worth of bytes from the address in operand 1" Fill8 "output a byte's worth of bytes with operand 0" Fill16 "output two byte's worth of bytes with operand 0" Fill32 "output four byte's worth of bytes with operand 0" FillFromWord "output BytesPerWord's worth of bytes with operand 0 + operand 1" Nop "Control" Call "call within the code zone" CallFull "call anywhere within the full address space" RetN JumpR "Not a regular jump, i.e. not pc dependent." Stop "Halt the processor" "N.B. Jumps are contiguous. Long and Full jumps are contigiuous within them. See FirstJump et al below" JumpFull "Jump anywhere within the address space" JumpLong "Jump anywhere within the 16mb code zone." JumpLongZero "a.k.a. JumpLongEqual" JumpLongNonZero "a.k.a. JumpLongNotEqual" Jump "short jumps; can be encoded in as few bytes as possible; will not be disturbed by GC or relocation." JumpZero "a.k.a. JumpEqual" JumpNonZero "a.k.a. JumpNotEqual" JumpNegative JumpNonNegative JumpOverflow JumpNoOverflow JumpCarry JumpNoCarry JumpLess "signed" JumpGreaterOrEqual JumpGreater JumpLessOrEqual JumpBelow "unsigned" JumpAboveOrEqual JumpAbove JumpBelowOrEqual JumpFPEqual JumpFPNotEqual JumpFPLess JumpFPLessOrEqual JumpFPGreater JumpFPGreaterOrEqual JumpFPOrdered JumpFPUnordered "Data Movement; destination is always last operand" MoveRR MoveAwR MoveRAw MoveAbR MoveRAb MoveMwrR MoveRMwr MoveXwrRR MoveRXwrR MoveXowrR MoveRXowr MoveM16rR MoveRM16r MoveX16rRR MoveRX16rR MoveM32rR MoveRM32r MoveX32rRR MoveRX32rR MoveMbrR MoveRMbr MoveXbrRR MoveRXbrR MoveCqR MoveCwR MoveC32R MoveC64R MoveRdRd MoveM64rRd MoveRdM64r PopR PushR PushCq PushCw PrefetchAw "Arithmetic; destination is always last operand except Cmp; CmpXR is SubRX with no update of result" LoadEffectiveAddressMwrR LoadEffectiveAddressXowrR "Variants of add/multiply" NegateR "2's complement negation" ArithmeticShiftRightCqR ArithmeticShiftRightRR LogicalShiftRightCqR LogicalShiftRightRR LogicalShiftLeftCqR LogicalShiftLeftRR CmpRR AddRR SubRR AndRR OrRR XorRR CmpCqR AddCqR SubCqR AndCqR OrCqR TstCqR XorCqR CmpCwR CmpC32R AddCwR SubCwR AndCwR OrCwR XorCwR AndCqRR CmpRdRd AddRdRd SubRdRd MulRdRd DivRdRd SqrtRd "Conversion" ConvertRRd LastRTLCode). "Magic auto declaration. Add to the classPool any new variables and nuke any obsolete ones, and assign values" "Find the variables directly referenced by this method" refs := (thisContext method literals select: [:l| l isVariableBinding and: [classPool includesKey: l key]]) collect: [:ea| ea key]. "Move to Undeclared any opcodes in classPool not in opcodes or this method." (classPool keys reject: [:k| (opcodeNames includes: k) or: [refs includes: k]]) do: [:k| Undeclared declare: k from: classPool]. "Declare as class variables and number elements of opcodeArray above" opcodeNames withIndexDo: [:classVarName :value| self classPool declare: classVarName from: Undeclared; at: classVarName put: value]. "For CogAbstractInstruction>>isJump etc..." FirstJump := JumpFull. LastJump := JumpFPUnordered. FirstShortJump := Jump. "And now initialize the backends; they add their own opcodes and hence these must be reinitialized." (Smalltalk classNamed: #CogAbstractInstruction) ifNotNil: [:cogAbstractInstruction| cogAbstractInstruction allSubclasses do: [:sc| sc initialize]]!

1 0

VM Maker: VMMaker.oscog-eem.1505.mcz
by commits＠source.squeak.org 03 Nov '15

03 Nov '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1505.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1505 Author: eem Time: 3 November 2015, 1:48:54.159 pm UUID: 4cd041e4-27ee-474f-b71c-f5230ed35af2 Ancestors: VMMaker.oscog-eem.1504 Cogit: Clarify whether byte reads zero-extend by introducing CogAbstractInstruction>>byteReadsZeroExtend. Make sure the x86 does zero-extend and take the easy route with x64 having it not zero-extend. Leaving the ARM to Tim (thanks!!). =============== Diff against VMMaker.oscog-eem.1504 =============== Item was added: + ----- Method: CogAbstractInstruction>>byteReadsZeroExtend (in category 'testing') ----- + byteReadsZeroExtend + "Answer if a byte read, via MoveAbR, MoveMbrR, or MoveXbrRR zero-extends + into the full register, or merely affects the least significant 8 bits of the + the register. By default the code generator assumes that byte reads + to not zero extend. Note that byte reads /must not/ sign extend." + ^false! Item was added: + ----- Method: CogIA32Compiler>>byteReadsZeroExtend (in category 'testing') ----- + byteReadsZeroExtend + "Answer if a byte read, via MoveAbR, MoveMbrR, or MoveXbrRR zero-extends + into the full register, or merely affects the least significant 8 bits of the + the register. By default the code generator assumes that byte reads + to not zero extend. Note that byte reads /must not/ sign extend. + On x86 we always use movzbl" + ^true! Item was changed: ----- Method: CogIA32Compiler>>computeMaximumSize (in category 'generate machine code') ----- computeMaximumSize "Compute the maximum size for each opcode. This allows jump offsets to be determined, provided that all backward branches are long branches." "N.B. The ^N forms are to get around the bytecode compiler's long branch limits which are exceeded when each case jumps around the otherwise." opcode caseOf: { "Noops & Pseudo Ops" [Label] -> [^0]. [AlignmentNops] -> [^(operands at: 0) - 1]. [Fill16] -> [^2]. [Fill32] -> [^4]. [FillFromWord] -> [^4]. [Nop] -> [^1]. "Specific Control/Data Movement" [CDQ] -> [^1]. [IDIVR] -> [^2]. [IMULRR] -> [^3]. [CPUID] -> [^2]. [CMPXCHGAwR] -> [^7]. [CMPXCHGMwrR] -> [^(self concreteRegister: (operands at: 1)) = ESP ifTrue: [(self isQuick: (operands at: 0)) ifTrue: [5] ifFalse: [8]] ifFalse: [(self isQuick: (operands at: 0)) ifTrue: [4] ifFalse: [7]]]. [LFENCE] -> [^3]. [MFENCE] -> [^3]. [SFENCE] -> [^3]. [LOCK] -> [^1]. [XCHGAwR] -> [^6]. [XCHGMwrR] -> [^(self concreteRegister: (operands at: 1)) = ESP ifTrue: [(self isQuick: (operands at: 0)) ifTrue: [4] ifFalse: [7]] ifFalse: [(self isQuick: (operands at: 0)) ifTrue: [3] ifFalse: [6]]]. [XCHGRR] -> [^((self concreteRegister: (operands at: 0)) = EAX or: [(self concreteRegister: (operands at: 1)) = EAX]) ifTrue: [1] ifFalse: [2]]. "Control" [CallFull] -> [^5]. [Call] -> [^5]. [JumpR] -> [^2]. [JumpFull] -> [self resolveJumpTarget. ^5]. [JumpLong] -> [self resolveJumpTarget. ^5]. [Jump] -> [self resolveJumpTarget. ^5]. [JumpZero] -> [self resolveJumpTarget. ^6]. [JumpNonZero] -> [self resolveJumpTarget. ^6]. [JumpNegative] -> [self resolveJumpTarget. ^6]. [JumpNonNegative] -> [self resolveJumpTarget. ^6]. [JumpOverflow] -> [self resolveJumpTarget. ^6]. [JumpNoOverflow] -> [self resolveJumpTarget. ^6]. [JumpCarry] -> [self resolveJumpTarget. ^6]. [JumpNoCarry] -> [self resolveJumpTarget. ^6]. [JumpLess] -> [self resolveJumpTarget. ^6]. [JumpGreaterOrEqual] -> [self resolveJumpTarget. ^6]. [JumpGreater] -> [self resolveJumpTarget. ^6]. [JumpLessOrEqual] -> [self resolveJumpTarget. ^6]. [JumpBelow] -> [self resolveJumpTarget. ^6]. [JumpAboveOrEqual] -> [self resolveJumpTarget. ^6]. [JumpAbove] -> [self resolveJumpTarget. ^6]. [JumpBelowOrEqual] -> [self resolveJumpTarget. ^6]. [JumpLongZero] -> [self resolveJumpTarget. ^6]. [JumpLongNonZero] -> [self resolveJumpTarget. ^6]. [JumpFPEqual] -> [self resolveJumpTarget. ^6]. [JumpFPNotEqual] -> [self resolveJumpTarget. ^6]. [JumpFPLess] -> [self resolveJumpTarget. ^6]. [JumpFPGreaterOrEqual] -> [self resolveJumpTarget. ^6]. [JumpFPGreater] -> [self resolveJumpTarget. ^6]. [JumpFPLessOrEqual] -> [self resolveJumpTarget. ^6]. [JumpFPOrdered] -> [self resolveJumpTarget. ^6]. [JumpFPUnordered] -> [self resolveJumpTarget. ^6]. [RetN] -> [^(operands at: 0) = 0 ifTrue: [1] ifFalse: [3]]. [Stop] -> [^1]. "Arithmetic" [AddCqR] -> [^(self isQuick: (operands at: 0)) ifTrue: [3] ifFalse: [(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]]]. [AndCqR] -> [^(self isQuick: (operands at: 0)) ifTrue: [3] ifFalse: [(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]]]. [CmpCqR] -> [^(self isQuick: (operands at: 0)) ifTrue: [3] ifFalse: [(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]]]. [OrCqR] -> [^(self isQuick: (operands at: 0)) ifTrue: [3] ifFalse: [(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]]]. [SubCqR] -> [^(self isQuick: (operands at: 0)) ifTrue: [3] ifFalse: [(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]]]. [TstCqR] -> [^((self isQuick: (operands at: 0)) and: [(self concreteRegister: (operands at: 1)) < 4]) ifTrue: [3] ifFalse: [(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]]]. [AddCwR] -> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]]. [AndCwR] -> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]]. [CmpCwR] -> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]]. [OrCwR] -> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]]. [SubCwR] -> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]]. [XorCwR] -> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]]. [AddRR] -> [^2]. [AndRR] -> [^2]. [CmpRR] -> [^2]. [OrRR] -> [^2]. [XorRR] -> [^2]. [SubRR] -> [^2]. [NegateR] -> [^2]. [LoadEffectiveAddressMwrR] -> [^((self isQuick: (operands at: 0)) ifTrue: [3] ifFalse: [6]) + ((self concreteRegister: (operands at: 1)) = ESP ifTrue: [1] ifFalse: [0])]. [LogicalShiftLeftCqR] -> [^(operands at: 0) = 1 ifTrue: [2] ifFalse: [3]]. [LogicalShiftRightCqR] -> [^(operands at: 0) = 1 ifTrue: [2] ifFalse: [3]]. [ArithmeticShiftRightCqR] -> [^(operands at: 0) = 1 ifTrue: [2] ifFalse: [3]]. [LogicalShiftLeftRR] -> [^self computeShiftRRSize]. [LogicalShiftRightRR] -> [^self computeShiftRRSize]. [ArithmeticShiftRightRR] -> [^self computeShiftRRSize]. [AddRdRd] -> [^4]. [CmpRdRd] -> [^4]. [SubRdRd] -> [^4]. [MulRdRd] -> [^4]. [DivRdRd] -> [^4]. [SqrtRd] -> [^4]. "Data Movement" [MoveCqR] -> [^(operands at: 0) = 0 ifTrue: [2] ifFalse: [5]]. [MoveCwR] -> [^5]. [MoveRR] -> [^2]. [MoveRdRd] -> [^4]. [MoveAwR] -> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]]. [MoveRAw] -> [^(self concreteRegister: (operands at: 0)) = EAX ifTrue: [5] ifFalse: [6]]. + [MoveAbR] -> [^7]. - [MoveAbR] -> [^(self concreteRegister: (operands at: 1)) = EAX ifTrue: [5] ifFalse: [6]]. [MoveRAb] -> [^(self concreteRegister: (operands at: 0)) = EAX ifTrue: [5] ifFalse: [6]]. [MoveRMwr] -> [^((self isQuick: (operands at: 1)) ifTrue: [((operands at: 1) = 0 and: [(self concreteRegister: (operands at: 2)) ~= EBP]) ifTrue: [2] ifFalse: [3]] ifFalse: [6]) + ((self concreteRegister: (operands at: 2)) = ESP ifTrue: [1] ifFalse: [0])]. [MoveRdM64r] -> [^((self isQuick: (operands at: 1)) ifTrue: [5] ifFalse: [8]) + ((self concreteRegister: (operands at: 2)) = ESP ifTrue: [1] ifFalse: [0])]. [MoveMbrR] -> [^(self concreteRegister: (operands at: 1)) = ESP ifTrue: [(self isQuick: (operands at: 0)) ifTrue: [5] ifFalse: [8]] ifFalse: [(self isQuick: (operands at: 0)) ifTrue: [4] ifFalse: [7]]]. [MoveRMbr] -> [^(self concreteRegister: (operands at: 2)) = ESP ifTrue: [7] ifFalse: [(self isQuick: (operands at: 1)) ifTrue: [3] ifFalse: [6]]]. [MoveM16rR] -> [^(self concreteRegister: (operands at: 1)) = ESP ifTrue: [(self isQuick: (operands at: 0)) ifTrue: [5] ifFalse: [8]] ifFalse: [(self isQuick: (operands at: 0)) ifTrue: [4] ifFalse: [7]]]. [MoveM64rRd] -> [^((self isQuick: (operands at: 0)) ifTrue: [5] ifFalse: [8]) + ((self concreteRegister: (operands at: 1)) = ESP ifTrue: [1] ifFalse: [0])]. [MoveMwrR] -> [^((self isQuick: (operands at: 0)) ifTrue: [((operands at: 0) = 0 and: [(self concreteRegister: (operands at: 1)) ~= EBP]) ifTrue: [2] ifFalse: [3]] ifFalse: [6]) + ((self concreteRegister: (operands at: 1)) = ESP ifTrue: [1] ifFalse: [0])]. [MoveXbrRR] -> [self assert: (self concreteRegister: (operands at: 0)) ~= ESP. ^(self concreteRegister: (operands at: 1)) = EBP ifTrue: [5] ifFalse: [4]]. [MoveRXbrR] -> [self assert: (self concreteRegister: (operands at: 1)) ~= ESP. ^((self concreteRegister: (operands at: 2)) = EBP ifTrue: [4] ifFalse: [3]) + ((self concreteRegister: (operands at: 0)) >= 4 ifTrue: [2] ifFalse: [0])]. [MoveXwrRR] -> [self assert: (self concreteRegister: (operands at: 0)) ~= ESP. ^(self concreteRegister: (operands at: 1)) = EBP ifTrue: [4] ifFalse: [3]]. [MoveRXwrR] -> [self assert: (self concreteRegister: (operands at: 1)) ~= ESP. ^(self concreteRegister: (operands at: 2)) = EBP ifTrue: [4] ifFalse: [3]]. [PopR] -> [^1]. [PushR] -> [^1]. [PushCq] -> [^(self isQuick: (operands at: 0)) ifTrue: [2] ifFalse: [5]]. [PushCw] -> [^5]. [PrefetchAw] -> [^self hasSSEInstructions ifTrue: [7] ifFalse: [0]]. "Conversion" [ConvertRRd] -> [^4] }. ^0 "to keep C compiler quiet"! Item was changed: ----- Method: CogIA32Compiler>>concretizeMoveAbR (in category 'generate machine code') ----- concretizeMoveAbR + "N.B. we zero-extend because we state byteReadsZeroExtend." "Will get inlined into concretizeAt: switch." <inline: true> | addressOperand reg | addressOperand := operands at: 0. (self isAnInstruction: (cogit cCoerceSimple: addressOperand to: #'AbstractInstruction *')) ifTrue: [addressOperand := (cogit cCoerceSimple: addressOperand to: #'AbstractInstruction *') address]. reg := self concreteRegister: (operands at: 1). - reg = EAX ifTrue: - [machineCode - at: 0 put: 16rA0; - at: 1 put: (addressOperand bitAnd: 16rFF); - at: 2 put: (addressOperand >> 8 bitAnd: 16rFF); - at: 3 put: (addressOperand >> 16 bitAnd: 16rFF); - at: 4 put: (addressOperand >> 24 bitAnd: 16rFF). - ^machineCodeSize := 5]. machineCode + at: 0 put: 16r0F; + at: 1 put: 16rB6; + at: 2 put: (self mod: ModRegInd RM: 5 RO: reg); + at: 3 put: (addressOperand bitAnd: 16rFF); + at: 4 put: (addressOperand >> 8 bitAnd: 16rFF); + at: 5 put: (addressOperand >> 16 bitAnd: 16rFF); + at: 6 put: (addressOperand >> 24 bitAnd: 16rFF). + ^machineCodeSize := 7! - at: 0 put: 16r8A; - at: 1 put: (self mod: ModRegInd RM: 5 RO: reg); - at: 2 put: (addressOperand bitAnd: 16rFF); - at: 3 put: (addressOperand >> 8 bitAnd: 16rFF); - at: 4 put: (addressOperand >> 16 bitAnd: 16rFF); - at: 5 put: (addressOperand >> 24 bitAnd: 16rFF). - ^machineCodeSize := 6! Item was changed: ----- Method: CogIA32Compiler>>concretizeMoveMbrR (in category 'generate machine code') ----- concretizeMoveMbrR + "N.B. we zero-extend because we state byteReadsZeroExtend." - "N.B. The Cogit compiler makes no assumption about the upper bits being set to zero. - It will clear the register before hand if necessary." "Will get inlined into concretizeAt: switch." <inline: true> | srcReg offset destReg | offset := operands at: 0. srcReg := self concreteRegister: (operands at: 1). destReg := self concreteRegister: (operands at: 2). srcReg ~= ESP ifTrue: [(self isQuick: offset) ifTrue: [machineCode at: 0 put: 16r0f; at: 1 put: 16rb6; at: 2 put: (self mod: ModRegRegDisp8 RM: srcReg RO: destReg); at: 3 put: (offset bitAnd: 16rFF). ^machineCodeSize := 4]. machineCode at: 0 put: 16r0f; at: 1 put: 16rb6; at: 2 put: (self mod: ModRegRegDisp32 RM: srcReg RO: destReg); at: 3 put: (offset bitAnd: 16rFF); at: 4 put: (offset >> 8 bitAnd: 16rFF); at: 5 put: (offset >> 16 bitAnd: 16rFF); at: 6 put: (offset >> 24 bitAnd: 16rFF). ^machineCodeSize := 7]. "ESP:" (self isQuick: offset) ifTrue: [machineCode at: 0 put: 16r0f; at: 1 put: 16rb6; at: 2 put: (self mod: ModRegRegDisp8 RM: srcReg RO: destReg); at: 3 put: (self s: SIB1 i: 4 b: srcReg); at: 4 put: (offset bitAnd: 16rFF). ^machineCodeSize := 5]. machineCode at: 0 put: 16r0f; at: 1 put: 16rb6; at: 2 put: (self mod: ModRegRegDisp32 RM: srcReg RO: destReg); at: 3 put: (self s: SIB1 i: 4 b: srcReg); at: 4 put: (offset bitAnd: 16rFF); at: 5 put: (offset >> 8 bitAnd: 16rFF); at: 6 put: (offset >> 16 bitAnd: 16rFF); at: 7 put: (offset >> 24 bitAnd: 16rFF). ^machineCodeSize := 8! Item was changed: ----- Method: CogIA32Compiler>>concretizeMoveXbrRR (in category 'generate machine code') ----- concretizeMoveXbrRR + "N.B. we zero-extend because we state byteReadsZeroExtend." "Will get inlined into concretizeAt: switch." <inline: true> | index base dest | index := self concreteRegister: (operands at: 0). base := self concreteRegister: (operands at: 1). dest := self concreteRegister: (operands at: 2). base ~= EBP ifTrue: [machineCode at: 0 put: 16r0F; at: 1 put: 16rB6; at: 2 put: (self mod: ModRegInd RM: 4 RO: dest); at: 3 put: (self s: SIB1 i: index b: base). ^machineCodeSize := 4]. machineCode at: 0 put: 16r0F; at: 1 put: 16rB6; at: 2 put: (self mod: ModRegRegDisp8 RM: 4 RO: dest); at: 3 put: (self s: SIB1 i: index b: base); at: 4 put: 0. ^machineCodeSize := 5! Item was changed: ----- Method: CogIA32CompilerTests>>testMoveAbR (in category 'tests') ----- testMoveAbR "self new testMoveAbR" + CogIA32CompilerForTests registersWithNamesDo: - CogIA32CompilerForTests byteRegistersWithNamesDo: [:reg :regname| #(16r555555 16rAAAAAA) do: [:addr| | inst len | inst := self gen: MoveAbR operand: addr operand: reg. len := inst concretizeAt: 0. + self assert: inst byteReadsZeroExtend. self processor disassembleInstructionAt: 0 In: inst machineCode object into: [:str :sz| | plainJane herIntended | "Convert e.g. '00000000: movl %eax, 0x2(%eax) : 89 40 02' to 'movl %eax, 0x2(%eax)'" plainJane := self strip: str. + herIntended := 'movzbl 0x', (addr hex allButFirst: 3), ', ', regname. - herIntended := 'movb 0x', (addr hex allButFirst: 3), ', ', regname. self assert: (plainJane match: herIntended). self assert: len = sz]]]! Item was changed: ----- Method: CogObjectRepresentationFor32BitSpur>>genNoPopCreateClosureAt:numArgs:numCopied:contextNumArgs:large:inBlock: (in category 'bytecode generator support') ----- genNoPopCreateClosureAt: bcpc numArgs: numArgs numCopied: numCopied contextNumArgs: ctxtNumArgs large: isLargeCtxt inBlock: isInBlock "Create a closure with the given startpc, numArgs and numCopied within a context with ctxtNumArgs, large if isLargeCtxt that is in a block if isInBlock. Do /not/ initialize the copied values." + | numSlots byteSize header skip | - | slotSize header skip | <var: #skip type: #'AbstractInstruction *'> "First get thisContext into ReceiverResultRega and thence in ClassReg." self genGetActiveContextNumArgs: ctxtNumArgs large: isLargeCtxt inBlock: isInBlock. cogit MoveR: ReceiverResultReg R: ClassReg. + numSlots := ClosureFirstCopiedValueIndex + numCopied. + byteSize := objectMemory smallObjectBytesForSlots: numSlots. - slotSize := ClosureFirstCopiedValueIndex + numCopied. header := objectMemory + headerForSlots: numSlots - headerForSlots: slotSize format: objectMemory indexablePointersFormat classIndex: ClassBlockClosureCompactIndex. cogit MoveAw: objectMemory freeStartAddress R: ReceiverResultReg; MoveCq: (self low32BitsOf: header) R: TempReg; MoveR: TempReg Mw: 0 r: ReceiverResultReg; MoveCq: header >> 32 R: TempReg; MoveR: TempReg Mw: 4 r: ReceiverResultReg; + LoadEffectiveAddressMw: byteSize r: ReceiverResultReg R: TempReg; - MoveR: ReceiverResultReg R: TempReg; - AddCq: (objectMemory smallObjectBytesForSlots: slotSize) R: TempReg; MoveR: TempReg Aw: objectMemory freeStartAddress; CmpCq: objectMemory getScavengeThreshold R: TempReg. skip := cogit JumpBelow: 0. cogit CallRT: ceScheduleScavengeTrampoline. skip jmpTarget: cogit Label. cogit MoveR: ClassReg Mw: ClosureOuterContextIndex * objectMemory bytesPerOop + objectMemory baseHeaderSize r: ReceiverResultReg; MoveCq: (objectMemory integerObjectOf: bcpc) R: TempReg; MoveR: TempReg Mw: ClosureStartPCIndex * objectMemory bytesPerOop + objectMemory baseHeaderSize r: ReceiverResultReg; MoveCq: (objectMemory integerObjectOf: numArgs) R: TempReg; MoveR: TempReg Mw: ClosureNumArgsIndex * objectMemory bytesPerOop + objectMemory baseHeaderSize r: ReceiverResultReg. ^0! Item was added: + ----- Method: CogObjectRepresentationFor64BitSpur>>genNoPopCreateClosureAt:numArgs:numCopied:contextNumArgs:large:inBlock: (in category 'bytecode generator support') ----- + genNoPopCreateClosureAt: bcpc numArgs: numArgs numCopied: numCopied contextNumArgs: ctxtNumArgs large: isLargeCtxt inBlock: isInBlock + "Create a closure with the given startpc, numArgs and numCopied + within a context with ctxtNumArgs, large if isLargeCtxt that is in a + block if isInBlock. Do /not/ initialize the copied values." + | numSlots byteSize header skip | + <var: #skip type: #'AbstractInstruction *'> + + "First get thisContext into ReceiverResultRega and thence in ClassReg." + self genGetActiveContextNumArgs: ctxtNumArgs large: isLargeCtxt inBlock: isInBlock. + cogit MoveR: ReceiverResultReg R: ClassReg. + + numSlots := ClosureFirstCopiedValueIndex + numCopied. + byteSize := objectMemory smallObjectBytesForSlots: numSlots. + header := objectMemory + headerForSlots: numSlots + format: objectMemory indexablePointersFormat + classIndex: ClassBlockClosureCompactIndex. + cogit + MoveAw: objectMemory freeStartAddress R: ReceiverResultReg; + MoveCq: header R: TempReg; + MoveR: TempReg Mw: 0 r: ReceiverResultReg; + LoadEffectiveAddressMw: byteSize r: ReceiverResultReg R: TempReg; + MoveR: TempReg Aw: objectMemory freeStartAddress; + CmpCq: objectMemory getScavengeThreshold R: TempReg. + skip := cogit JumpBelow: 0. + cogit CallRT: ceScheduleScavengeTrampoline. + skip jmpTarget: cogit Label. + + cogit + MoveR: ClassReg Mw: ClosureOuterContextIndex * objectMemory bytesPerOop + objectMemory baseHeaderSize r: ReceiverResultReg; + MoveCq: (objectMemory integerObjectOf: bcpc) R: TempReg; + MoveR: TempReg Mw: ClosureStartPCIndex * objectMemory bytesPerOop + objectMemory baseHeaderSize r: ReceiverResultReg; + MoveCq: (objectMemory integerObjectOf: numArgs) R: TempReg; + MoveR: TempReg Mw: ClosureNumArgsIndex * objectMemory bytesPerOop + objectMemory baseHeaderSize r: ReceiverResultReg. + ^0! Item was changed: ----- Method: CogObjectRepresentationForSpur>>genGetRawSlotSizeOfNonImm:into: (in category 'compile abstract instructions') ----- genGetRawSlotSizeOfNonImm: sourceReg into: destReg "The raw numSlots field is the most significant byte of the 64-bit header word. MoveMbrR zero-extends." + cogit backEnd byteReadsZeroExtend ifFalse: + [self MoveCq: 0 R: destReg]. cogit MoveMb: 7 r: sourceReg R: destReg. ^0! Item was changed: ----- Method: CogX64Compiler>>computeMaximumSize (in category 'generate machine code') ----- computeMaximumSize "Compute the maximum size for each opcode. This allows jump offsets to be determined, provided that all backward branches are long branches." "N.B. The ^N forms are to get around the bytecode compiler's long branch limits which are exceeded when each case jumps around the otherwise." opcode caseOf: { "Noops & Pseudo Ops" [Label] -> [^0]. [AlignmentNops] -> [^(operands at: 0) - 1]. [Fill16] -> [^2]. [Fill32] -> [^4]. [FillFromWord] -> [^4]. [Nop] -> [^1]. "Specific Control/Data Movement" [CDQ] -> [^2]. [IDIVR] -> [^3]. [IMULRR] -> [^4]. [CPUID] -> [^2]. [CMPXCHGAwR] -> [^8]. [CMPXCHGMwrR] -> [^9]. [LFENCE] -> [^3]. [MFENCE] -> [^3]. [SFENCE] -> [^3]. [LOCK] -> [^1]. "[XCHGAwR] -> [^6]. [XCHGMwrR] -> [^7]." [XCHGRR] -> [^((self concreteRegister: (operands at: 0)) = RAX or: [(self concreteRegister: (operands at: 1)) = RAX]) ifTrue: [2] ifFalse: [3]]. "Control" [CallFull] -> [^12]. [Call] -> [^5]. [JumpR] -> [^2]. [JumpFull] -> [self resolveJumpTarget. ^12]. [JumpLong] -> [self resolveJumpTarget. ^5]. [Jump] -> [self resolveJumpTarget. ^5]. [JumpZero] -> [self resolveJumpTarget. ^6]. [JumpNonZero] -> [self resolveJumpTarget. ^6]. [JumpNegative] -> [self resolveJumpTarget. ^6]. [JumpNonNegative] -> [self resolveJumpTarget. ^6]. [JumpOverflow] -> [self resolveJumpTarget. ^6]. [JumpNoOverflow] -> [self resolveJumpTarget. ^6]. [JumpCarry] -> [self resolveJumpTarget. ^6]. [JumpNoCarry] -> [self resolveJumpTarget. ^6]. [JumpLess] -> [self resolveJumpTarget. ^6]. [JumpGreaterOrEqual] -> [self resolveJumpTarget. ^6]. [JumpGreater] -> [self resolveJumpTarget. ^6]. [JumpLessOrEqual] -> [self resolveJumpTarget. ^6]. [JumpBelow] -> [self resolveJumpTarget. ^6]. [JumpAboveOrEqual] -> [self resolveJumpTarget. ^6]. [JumpAbove] -> [self resolveJumpTarget. ^6]. [JumpBelowOrEqual] -> [self resolveJumpTarget. ^6]. [JumpLongZero] -> [self resolveJumpTarget. ^6]. [JumpLongNonZero] -> [self resolveJumpTarget. ^6]. [JumpFPEqual] -> [self resolveJumpTarget. ^6]. [JumpFPNotEqual] -> [self resolveJumpTarget. ^6]. [JumpFPLess] -> [self resolveJumpTarget. ^6]. [JumpFPGreaterOrEqual] -> [self resolveJumpTarget. ^6]. [JumpFPGreater] -> [self resolveJumpTarget. ^6]. [JumpFPLessOrEqual] -> [self resolveJumpTarget. ^6]. [JumpFPOrdered] -> [self resolveJumpTarget. ^6]. [JumpFPUnordered] -> [self resolveJumpTarget. ^6]. [RetN] -> [^(operands at: 0) = 0 ifTrue: [1] ifFalse: [3]]. [Stop] -> [^1]. "Arithmetic" [AddCqR] -> [^self computeSizeOfArithCqR]. [AndCqR] -> [^self computeSizeOfArithCqR]. [CmpCqR] -> [^self computeSizeOfArithCqR]. [OrCqR] -> [^self computeSizeOfArithCqR]. [SubCqR] -> [^self computeSizeOfArithCqR]. [TstCqR] -> [^self computeSizeOfArithCqR]. [AddCwR] -> [^self computeSizeOfArithCwR]. [AndCwR] -> [^self computeSizeOfArithCwR]. [CmpCwR] -> [^self computeSizeOfArithCwR]. [OrCwR] -> [^self computeSizeOfArithCwR]. [SubCwR] -> [^self computeSizeOfArithCwR]. [XorCwR] -> [^self computeSizeOfArithCwR]. [AddRR] -> [^3]. [AndRR] -> [^3]. [CmpRR] -> [^3]. [OrRR] -> [^3]. [XorRR] -> [^3]. [SubRR] -> [^3]. [NegateR] -> [^3]. [LoadEffectiveAddressMwrR] -> [^((self isQuick: (operands at: 0)) ifTrue: [4] ifFalse: [7]) + (((self concreteRegister: (operands at: 1)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. [LogicalShiftLeftCqR] -> [^(operands at: 0) = 1 ifTrue: [3] ifFalse: [4]]. [LogicalShiftRightCqR] -> [^(operands at: 0) = 1 ifTrue: [3] ifFalse: [4]]. [ArithmeticShiftRightCqR] -> [^(operands at: 0) = 1 ifTrue: [3] ifFalse: [4]]. [LogicalShiftLeftRR] -> [^self computeShiftRRSize]. [LogicalShiftRightRR] -> [^self computeShiftRRSize]. [ArithmeticShiftRightRR] -> [^self computeShiftRRSize]. [AddRdRd] -> [^4]. [CmpRdRd] -> [^4]. [SubRdRd] -> [^4]. [MulRdRd] -> [^4]. [DivRdRd] -> [^4]. [SqrtRd] -> [^4]. "Data Movement" [MoveCqR] -> [^(operands at: 0) = 0 ifTrue: [3] ifFalse: [(self is32BitSignedImmediate: (operands at: 0)) ifTrue: [7] ifFalse: [self moveCwRByteSize]]]. [MoveCwR] -> [^(self inCurrentCompilation: (operands at: 0)) ifTrue: [7] ifFalse: [self moveCwRByteSize]]. [MoveC32R] -> [^7]. "N.B. Always inlined." [MoveRR] -> [^3]. [MoveRdRd] -> [^4]. [MoveAwR] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [7] ifFalse: [(self concreteRegister: (operands at: 1)) = RAX ifTrue: [10] ifFalse: [14]]]. [MoveRAw] -> [^(self isAddressRelativeToVarBase: (operands at: 1)) ifTrue: [7] ifFalse: [(self concreteRegister: (operands at: 0)) = RAX ifTrue: [10] ifFalse: [14]]]. [MoveAbR] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [7] ifFalse: [(self concreteRegister: (operands at: 1)) = RAX ifTrue: [10] ifFalse: [14]]]. [MoveRAb] -> [^(self isAddressRelativeToVarBase: (operands at: 1)) ifTrue: [7] ifFalse: [(self concreteRegister: (operands at: 0)) = RAX ifTrue: [10] ifFalse: [14]]]. [MoveRMwr] -> [self assert: (self is32BitSignedImmediate: (operands at: 1)). ^((self isQuick: (operands at: 1)) ifTrue: [((operands at: 1) = 0 and: [((self concreteRegister: (operands at: 2)) bitAnd: 7) ~= RBP]) ifTrue: [3] ifFalse: [4]] ifFalse: [7]) + (((self concreteRegister: (operands at: 2)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. "[MoveRdM64r] -> [^((self isQuick: (operands at: 1)) ifTrue: [5] ifFalse: [8]) + ((self concreteRegister: (operands at: 2)) = ESP ifTrue: [1] ifFalse: [0])]." [MoveMbrR] -> [self assert: (self is32BitSignedImmediate: (operands at: 0)). ^((self isQuick: (operands at: 0)) ifTrue: [((operands at: 0) = 0 and: [((self concreteRegister: (operands at: 1)) bitAnd: 7) ~= RBP]) + ifTrue: [3] + ifFalse: [4]] + ifFalse: [7]) - ifTrue: [4] - ifFalse: [5]] - ifFalse: [8]) + (((self concreteRegister: (operands at: 1)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. [MoveRMbr] -> [self assert: (self is32BitSignedImmediate: (operands at: 1)). ^((self isQuick: (operands at: 1)) ifTrue: [((operands at: 1) = 0 and: [((self concreteRegister: (operands at: 0)) bitAnd: 7) ~= RBP]) ifTrue: [3] ifFalse: [4]] ifFalse: [7]) + (((self concreteRegister: (operands at: 2)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. [MoveM16rR] -> [^((self isQuick: (operands at: 0)) ifTrue: [((operands at: 0) = 0 and: [((self concreteRegister: (operands at: 1)) bitAnd: 7) ~= RBP]) ifTrue: [4] ifFalse: [5]] ifFalse: [8]) + (((self concreteRegister: (operands at: 1)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. "[MoveM64rRd] -> [^((self isQuick: (operands at: 0)) ifTrue: [5] ifFalse: [8]) + ((self concreteRegister: (operands at: 1)) = ESP ifTrue: [1] ifFalse: [0])]." [MoveMwrR] -> [self assert: (self is32BitSignedImmediate: (operands at: 0)). ^((self isQuick: (operands at: 0)) ifTrue: [((operands at: 0) = 0 and: [((self concreteRegister: (operands at: 1)) bitAnd: 7) ~= RBP]) ifTrue: [3] ifFalse: [4]] ifFalse: [7]) + (((self concreteRegister: (operands at: 1)) bitAnd: 7) = RSP ifTrue: [1] ifFalse: [0])]. [MoveXbrRR] -> [self assert: (self concreteRegister: (operands at: 0)) ~= RSP. ^((self concreteRegister: (operands at: 1)) bitAnd: 7) = RBP + ifTrue: [5] + ifFalse: [4]]. - ifTrue: [6] - ifFalse: [5]]. [MoveRXbrR] -> [self assert: (self concreteRegister: (operands at: 1)) ~= RSP. ^(((self concreteRegister: (operands at: 0)) < 8 and: [(self concreteRegister: (operands at: 1)) < 8 and: [(self concreteRegister: (operands at: 2)) < 8]]) ifTrue: [3] ifFalse: [4]) + (((self concreteRegister: (operands at: 2)) bitAnd: 7) = RBP ifTrue: [1] ifFalse: [0])]. [MoveXwrRR] -> [self assert: (self concreteRegister: (operands at: 0)) ~= RSP. ^((self concreteRegister: (operands at: 1)) = RBP or: [(self concreteRegister: (operands at: 1)) = R13]) ifTrue: [5] ifFalse: [4]]. [MoveRXwrR] -> [self assert: (self concreteRegister: (operands at: 1)) ~= RSP. ^((self concreteRegister: (operands at: 2)) = RBP or: [(self concreteRegister: (operands at: 2)) = R13]) ifTrue: [5] ifFalse: [4]]. [PopR] -> [^(self concreteRegister: (operands at: 0)) < 8 ifTrue: [1] ifFalse: [2]]. [PushR] -> [^(self concreteRegister: (operands at: 0)) < 8 ifTrue: [1] ifFalse: [2]]. [PushCq] -> [^(self isQuick: (operands at: 0)) ifTrue: [2] ifFalse: [5]]. [PushCw] -> [^(self inCurrentCompilation: (operands at: 0)) ifTrue: [9] ifFalse: [self pushCwByteSize]]. [PrefetchAw] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [7] ifFalse: [0]]. "Conversion" "[ConvertRRd] -> [^4]" }. ^0 "to keep C compiler quiet"! Item was changed: ----- Method: CogX64Compiler>>concretizeMoveAbR (in category 'generate machine code') ----- concretizeMoveAbR + "N.B. The Cogit makes no assumption about the upper bits being set to zero because we + deny byteReadsZeroExtend. The cogit will clear the register before hand if necessary." "Will get inlined into concretizeAt: switch." <inline: true> | addressOperand reg offset save0 save1 | addressOperand := operands at: 0. (self isAnInstruction: (cogit cCoerceSimple: addressOperand to: #'AbstractInstruction *')) ifTrue: [addressOperand := (cogit cCoerceSimple: addressOperand to: #'AbstractInstruction *') address]. (self isAddressRelativeToVarBase: addressOperand) ifTrue: [save0 := operands at: 0. save1 := operands at: 1. operands at: 0 put: addressOperand - cogit varBaseAddress; at: 1 put: RBX; at: 2 put: save1. self concretizeMoveMbrR. operands at: 0 put: save0; at: 1 put: save1; at: 2 put: 0. ^machineCodeSize]. reg := self concreteRegister: (operands at: 1). reg = RAX ifTrue: [offset := 0] ifFalse: [machineCode at: 0 put: (self rexR: 0 x: 0 b: reg); at: 1 put: 16r90 + (reg \\ 8). offset := 2]. machineCode at: 0 + offset put: 16r48; at: 1 + offset put: 16rA0; at: 2 + offset put: (addressOperand bitAnd: 16rFF); at: 3 + offset put: (addressOperand >> 8 bitAnd: 16rFF); at: 4 + offset put: (addressOperand >> 16 bitAnd: 16rFF); at: 5 + offset put: (addressOperand >> 24 bitAnd: 16rFF); at: 6 + offset put: (addressOperand >> 32 bitAnd: 16rFF); at: 7 + offset put: (addressOperand >> 40 bitAnd: 16rFF); at: 8 + offset put: (addressOperand >> 48 bitAnd: 16rFF); at: 9 + offset put: (addressOperand >> 56 bitAnd: 16rFF). reg = RAX ifTrue: [^machineCodeSize := 10]. machineCode at: 12 put: (machineCode at: 0); at: 13 put: (machineCode at: 1). ^machineCodeSize := 14! Item was changed: ----- Method: CogX64Compiler>>concretizeMoveMbrR (in category 'generate machine code') ----- concretizeMoveMbrR + "N.B. The Cogit makes no assumption about the upper bits being set to zero because we + deny byteReadsZeroExtend. The cogit will clear the register before hand if necessary." - "N.B. The Cogit compiler makes no assumption about the upper bits being set to zero. - It will clear the register before hand if necessary." "Will get inlined into concretizeAt: switch." <inline: true> | srcReg offset destReg | offset := operands at: 0. srcReg := self concreteRegister: (operands at: 1). destReg := self concreteRegister: (operands at: 2). machineCode at: 0 put: (self rexR: destReg x: 0 b: srcReg); + at: 1 put: 16r8A. - at: 1 put: 16r0f; - at: 2 put: 16rb6. (srcReg ~= RSP and: [srcReg ~= R12]) ifTrue: + [(offset = 0 and: [srcReg ~= RBP and: [srcReg ~= R13]]) ifTrue: - [(offset = 0 and: [destReg ~= RBP and: [destReg ~= R13]]) ifTrue: [machineCode + at: 2 put: (self mod: ModRegInd RM: srcReg RO: destReg). + ^machineCodeSize := 3]. + (self isQuick: offset) ifTrue: - at: 3 put: (self mod: ModRegInd RM: srcReg RO: destReg). - ^machineCodeSize := 4]. - (self isQuick: offset) ifTrue: [machineCode + at: 2 put: (self mod: ModRegRegDisp8 RM: srcReg RO: destReg); + at: 3 put: (offset bitAnd: 16rFF). + ^machineCodeSize := 4]. - at: 3 put: (self mod: ModRegRegDisp8 RM: srcReg RO: destReg); - at: 4 put: (offset bitAnd: 16rFF). - ^machineCodeSize := 5]. machineCode + at: 2 put: (self mod: ModRegRegDisp32 RM: srcReg RO: destReg); + at: 3 put: (offset bitAnd: 16rFF); + at: 4 put: (offset >> 8 bitAnd: 16rFF); + at: 5 put: (offset >> 16 bitAnd: 16rFF); + at: 6 put: (offset >> 24 bitAnd: 16rFF). + ^machineCodeSize := 7]. + "RSP:" + offset = 0 ifTrue: - at: 3 put: (self mod: ModRegRegDisp32 RM: srcReg RO: destReg); - at: 4 put: (offset bitAnd: 16rFF); - at: 5 put: (offset >> 8 bitAnd: 16rFF); - at: 6 put: (offset >> 16 bitAnd: 16rFF); - at: 7 put: (offset >> 24 bitAnd: 16rFF). - ^machineCodeSize := 8]. - "RSP & R12:" - (offset = 0 and: [destReg ~= RBP and: [destReg ~= R13]]) ifTrue: [machineCode + at: 2 put: (self mod: ModRegInd RM: srcReg RO: destReg); + at: 3 put: (self s: SIB1 i: 4 b: srcReg). + ^machineCodeSize := 4]. - at: 3 put: (self mod: ModRegInd RM: srcReg RO: destReg); - at: 4 put: (self s: SIB1 i: 4 b: srcReg). - ^machineCodeSize := 5]. (self isQuick: offset) ifTrue: [machineCode + at: 2 put: (self mod: ModRegRegDisp8 RM: srcReg RO: destReg); + at: 3 put: (self s: SIB1 i: 4 b: srcReg); + at: 4 put: (offset bitAnd: 16rFF). + ^machineCodeSize := 5]. - at: 3 put: (self mod: ModRegRegDisp8 RM: srcReg RO: destReg); - at: 4 put: (self s: SIB1 i: 4 b: srcReg); - at: 5 put: (offset bitAnd: 16rFF). - ^machineCodeSize := 6]. machineCode + at: 2 put: (self mod: ModRegRegDisp32 RM: srcReg RO: destReg); + at: 3 put: (self s: SIB1 i: 4 b: srcReg); + at: 4 put: (offset bitAnd: 16rFF); + at: 5 put: (offset >> 8 bitAnd: 16rFF); + at: 6 put: (offset >> 16 bitAnd: 16rFF); + at: 7 put: (offset >> 24 bitAnd: 16rFF). + ^machineCodeSize := 8! - at: 3 put: (self mod: ModRegRegDisp32 RM: srcReg RO: destReg); - at: 4 put: (self s: SIB1 i: 4 b: srcReg); - at: 5 put: (offset bitAnd: 16rFF); - at: 6 put: (offset >> 8 bitAnd: 16rFF); - at: 7 put: (offset >> 16 bitAnd: 16rFF); - at: 8 put: (offset >> 24 bitAnd: 16rFF). - ^machineCodeSize := 9! Item was changed: ----- Method: CogX64Compiler>>concretizeMoveXbrRR (in category 'generate machine code') ----- concretizeMoveXbrRR "Will get inlined into concretizeAt: switch." <inline: true> | index base dest | index := self concreteRegister: (operands at: 0). base := self concreteRegister: (operands at: 1). dest := self concreteRegister: (operands at: 2). machineCode at: 0 put: (self rexR: dest x: index b: base); + at: 1 put: 16r8A. - at: 1 put: 16r0F; - at: 2 put: 16rB6. (base ~= RBP and: [base ~= R13]) ifTrue: [machineCode + at: 2 put: (self mod: ModRegInd RM: 4 RO: dest); + at: 3 put: (self s: SIB1 i: index b: base). + ^machineCodeSize := 4]. - at: 3 put: (self mod: ModRegInd RM: 4 RO: dest); - at: 4 put: (self s: SIB1 i: index b: base). - ^machineCodeSize := 5]. machineCode + at: 2 put: (self mod: ModRegRegDisp8 RM: 4 RO: dest); + at: 3 put: (self s: SIB1 i: index b: base); + at: 4 put: 0. + ^machineCodeSize := 5! - at: 3 put: (self mod: ModRegRegDisp8 RM: 4 RO: dest); - at: 4 put: (self s: SIB1 i: index b: base); - at: 5 put: 0. - ^machineCodeSize := 6! Item was changed: ----- Method: CogX64CompilerTests>>testMoveMbrR (in category 'tests') ----- testMoveMbrR "self new testMoveMbrR" self concreteCompilerClass registersWithNamesDo: [:sreg :srname| + self concreteCompilerClass byteRegistersWithNamesDo: - self concreteCompilerClass registersWithNamesDo: [:dreg :drname| ((1 to: 19 by: 3) collect: [:po2| 2 raisedToInteger: po2]) do: [:offset| | inst len | inst := self gen: MoveMbrR operand: offset operand: sreg operand: dreg. + self deny: inst byteReadsZeroExtend. len := inst concretizeAt: 0. self processor disassembleInstructionAt: 0 In: inst machineCode object into: [:str :sz| | plainJane herIntended po | po := offset bitAnd: 1 << self processor bitsInWord - 1. plainJane := self strip: str. + herIntended := 'movb ', (offset = 0 ifTrue: [''] ifFalse: ['0x', (po printStringBase: 16 length: 16 padded: true)]), '(', srname, '), ', drname. - herIntended := 'movzbq ', (offset = 0 ifTrue: [''] ifFalse: ['0x', (po printStringBase: 16 length: 16 padded: true)]), '(', srname, '), ', drname. self assert: (plainJane match: herIntended). self assert: len = sz]]]]! Item was changed: ----- Method: CogX64CompilerTests>>testMoveXbrRR (in category 'tests') ----- testMoveXbrRR "self new testMoveXbrRR" self concreteCompilerClass registersWithNamesDo: [:idxreg :irname| irname ~= '%rsp' ifTrue: [self concreteCompilerClass registersWithNamesDo: [:basereg :brname| + self concreteCompilerClass byteRegistersWithNamesDo: - self concreteCompilerClass registersWithNamesDo: [:dreg :drname| ((1 to: 19 by: 3) collect: [:po2| 2 raisedToInteger: po2]) do: [:offset| | inst len | inst := self gen: MoveXbrRR operand: idxreg operand: basereg operand: dreg. + self deny: inst byteReadsZeroExtend. len := inst concretizeAt: 0. self processor disassembleInstructionAt: 0 In: inst machineCode object into: [:str :sz| | plainJane herIntended | "Convert e.g. '00000000: movzbq %ds:(%rax,%rax,1), %rax : 48 0F B6 04 00 ' to 'movzbq (%rax,%rax,1), %rax'" plainJane := self strip: str. + herIntended := 'movb (', brname, ',', irname, ',1), ',drname. - herIntended := 'movzbq (', brname, ',', irname, ',1), ',drname. self assert: (plainJane match: herIntended). self assert: len = sz]]]]]]! Item was changed: ----- Method: SimpleStackBasedCogit>>genFastPrimTraceUsing:and: (in category 'primitive generators') ----- genFastPrimTraceUsing: r1 and: r2 "Suport for compileInterpreterPrimitive. Generate inline code so as to record the primitive trace as fast as possible." + backEnd byteReadsZeroExtend ifFalse: + [self MoveCq: 0 R: r2]. self MoveAb: coInterpreter primTraceLogIndexAddress R: r2. self MoveR: r2 R: r1. self AddCq: 1 R: r1. self MoveR: r1 Ab: coInterpreter primTraceLogIndexAddress. methodLabel addDependent: (self annotateAbsolutePCRef: (self MoveCw: methodLabel asInteger R: r1)). self MoveMw: (self offset: CogMethod of: #selector) r: r1 R: TempReg. self MoveCw: coInterpreter primTraceLogAddress asInteger R: r1. self MoveR: TempReg Xwr: r2 R: r1!

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VM Maker: Cog-eem.292.mcz
by commits＠source.squeak.org 03 Nov '15

03 Nov '15

Eliot Miranda uploaded a new version of Cog to project VM Maker: http://source.squeak.org/VMMaker/Cog-eem.292.mcz ==================== Summary ==================== Name: Cog-eem.292 Author: eem Time: 3 November 2015, 1:34:42.692 pm UUID: 9ba69574-d95d-471c-a6c1-6ff3e63c5153 Ancestors: Cog-eem.291 Add failure mode handling for the IA32 and X64 processor aliens to support oveAbR and MoveRAb. Fix a slip with the IA32 Alien which used the wrong method to fix ALOb/ObAL failures and the wrong opcodes for moveALOb/ObAL. =============== Diff against Cog-eem.291 =============== Item was changed: ----- Method: BochsIA32Alien class>>initialize (in category 'class initialization') ----- initialize "BochsIA32Alien initialize" | it | it := self basicNew. PostBuildStackDelta := 0. OpcodeExceptionMap := Array new: 256 withAll: #handleExecutionPrimitiveFailureAt:in:. OpcodeExceptionMap at: 1 + it callOpcode put: #handleCallFailureAt:in:; at: 1 + it jmpOpcode put: #handleJmpFailureAt:in:; at: 1 + it retOpcode put: #handleRetFailureAt:in:; at: 1 + it movALObOpcode put: #handleMovALObFailureAt:in:; + at: 1 + it movAXOvOpcode put: #handleMovAXOvFailureAt:in:; at: 1 + it movObALOpcode put: #handleMovObALFailureAt:in:; + at: 1 + it movOvAXOpcode put: #handleMovOvAXFailureAt:in:; at: 1 + it movGvEvOpcode put: #handleMovGvEvFailureAt:in:; at: 1 + it movEvGvOpcode put: #handleMovEvGvFailureAt:in:; at: 1 + it movGbEbOpcode put: #handleMovGbEbFailureAt:in:; at: 1 + it movEbGbOpcode put: #handleMovEbGbFailureAt:in:. ExtendedOpcodeExceptionMap := Array new: 256 withAll: #handleExecutionPrimitiveFailureAt:in:. ExtendedOpcodeExceptionMap at: 1 + it movGvEbOpcode put: #handleMovGvEbFailureAt:in:! Item was changed: ----- Method: BochsIA32Alien>>handleMovALObFailureAt:in: (in category 'error handling') ----- handleMovALObFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" + "Convert an execution primitive failure for a read into al into a ProcessorSimulationTrap signal." - "Convert an execution primitive failure for a read into eax into a ProcessorSimulationTrap signal." ^(ProcessorSimulationTrap pc: pc nextpc: pc + 5 address: (memoryArray unsignedLongAt: pc + 2 bigEndian: false) type: #read + accessor: #al:) - accessor: #eax:) signal! Item was added: + ----- Method: BochsIA32Alien>>handleMovAXOvFailureAt:in: (in category 'error handling') ----- + handleMovAXOvFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" + "Convert an execution primitive failure for a read into eax into a ProcessorSimulationTrap signal." + ^(ProcessorSimulationTrap + pc: pc + nextpc: pc + 5 + address: (memoryArray unsignedLongAt: pc + 2 bigEndian: false) + type: #read + accessor: #eax:) + signal! Item was changed: ----- Method: BochsIA32Alien>>handleMovEbGbFailureAt:in: (in category 'error handling') ----- handleMovEbGbFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" "Convert an execution primitive failure for a byte register write into a ProcessorSimulationTrap signal." + | modrmByte address | + modrmByte := memoryArray byteAt: pc + 2. + (modrmByte bitAnd: 7) ~= 4 ifTrue: "MoveRMbr with r = ESP requires an SIB byte" + [address := (modrmByte bitAnd: 16rC0) + caseOf: { + [0 "ModRegInd"] + -> [memoryArray unsignedLongAt: pc + 3 bigEndian: false]. + [16r80 "ModRegRegDisp32"] + -> [(self perform: (#(eax ecx edx ebx esp ebp esi edi) at: (modrmByte bitAnd: 7) + 1)) + + (memoryArray unsignedLongAt: pc + 3 bigEndian: false) + bitAnd: 16rFFFFFFFF] } + otherwise: [^self reportPrimitiveFailure]. + ^(ProcessorSimulationTrap + pc: pc + nextpc: pc + 6 + address: address + type: #write + accessor: (#(al cl dl bl ah ch dh bh) at: ((modrmByte >> 3 bitAnd: 7) + 1))) + signal]. + ^self reportPrimitiveFailure! - | modrmByte | - ^(((modrmByte := memoryArray byteAt: pc + 2) bitAnd: 16rC0) = 16r80) "ModRegRegDisp32" - ifTrue: - [(ProcessorSimulationTrap - pc: pc - nextpc: pc + 6 - address: ((self perform: (#(eax ecx edx ebx esp ebp esi edi) at: (modrmByte bitAnd: 7) + 1)) - + (memoryArray unsignedLongAt: pc + 3 bigEndian: false) - bitAnd: 16rFFFFFFFF) - type: #write - accessor: (#(al cl dl bl ah ch dh bh) at: ((modrmByte >> 3 bitAnd: 7) + 1))) - signal] - ifFalse: - [self reportPrimitiveFailure]! Item was changed: ----- Method: BochsIA32Alien>>handleMovGbEbFailureAt:in: (in category 'error handling') ----- handleMovGbEbFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" "Convert an execution primitive failure for a byte register load into a ProcessorSimulationTrap signal." + | modrmByte address | + modrmByte := memoryArray byteAt: pc + 2. + address := (modrmByte bitAnd: 16rC0) + caseOf: { + [0 "ModRegInd"] + -> [memoryArray unsignedLongAt: pc + 3 bigEndian: false]. + [16r80 "ModRegRegDisp32"] + -> [(self perform: (#(eax ecx edx ebx esp ebp esi edi) at: (modrmByte bitAnd: 7) + 1)) + + (memoryArray unsignedLongAt: pc + 3 bigEndian: false) + bitAnd: 16rFFFFFFFF] } + otherwise: [^self reportPrimitiveFailure]. + ^(ProcessorSimulationTrap + pc: pc + nextpc: pc + 6 + address: address + type: #read + accessor: (#(al: cl: dl: bl: ah: ch: dh: bh:) at: ((modrmByte >> 3 bitAnd: 7) + 1))) + signal! - | modrmByte | - ^(((modrmByte := memoryArray byteAt: pc + 2) bitAnd: 16rC0) = 16r80) "ModRegRegDisp32" - ifTrue: - [(ProcessorSimulationTrap - pc: pc - nextpc: pc + 6 - address: ((self perform: (#(eax ecx edx ebx esp ebp esi edi) at: (modrmByte bitAnd: 7) + 1)) - + (memoryArray unsignedLongAt: pc + 3 bigEndian: false) - bitAnd: 16rFFFFFFFF) - type: #read - accessor: (#(al: cl: dl: bl: ah: ch: dh: bh:) at: ((modrmByte >> 3 bitAnd: 7) + 1))) - signal] - ifFalse: - [self reportPrimitiveFailure]! Item was changed: ----- Method: BochsIA32Alien>>handleMovGvEbFailureAt:in: (in category 'error handling') ----- handleMovGvEbFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" "Convert an execution primitive failure for a register load into a ProcessorSimulationTrap signal." | modrmByte mode srcIsSP srcVal dst offset | modrmByte := memoryArray byteAt: pc + 3. mode := modrmByte >> 6 bitAnd: 3. + dst := #(eax: ecx: edx: ebx: esp: ebp: esi: edi:) at: ((modrmByte >> 3 bitAnd: 7) + 1). + mode = 0 ifTrue: "ModRegInd" + [offset := memoryArray unsignedLongAt: pc + 4. "1-relative" + ^(ProcessorSimulationTrap + pc: pc + nextpc: pc + 7 + address: offset + type: #read + accessor: dst) + signal]. srcIsSP := (modrmByte bitAnd: 7) = 4. srcVal := self perform: (#(eax ecx edx ebx esp ebp esi edi) at: (modrmByte bitAnd: 7) + 1). - dst := #(eax: ecx: edx: ebx: esp: ebp: esi: edi:) at: ((modrmByte >> 3 bitAnd: 7) + 1). mode = 1 ifTrue: "ModRegRegDisp8" [offset := memoryArray byteAt: pc + (srcIsSP ifTrue: [5] ifFalse: [4]). "1-relative" offset > 127 ifTrue: [offset := offset - 256]. ^(ProcessorSimulationTrap pc: pc nextpc: pc + (srcIsSP ifTrue: [5] ifFalse: [4]) + address: (srcVal + offset bitAnd: 16rFFFFFFFF) - address: ((srcVal + offset) bitAnd: 16rFFFFFFFF) type: #read accessor: dst) signal]. mode = 2 ifTrue: "ModRegRegDisp32" [offset := memoryArray unsignedLongAt: pc + (srcIsSP ifTrue: [5] ifFalse: [4]). "1-relative" ^(ProcessorSimulationTrap pc: pc nextpc: pc + (srcIsSP ifTrue: [8] ifFalse: [7]) + address: (srcVal + offset bitAnd: 16rFFFFFFFF) - address: ((srcVal + offset) bitAnd: 16rFFFFFFFF) type: #read accessor: dst) signal]. ^self reportPrimitiveFailure! Item was changed: ----- Method: BochsIA32Alien>>handleMovObALFailureAt:in: (in category 'error handling') ----- handleMovObALFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" + "Convert an execution primitive failure for a byte write of al into a ProcessorSimulationTrap signal." - "Convert an execution primitive failure for a write of eax into a ProcessorSimulationTrap signal." ^(ProcessorSimulationTrap pc: pc nextpc: pc + 5 address: (memoryArray unsignedLongAt: pc + 2 bigEndian: false) type: #write + accessor: #al) - accessor: #eax) signal! Item was added: + ----- Method: BochsIA32Alien>>handleMovOvAXFailureAt:in: (in category 'error handling') ----- + handleMovOvAXFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" + "Convert an execution primitive failure for a write of eax into a ProcessorSimulationTrap signal." + ^(ProcessorSimulationTrap + pc: pc + nextpc: pc + 5 + address: (memoryArray unsignedLongAt: pc + 2 bigEndian: false) + type: #write + accessor: #eax) + signal! Item was changed: ----- Method: BochsIA32Alien>>movALObOpcode (in category 'opcodes') ----- movALObOpcode "[1] IA-32 Intel® Architecture Software Developer's Manual Volume 2B: Instruction Set Reference, N-Z. table A2, pA7" + ^16rA0! - ^16rA1! Item was added: + ----- Method: BochsIA32Alien>>movAXOvOpcode (in category 'opcodes') ----- + movAXOvOpcode + "[1] IA-32 Intel® Architecture Software Developer's Manual Volume 2B: Instruction Set Reference, N-Z. + table A2, pA7" + ^16rA1! Item was changed: ----- Method: BochsIA32Alien>>movObALOpcode (in category 'opcodes') ----- movObALOpcode "[1] IA-32 Intel® Architecture Software Developer's Manual Volume 2B: Instruction Set Reference, N-Z. table A2, pA7" + ^16rA2! - ^16rA3! Item was added: + ----- Method: BochsIA32Alien>>movOvAXOpcode (in category 'opcodes') ----- + movOvAXOpcode + "[1] IA-32 Intel® Architecture Software Developer's Manual Volume 2B: Instruction Set Reference, N-Z. + table A2, pA7" + ^16rA3!

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Vm-dev November 2015