Revision: 3103 Author: eliot Date: 2014-10-13 14:24:18 -0700 (Mon, 13 Oct 2014) Log Message: ----------- Add ARMV7 defines for various support files.
Modified Paths: -------------- branches/Cog/platforms/Cross/vm/sqAtomicOps.h branches/Cog/platforms/Cross/vm/sqMemoryFence.h branches/Cog/platforms/unix/vm/sqUnixHeartbeat.c branches/Cog/platforms/unix/vm/sqUnixITimerHeartbeat.c branches/Cog/platforms/unix/vm/sqUnixITimerTickerHeartbeat.c
Property Changed: ---------------- branches/Cog/platforms/Cross/vm/sqSCCSVersion.h
Modified: branches/Cog/platforms/Cross/vm/sqAtomicOps.h =================================================================== --- branches/Cog/platforms/Cross/vm/sqAtomicOps.h 2014-10-13 20:51:55 UTC (rev 3102) +++ branches/Cog/platforms/Cross/vm/sqAtomicOps.h 2014-10-13 21:24:18 UTC (rev 3103) @@ -137,7 +137,7 @@ # endif /* __SSE2__ */ # else /* TARGET_OS_IS_IPHONE elif x86 variants etc */
-#if defined(__arm__) && defined(__ARM_ARCH_6__) +#if defined(__arm__) && (defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_7A__)) /* tpr - this is code intended for the Raspberry Pi Raspbian OS * We'll experimentally trust in our MMU to keep 64bit accesses atomic */ #define get64(var) \ @@ -177,7 +177,7 @@ #endif #elif defined TARGET_OS_IS_IPHONE #define sqAtomicAddConst(var,n) OSAtomicAdd32(n,&var) -#elif defined(__arm__) && defined(__ARM_ARCH_6__) +#elif defined(__arm__) && (defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_7A__)) /* tpr - this is code intended for the Raspberry Pi Raspbian OS */ /* We'll experimentally use the gcc inbuilt functions detailed in * http://gcc.gnu.org/onlinedocs/gcc-4.1.2/gcc/Atomic-Builtins.html @@ -230,7 +230,7 @@ # define sqCompareAndSwap(var,old,new) OSAtomicCompareAndSwap32(old, new, &var) # define sqCompareAndSwapRes(var,old,new,res) res = var; OSAtomicCompareAndSwap32(old, new, &var)
-#elif defined(__arm__) && defined(__ARM_ARCH_6__) +#elif defined(__arm__) && (defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_7A__)) /* tpr - this is code intended for the Raspberry Pi Raspbian OS */ /* We'll experimentally use the gcc inbuilt functions detailed in * http://gcc.gnu.org/onlinedocs/gcc-4.1.2/gcc/Atomic-Builtins.html */
Modified: branches/Cog/platforms/Cross/vm/sqMemoryFence.h =================================================================== --- branches/Cog/platforms/Cross/vm/sqMemoryFence.h 2014-10-13 20:51:55 UTC (rev 3102) +++ branches/Cog/platforms/Cross/vm/sqMemoryFence.h 2014-10-13 21:24:18 UTC (rev 3103) @@ -47,7 +47,7 @@ # define sqLowLevelMFence() asm volatile ("mfence") # endif #else -# if defined(TARGET_OS_IS_IPHONE) || (defined(__arm__) && defined(__ARM_ARCH_6__)) +# if defined(TARGET_OS_IS_IPHONE) || (defined(__arm__) && (defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_7A__))) # define sqLowLevelMFence() __sync_synchronize() # elif !defined(sqLowLevelMFence) extern void sqLowLevelMFence(void);
Property changes on: branches/Cog/platforms/Cross/vm/sqSCCSVersion.h ___________________________________________________________________ Modified: checkindate - Mon Oct 13 13:50:53 PDT 2014 + Mon Oct 13 14:24:26 PDT 2014
Modified: branches/Cog/platforms/unix/vm/sqUnixHeartbeat.c =================================================================== --- branches/Cog/platforms/unix/vm/sqUnixHeartbeat.c 2014-10-13 20:51:55 UTC (rev 3102) +++ branches/Cog/platforms/unix/vm/sqUnixHeartbeat.c 2014-10-13 21:24:18 UTC (rev 3103) @@ -164,7 +164,7 @@ || defined(i486) || defined(__i486) || defined (__i486__) \ || defined(intel) || defined(x86) || defined(i86pc) ) __asm__ __volatile__ ("rdtsc" : "=A"(value)); -#elif defined(__arm__) && defined(__ARM_ARCH_6__) +#elif defined(__arm__) && (defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_7A__)) /* tpr - do nothing for now; needs input from eliot to decide further */ #else # error "no high res clock defined"
Modified: branches/Cog/platforms/unix/vm/sqUnixITimerHeartbeat.c =================================================================== --- branches/Cog/platforms/unix/vm/sqUnixITimerHeartbeat.c 2014-10-13 20:51:55 UTC (rev 3102) +++ branches/Cog/platforms/unix/vm/sqUnixITimerHeartbeat.c 2014-10-13 21:24:18 UTC (rev 3103) @@ -164,7 +164,7 @@ || defined(i486) || defined(__i486) || defined (__i486__) \ || defined(intel) || defined(x86) || defined(i86pc) ) __asm__ __volatile__ ("rdtsc" : "=A"(value)); -#elif defined(__arm__) && defined(__ARM_ARCH_6__) +#elif defined(__arm__) && (defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_7A__)) /* tpr - do nothing for now; needs input from eliot to decide further */ #else # error "no high res clock defined"
Modified: branches/Cog/platforms/unix/vm/sqUnixITimerTickerHeartbeat.c =================================================================== --- branches/Cog/platforms/unix/vm/sqUnixITimerTickerHeartbeat.c 2014-10-13 20:51:55 UTC (rev 3102) +++ branches/Cog/platforms/unix/vm/sqUnixITimerTickerHeartbeat.c 2014-10-13 21:24:18 UTC (rev 3103) @@ -157,7 +157,7 @@ || defined(i486) || defined(__i486) || defined (__i486__) \ || defined(intel) || defined(x86) || defined(i86pc) ) __asm__ __volatile__ ("rdtsc" : "=A"(value)); -#elif defined(__arm__) && defined(__ARM_ARCH_6__) +#elif defined(__arm__) && (defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_7A__)) /* tpr - do nothing for now; needs input from eliot to decide further */ #else # error "no high res clock defined"
On Mon, Oct 13, 2014 at 02:24:20PM -0700, commits@squeakvm.org wrote:
Good Evening,
-#if defined(__arm__) && defined(__ARM_ARCH_6__) +#if defined(__arm__) && (defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_7A__))
What about other 7A ISA? What about ARMv8? Maybe you want to compare __ARM_ARCH against a number?
cheers holger
On 16-10-2014, at 1:08 PM, Holger Hans Peter Freyther holger@freyther.de wrote:
On Mon, Oct 13, 2014 at 02:24:20PM -0700, commits@squeakvm.org wrote:
Good Evening,
-#if defined(__arm__) && defined(__ARM_ARCH_6__) +#if defined(__arm__) && (defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_7A__))
What about other 7A ISA? What about ARMv8?
One thing at a time. When we have some example v7notA machine to play with we’ll extend the code. And a v8 might be while coming; the only v8 machines easily available are Apple phones and tablets (unless you know differently?) and they aren’t going to be allowed Squeak any time soon.
tim -- tim Rowledge; tim@rowledge.org; http://www.rowledge.org/tim For every action, there is an equal and opposite criticism.
On Oct 16, 2014, at 14:02 , tim Rowledge wrote:
On 16-10-2014, at 1:08 PM, Holger Hans Peter Freyther holger@freyther.de wrote:
On Mon, Oct 13, 2014 at 02:24:20PM -0700, commits@squeakvm.org wrote:
Good Evening,
-#if defined(__arm__) && defined(__ARM_ARCH_6__) +#if defined(__arm__) && (defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_7A__))
What about other 7A ISA? What about ARMv8?
One thing at a time. When we have some example v7notA machine to play with we’ll extend the code. And a v8 might be while coming; the only v8 machines easily available are Apple phones and tablets (unless you know differently?) and they aren’t going to be allowed Squeak any time soon.
+1
I have only Raspberry Pi (ARMv6 ARM11), BeagleBone Black (ARMv7A ARM Cortex-A8) and Parallella (ARMv7 ARM Cortex-A9) boards to develop and test on. I think the ARMv8 development boards are still prohibitively expensive.
tim
tim Rowledge; tim@rowledge.org; http://www.rowledge.org/tim For every action, there is an equal and opposite criticism.
----- Original Message ----- On Oct 16, 2014, at 14:02 , tim Rowledge wrote:
-#if defined(__arm__) && defined(__ARM_ARCH_6__) +#if defined(__arm__) && (defined(__ARM_ARCH_6__) ||
defined(__ARM_ARCH_7A__))
What about other 7A ISA? What about ARMv8?
One thing at a time. When we have some example v7notA machine to
play with we’ll extend the code. And a v8 might be while coming; the only v8 machines easily available are Apple phones and tablets (unless you know differently?) and they aren’t going to be allowed Squeak any time soon.
My SAMSUNG ARM Chromebook has Cortex A15 w dual ARM 7A (NEON) cores. Let me know what/when to test. Thkx. $0.02,-KenD
On Oct 16, 2014, at 15:14 , ken.dickey@whidbey.com wrote:
----- Original Message ----- On Oct 16, 2014, at 14:02 , tim Rowledge wrote:
-#if defined(__arm__) && defined(__ARM_ARCH_6__) +#if defined(__arm__) && (defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_7A__))
What about other 7A ISA? What about ARMv8?
One thing at a time. When we have some example v7notA machine to play with we’ll extend the code. And a v8 might be while coming; the only v8 machines easily available are Apple phones and tablets (unless you know differently?) and they aren’t going to be allowed Squeak any time soon.
My SAMSUNG ARM Chromebook has Cortex A15 w dual ARM 7A (NEON) cores.
Let me know what/when to test. Thkx.
Indeed :) Eliot, Tim, and I will be posting pre-built StackVM binaries for v6 and v7 platforms very soon, on Eliot's site. In theory the v7 one will be quite close to the hacked version I sent you a while back. One change is that it now uses the threaded heartbeat instead of the interval timer heartbeat. In order to allow that to work you have to follow Eliot's instructions for allowing the VM to use multiple thread priorities:
http://www.mirandabanda.org/files/Cog/VM/VM.r3104/README.3104
Use of the threaded heartbeat version is critical if you are trying to do any linux system calls, as I found out when trying to program the epiphany parallel core co-processor of the Parallella board.
Doug
$0.02, -KenD
tim Rowledge <tim <at> rowledge.org> writes:
at about other 7A ISA? What about ARMv8?
Good Morning,
One thing at a time. When we have some example v7notA machine to play with
we’ll extend the code. And a v8
might be while coming; the only v8 machines easily available are Apple
phones and tablets (unless you know
differently?) and they aren’t going to be allowed Squeak any time soon.
to be the elephant in the room, I find this statement quite odd. In general the ARM ISA is backward compatible (specially for userspace applications where things like swp are emulated by the kernel), the second thing is instead of testing for the ISA... maybe you should test for the feature you want to use?
E.g. compare this with ACLE[1] of ARM Ltd. Test for features and not ISA, use intrinsic. Your code will require less maintenance and will compile/work on future ISAs.
cheers holger
[1] http://infocenter.arm.com/help/topic/com.arm.doc.ihi0053b/IHI0053B_arm_c_lan gu age_extensions_2013.pdf
vm-dev@lists.squeakfoundation.org
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Douglas McPherson -
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tim Rowledge