Vm-dev February 2018

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[OpenSmalltalk/opensmalltalk-vm] 6f5c39: fix order
by GitHub 20 Feb '18

20 Feb '18

Branch: refs/heads/Cog Home: https://github.com/OpenSmalltalk/opensmalltalk-vm Commit: 6f5c392c1638aa488320515c58e4c40c5d3d9aac https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/6f5c392c1638aa4883… Author: Tobias Pape <tobias(a)netshed.de> Date: 2018-02-20 (Tue, 20 Feb 2018) Changed paths: M platforms/unix/plugins/SqueakSSL/openssl_overlay.h Log Message: ----------- fix order

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[OpenSmalltalk/opensmalltalk-vm] 21375-Add-FileAttributesPlugin-to-stack-and-lowcode-VMs (#218)
by akgrant43 20 Feb '18

20 Feb '18

Add FileAttributesPlugin to any remaining VM that already includes FilePlugin. You can view, comment on, or merge this pull request online at: https://github.com/OpenSmalltalk/opensmalltalk-vm/pull/218 -- Commit Summary -- * 21375-Add-FileAttributesPlugin-to-stack-and-lowcode-VMs -- File Changes -- M build.linux32x86/pharo.cog.spur.lowcode/plugins.ext (1) M build.linux32x86/pharo.stack.spur.lowcode/plugins.ext (1) M build.macos32x86/pharo.cog.spur.lowcode/plugins.ext (1) M build.macos32x86/pharo.stack.spur.lowcode/plugins.ext (1) M build.macos32x86/pharo.stack.spur/plugins.ext (1) M build.macos64x64/pharo.cog.spur.lowcode/plugins.ext (1) M build.macos64x64/pharo.stack.spur.lowcode/plugins.ext (1) M build.macos64x64/pharo.stack.spur/plugins.ext (1) M build.win32x86/pharo.cog.spur.lowcode/plugins.ext (3) M build.win64x64/pharo.stack.spur/plugins.ext (3) -- Patch Links -- https://github.com/OpenSmalltalk/opensmalltalk-vm/pull/218.patch https://github.com/OpenSmalltalk/opensmalltalk-vm/pull/218.diff -- You are receiving this because you are subscribed to this thread. Reply to this email directly or view it on GitHub: https://github.com/OpenSmalltalk/opensmalltalk-vm/pull/218

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[OpenSmalltalk/opensmalltalk-vm] 84c708: Allow for openssl 1.1.0
by GitHub 20 Feb '18

20 Feb '18

Branch: refs/heads/Cog Home: https://github.com/OpenSmalltalk/opensmalltalk-vm Commit: 84c708ac4b9e025bd4c61fbb0d296a0b7e4e7f71 https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/84c708ac4b9e025bd4… Author: Tobias Pape <tobias(a)netshed.de> Date: 2018-02-20 (Tue, 20 Feb 2018) Changed paths: M platforms/unix/plugins/SqueakSSL/openssl_overlay.h M platforms/unix/plugins/SqueakSSL/sqUnixOpenSSL.c Log Message: ----------- Allow for openssl 1.1.0

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[OpenSmalltalk/opensmalltalk-vm] 87baa5: 21375-Add-FileAttributesPlugin-to-stack-and-lowcod...
by GitHub 20 Feb '18

20 Feb '18

Branch: refs/heads/Cog Home: https://github.com/OpenSmalltalk/opensmalltalk-vm Commit: 87baa518410762e3163546892effb22089510c8f https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/87baa518410762e316… Author: AlistairGrant <akgrant0710(a)gmail.com> Date: 2018-02-20 (Tue, 20 Feb 2018) Changed paths: M build.linux32x86/pharo.cog.spur.lowcode/plugins.ext M build.linux32x86/pharo.stack.spur.lowcode/plugins.ext M build.macos32x86/pharo.cog.spur.lowcode/plugins.ext M build.macos32x86/pharo.stack.spur.lowcode/plugins.ext M build.macos32x86/pharo.stack.spur/plugins.ext M build.macos64x64/pharo.cog.spur.lowcode/plugins.ext M build.macos64x64/pharo.stack.spur.lowcode/plugins.ext M build.macos64x64/pharo.stack.spur/plugins.ext M build.win32x86/pharo.cog.spur.lowcode/plugins.ext M build.win64x64/pharo.stack.spur/plugins.ext Log Message: ----------- 21375-Add-FileAttributesPlugin-to-stack-and-lowcode-VMs Add FileAttributesPlugin to any remaining VM that already includes FilePlugin. Commit: c97f54a02ed6bf2330bb8398ad68c48b89b454e7 https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/c97f54a02ed6bf2330… Author: Fabio Niephaus <code(a)fniephaus.com> Date: 2018-02-20 (Tue, 20 Feb 2018) Changed paths: M build.linux32x86/pharo.cog.spur.lowcode/plugins.ext M build.linux32x86/pharo.stack.spur.lowcode/plugins.ext M build.macos32x86/pharo.cog.spur.lowcode/plugins.ext M build.macos32x86/pharo.stack.spur.lowcode/plugins.ext M build.macos32x86/pharo.stack.spur/plugins.ext M build.macos64x64/pharo.cog.spur.lowcode/plugins.ext M build.macos64x64/pharo.stack.spur.lowcode/plugins.ext M build.macos64x64/pharo.stack.spur/plugins.ext M build.win32x86/pharo.cog.spur.lowcode/plugins.ext M build.win64x64/pharo.stack.spur/plugins.ext Log Message: ----------- Merge pull request #218 from akgrant43/21375-Add-FileAttributesPlugin-to-stack-and-lowcode-VMs 21375-Add-FileAttributesPlugin-to-stack-and-lowcode-VMs Compare: https://github.com/OpenSmalltalk/opensmalltalk-vm/compare/fda969cfc99c...c9…

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VM Maker: VMMaker.oscog-eem.2335.mcz
by commits＠source.squeak.org 20 Feb '18

20 Feb '18

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.2335.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.2335 Author: eem Time: 19 February 2018, 6:24:41.264084 pm UUID: 9525a938-a6aa-43d4-8bdc-e844e8e7e360 Ancestors: VMMaker.oscog-eem.2334 RegisterAllocatingCogit: Improve (dare I say, fix??) the register permutation engine in the control flow merge logic. Fix reconciling entries that oproduce an SSRegister entry (the liveRegister must be set to NoReg). Fux recinciling a constanty with itself (this happens at the end of ifTrue:ifFalse: given that the bytecode compiler preserves the value of ifTrue:ifFalse: until a single trailing pop). N.B. the merge engine could save effort by peeking ahead for a pop, but Scorch likely won't produyce such bad code so we shouldn't waste effort making the RegisterAllocatingCogit generate better code for non-Scorch input. Simplify the incomprehensible garbage I wrote for assigning registers on temp var assignment. Correct isFrameTempVar now that simSelf is niw a normal simStackEntry beneath the temps. Add isFrameVar to be inclusive of self and temps. Fix a slip in CogMIPSELCompiler class>>initializeAbstractRegisters. Simulator: Correct the size of the border around the display in the simulator windows, VMMaker: Add configurations for the mutli-threaded Spur VM. It would be great to make progress on this yjis year. =============== Diff against VMMaker.oscog-eem.2334 =============== Item was changed: ----- Method: CogMIPSELCompiler class>>initializeAbstractRegisters (in category 'class initialization') ----- initializeAbstractRegisters "Assign the abstract registers with the identities/indices of the relevant concrete registers." "See MIPSConstants>>initializeRegisters for a description of the C ABI." "Note we can fit all of the abstract registers in C preserved registers, and not need to save or restore them at runtime calls." super initializeAbstractRegisters. self flag: #OABI. CallerSavedRegisterMask := self registerMaskFor: T0 and: T1 and: T2 and: T3 and: T4 and: T5 and: T6 and: T7 and: T8 and: T9. ReceiverResultReg := S0. Arg0Reg := S1. Arg1Reg := S2. ClassReg := S3. SendNumArgsReg := S4. TempReg := S5. VarBaseReg := S6. "Must be callee saved" SPReg := SP. FPReg := FP. RISCTempReg := AT. LinkReg := RA. + NumRegisters := 32. - NumRegisters := 32 self flag: #todo. "Extra0Reg := ??. Extra1Reg := ??. Extra2Reg := ??. Extra3Reg := ??. Extra4Reg := ??. Extra5Reg := ??. Extra6Reg := ??. Extra7Reg := ??." self flag: #todo. "DPFPReg0 := ??. DPFPReg1 := ??. DPFPReg2 := ??. DPFPReg3 := ??. DPFPReg4 := ??. DPFPReg5 := ??. DPFPReg6 := ??. DPFPReg7 := ??. DPFPReg8 := ??. DPFPReg9 := ??. DPFPReg10 := ??. DPFPReg11 := ??. DPFPReg12 := ??. DPFPReg13 := ??. DPFPReg14 := ??. DPFPReg15 := ??"! Item was added: + ----- Method: CogRegisterAllocatingSimStackEntry>>popToRegNoAssign: (in category 'compile abstract instructions') ----- + popToRegNoAssign: reg + liveRegister ~= NoReg + ifTrue: + [self deny: (type = SSRegister and: [register ~= liveRegister and: [cogit needsFrame]]). + spilled ifTrue: "This is rare, and in some cases it isn't even needed (e.g. frameful return) but we can't tell as yet." + [cogit AddCq: objectRepresentation wordSize R: SPReg]. + reg ~= liveRegister + ifTrue: [cogit MoveR: liveRegister R: reg] + ifFalse: [cogit Label]] + ifFalse: + [spilled + ifTrue: + [cogit PopR: reg] + ifFalse: + [type caseOf: { + [SSBaseOffset] -> [cogit MoveMw: offset r: register R: reg]. + [SSSpill] -> [cogit MoveMw: offset r: register R: reg]. + [SSConstant] -> [cogit genMoveConstant: constant R: reg]. + [SSRegister] -> [reg ~= register + ifTrue: [cogit MoveR: register R: reg] + ifFalse: [cogit Label]] }]]! Item was changed: ----- Method: CogRegisterAllocatingSimStackEntry>>reconcileWith:spillOffset:onSpillOrUnspill: (in category 'compile abstract instructions') ----- reconcileWith: targetEntry spillOffset: spillOffset onSpillOrUnspill: spillOrUnspillBlock "Make the state of a targetEntry, a stack entry following a non-inlined special selector send, the same as the corresponding entry (the receiver) along the inlined path. spillOffset is zero for non-spill locations (self & temps), and the offset of the spill for volatile stack entries. spillOrUnspillBlock is a block evaluated with the target's registerOrNone if the receiver and target have different spilledness. Answer if the reconciliation merged a register; merged registers must be deassigned." <var: #targetEntry type: #'SimStackEntry *'> <inline: true> | targetReg mergedRegister | spilled = targetEntry spilled ifTrue: [self assert: ((self isSameEntryAs: targetEntry) or: [(targetEntry spilled not and: [targetEntry registerOrNone ~= NoReg]) or: [spilled and: [type = SSConstant and: [offset = targetEntry offset]]]]). (targetReg := targetEntry registerOrNone) = NoReg ifTrue: [liveRegister := NoReg. ^false]. mergedRegister := false. type caseOf: { [SSBaseOffset] -> [liveRegister ~= targetReg ifTrue: + [liveRegister = NoReg + ifTrue: [cogit MoveMw: offset r: register R: targetReg] + ifFalse: [cogit MoveR: liveRegister R: targetReg]. - [cogit MoveMw: offset r: register R: targetReg. mergedRegister := true]. targetEntry type caseOf: { [SSBaseOffset] -> [liveRegister := targetReg. (self isSameEntryAs: targetEntry) ifFalse: [type := SSSpill. offset := spillOffset]]. [SSSpill] -> [liveRegister := targetReg. type := SSSpill. offset := spillOffset]. [SSConstant] -> [liveRegister := targetReg. type := SSSpill. offset := spillOffset]. + [SSRegister] -> [register := targetReg. type := SSRegister. liveRegister := NoReg] }]. + [SSSpill] -> [liveRegister = NoReg + ifTrue: [cogit MoveMw: offset r: register R: targetReg] + ifFalse: [cogit MoveR: liveRegister R: targetReg]. - [SSRegister] -> [register := targetReg. type := SSRegister] }]. - [SSSpill] -> [cogit MoveMw: offset r: register R: targetReg. liveRegister := targetReg. mergedRegister := true]. + [SSConstant] -> [(targetEntry type = SSConstant + and: [targetEntry constant = constant + and: [liveRegister = targetReg]]) ifFalse: + [liveRegister = NoReg + ifTrue: [cogit genMoveConstant: constant R: targetReg] + ifFalse: [cogit MoveR: liveRegister R: targetReg]. + type := SSRegister. register := targetReg. liveRegister := NoReg. + mergedRegister := true]]. - [SSConstant] -> [liveRegister = NoReg - ifTrue: [cogit genMoveConstant: constant R: targetReg] - ifFalse: [cogit MoveR: liveRegister R: targetReg]. - type := SSRegister. register := targetReg. liveRegister := NoReg. - mergedRegister := true]. [SSRegister] -> [targetReg ~= register ifTrue: [cogit MoveR: register R: targetReg. + register := targetReg. liveRegister := NoReg. - register := targetReg. mergedRegister := true]] }. ^mergedRegister]. targetReg := targetEntry registerOrNone. spillOrUnspillBlock value: targetReg. (type = SSConstant and: [targetEntry type ~= SSConstant or: [targetEntry constant ~= constant]]) ifTrue: [type := SSSpill. offset := spillOffset. register := FPReg]. (spilled not and: [type = SSSpill]) ifTrue: [self assert: targetReg ~= NoReg. type := SSRegister. register := targetReg]. liveRegister ~= targetReg ifTrue: [liveRegister := NoReg. ^true]. ^false! Item was added: + ----- Method: CogRegisterAllocatingSimStackEntry>>storeToRegNoAssign: (in category 'compile abstract instructions') ----- + storeToRegNoAssign: reg + liveRegister ~= NoReg + ifTrue: + [self deny: (type = SSRegister and: [register ~= liveRegister]). + reg ~= liveRegister + ifTrue: [cogit MoveR: liveRegister R: reg] + ifFalse: [cogit Label]] + ifFalse: + [type caseOf: { + [SSBaseOffset] -> [cogit MoveMw: offset r: register R: reg]. + [SSSpill] -> [cogit MoveMw: offset r: register R: reg]. + [SSConstant] -> [cogit genMoveConstant: constant R: reg]. + [SSRegister] -> [reg ~= register + ifTrue: [cogit MoveR: register R: reg] + ifFalse: [cogit Label]] }]! Item was changed: VMStructType subclass: #CogSimStackEntry instanceVariableNames: 'cogit objectRepresentation type spilled liveRegister register offset constant bcptr' classVariableNames: '' + poolDictionaries: 'CogAbstractRegisters CogCompilationConstants CogRTLOpcodes VMStackFrameOffsets' - poolDictionaries: 'CogAbstractRegisters CogCompilationConstants CogRTLOpcodes' category: 'VMMaker-JIT'! !CogSimStackEntry commentStamp: 'eem 1/22/2018 17:13' prior: 0! A CogSimStackEntry represents an object pushed on the stack, but during the partial evaluation that occurs as part of the StackToRegisterMappingCogit's compilation. Bytecodes that produce operands (push items onto the stack) push suitably descriptive instances of CogSimStackEntry onto the simStack (simulation stack). Bytecodes that consume operands (sends, assignments, returns, etc) take items off the simStack. Hence the generated code avoids pushing items onto the real stack, and the StackToRegisterMappngCogit can put the operands found on the simStack in registers, etc. Hence actual stack traffic is much reduced, a much more efficient calling convention is enabled, and so overall performance is increased. This scheme is due to L. Peter Deutsch and extended here. Instance Variables bcptr: <Integer> cogit: <StackToRegisterMappingCogit> constant: <Oop> liveRegister: <Integer> objectRepresentation: <CogObjectRepresentation> offset: <Integer> register: <Integer> spilled: <Boolean> type: <Integer from SSBaseOffset, SSConstant, SSRegister or SSSpill> bcptr - the bytecode PC at which this particular entry was created (pushed onto the stack). cogit - the StackToRegisterMappingCogit using this instance constant - if type = SSConstant then this is the constant's oop liveRegister - unused other than for simSelf. This is here for simSelf and for the subclass CogRegisterAllocatingSimStackEntry objectRepresentation - the CogObjectRepresentation in use for the current object model offset - if type = SSBaseOffset or type = SSSpill then this is the offset from register register - type = SSBaseOffset or type = SSSpill or type = SSRegister then this is the register's code (NoReg, TempReg, ReceiverResultReg et al) spilled - if true, then this entry has been spilled onto the actual stack (or rather code has been generated to push the entry onto the real stack) type - SSBaseOffset, SSConstant, SSRegister or SSSpill! Item was added: + ----- Method: CogSimStackEntry>>isFrameSimSelf (in category 'comparing') ----- + isFrameSimSelf + "Answer if the receiver is self. This only works in a frameful method, hence the weird name." + <inline: true> + ^type = SSBaseOffset and: [register = FPReg and: [offset = FoxMFReceiver]]! Item was changed: ----- Method: CogSimStackEntry>>isFrameTempVar (in category 'comparing') ----- isFrameTempVar "Answer if the receiver is a temporary variable. This only works in a frameful method, hence the weird name." <inline: true> + ^type = SSBaseOffset and: [register = FPReg and: [offset ~= FoxMFReceiver]]! - ^type = SSBaseOffset and: [register = FPReg]! Item was added: + ----- Method: CogSimStackEntry>>isFrameVar (in category 'comparing') ----- + isFrameVar + "Answer if the receiver is a temporary variable or self. This + only works in a frameful method, hence the weird name." + <inline: true> + ^type = SSBaseOffset and: [register = FPReg]! Item was changed: ----- Method: CogVMSimulator>>openAsMorph (in category 'UI') ----- openAsMorph "Open a morphic view on this simulation." | localImageName borderWidth window | localImageName := imageName ifNotNil: [FileDirectory default localNameFor: imageName] ifNil: [' synthetic image']. window := (SystemWindow labelled: 'Simulation of ', localImageName) model: self. window paneColor: self windowColorToUse. window addMorph: (displayView := SimulatorImageMorph new image: displayForm) frame: (0@0 corner: 1(a)0.8). displayView activeHand addEventListener: self. eventTransformer := SimulatorEventTransformer new. transcript := TranscriptStream on: (String new: 10000). window addMorph: (PluggableTextMorph on: transcript text: nil accept: nil readSelection: nil menu: #codePaneMenu:shifted:) frame: (0(a)0.8 corner: 0.7@1). window addMorph: (PluggableTextMorph on: self text: #byteCountText accept: nil readSelection: nil menu: #utilitiesMenu:) hideScrollBarsIndefinitely frame: (0.7(a)0.8 corner: 1@1). borderWidth := [SystemWindow borderWidth] "Squeak 4.1" on: MessageNotUnderstood do: [:ex| 0]. "3.8" borderWidth := borderWidth + window borderWidth. window openInWorldExtent: (self desiredDisplayExtent + + (2 * borderWidth @ borderWidth) - + (2 * borderWidth) + (0@window labelHeight) * (1(a)(1/0.8))) rounded. ^window! Item was changed: ----- Method: CogVMSimulator>>openAsMorphNoTranscript (in category 'UI') ----- openAsMorphNoTranscript "Open a morphic view on this simulation." | localImageName borderWidth window | localImageName := imageName ifNotNil: [FileDirectory default localNameFor: imageName] ifNil: [' synthetic image']. window := (SystemWindow labelled: 'Simulation of ', localImageName) model: self. window paneColor: self windowColorToUse. window addMorph: (displayView := SimulatorImageMorph new image: displayForm) frame: (0@0 corner: 1(a)0.95). displayView activeHand addEventListener: self. eventTransformer := SimulatorEventTransformer new. window addMorph: (PluggableTextMorph on: self text: #byteCountText accept: nil readSelection: nil menu: #utilitiesMenu:) hideScrollBarsIndefinitely frame: (0(a)0.95 corner: 1@1). borderWidth := [SystemWindow borderWidth] "Squeak 4.1" on: MessageNotUnderstood do: [:ex| 0]. "3.8" borderWidth := borderWidth + window borderWidth. window openInWorldExtent: (self desiredDisplayExtent + + (2 * borderWidth@borderWidth) - + (2 * borderWidth) + (0@window labelHeight) * (1(a)(1/0.95))) rounded! Item was changed: ----- Method: Cogit>>methodFoundInvalidPostScan (in category 'testing') ----- methodFoundInvalidPostScan "This is a hook for subclasses to filter out methods they can't deal with." + <inline: true> ^false! Item was added: + ----- Method: RegisterAllocatingCogit>>genPushReceiverBytecode (in category 'bytecode generators') ----- + genPushReceiverBytecode + ^self ssPushDesc: self simSelf! Item was changed: ----- Method: RegisterAllocatingCogit>>genStorePop:TemporaryVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean TemporaryVariable: tempIndex <inline: false> + | top targetTemp srcRegOrNone destReg | - | top srcRegOrNone destReg | self deny: self duplicateRegisterAssignmentsInTemporaries. self ssFlushUpThroughTemporaryVariable: tempIndex. "To avoid a stall writing through destReg, remember srcReg before the potential ssPop: 1 in ssStorePop:toReg:" top := self ssTop. + targetTemp := self simStackAt: tempIndex + 1. srcRegOrNone := top registerOrNone. + "Take care to avoid duplicating registers in different temps and/or self." + destReg := targetTemp liveRegister. + destReg = NoReg ifTrue: + [destReg := self availableRegOrNoneNotConflictingWith: (self registerMaskUndesirableForTempVars bitOr: self liveRegisters)]. + destReg = NoReg ifTrue: + [destReg := TempReg]. + self deny: srcRegOrNone = destReg. + srcRegOrNone = NoReg + ifTrue: "Avoid duplicating destReg into top; this would only be ok if top + is the same entry as the target, which is not worth optimizing." + [self ssStorePopNoAssign: popBoolean toReg: destReg] - "ssStorePop:toPreferredReg: will allocate a register, and indeed may allocate ReceiverResultReg - if, for example, the ssEntry to be popped is already in ReceiverResultReg (as the result of a send). - ReceiverResultReg is not a good choice for a temporary variable; it has other uses. So if the ssEntry - at top of stack has ReceiverResultReg as its live variable, try and allocate an alternative." - destReg := (self simStackAt: tempIndex + 1) liveRegister. - destReg ~= NoReg - ifTrue: - [self ssStorePop: popBoolean toReg: destReg] ifFalse: + [self ssStorePop: popBoolean toReg: destReg]. + (destReg ~= TempReg and: [targetTemp liveRegister = NoReg]) ifTrue: + [targetTemp liveRegister: destReg. + self copyLiveRegisterToCopiesOf: targetTemp]. - [((top type = SSConstant - or: [srcRegOrNone = NoReg - or: [self register: srcRegOrNone isInMask: self registerMaskUndesirableForTempVars]]) - and: [(destReg := self availableRegOrNoneNotConflictingWith: (self registerMaskUndesirableForTempVars bitOr: self liveRegisters)) ~= NoReg]) - ifTrue: [self ssStorePop: popBoolean toReg: destReg] - ifFalse: [destReg := self ssStorePop: popBoolean toPreferredReg: TempReg]. - "The ssStorePop: may end up assigning a register to ssTop, and if it is also a temp then a new - register must be found for the destination temp, sicne two temp vars can't share a register." - (top isFrameTempVar and: [top liveRegister = destReg]) ifTrue: - [srcRegOrNone := destReg. - destReg := self availableRegOrNoneNotConflictingWith: (self registerMaskUndesirableForTempVars bitOr: self liveRegisters). - destReg ~= NoReg ifTrue: - [self MoveR: srcRegOrNone R: destReg]]. - (destReg ~= NoReg and: [destReg ~= TempReg]) ifTrue: - [(self simStackAt: tempIndex + 1) liveRegister: destReg. - self copyLiveRegisterToCopiesOf: (self simStackAt: tempIndex + 1)]]. self MoveR: (srcRegOrNone ~= NoReg ifTrue: [srcRegOrNone] ifFalse: [destReg]) Mw: (self frameOffsetOfTemporary: tempIndex) r: FPReg. + targetTemp bcptr: bytecodePC. "for debugging" - (self simStackAt: tempIndex + 1) bcptr: bytecodePC. "for debugging" self deny: self duplicateRegisterAssignmentsInTemporaries. ^0! Item was changed: ----- Method: RegisterAllocatingCogit>>mergeCurrentSimStackWith: (in category 'bytecode generator support') ----- mergeCurrentSimStackWith: fixup "At a merge point the cogit expects the stack to be in the same state as fixup's mergeSimStack. mergeSimStack is the state as of some jump forward or backward to this point. So make simStack agree with mergeSimStack (it is, um, problematic to plant code at the jump). Values may have to be assigned to registers. Registers may have to be swapped. Generate code to merge the current simStack with that of the target fixup, the goal being to keep as many registers live as possible." "self printSimStack; printSimStack: fixup mergeSimStack" "self simStackPrintString-> fixup simStackPrintString" "abstractOpcodes object copyFrom: startIndex to: opcodeIndex" <var: #fixup type: #'BytecodeFixup *'> + | currentRegisters targetRegisters mergeSimStack current target spillOffset them | - | currentRegisters targetRegisters mergeSimStack current target spillOffset | (mergeSimStack := fixup mergeSimStack) ifNil: [^self]. + self cCode: '' inSmalltalk: [them := {self simStackPrintString. fixup simStackPrintString}]. self assert: simStackPtr = fixup simStackPtr. currentRegisters := self liveRegistersFrom: 0 to: simStackPtr in: simStack. targetRegisters := self liveRegistersFrom: 0 to: simStackPtr in: mergeSimStack. self resolveConflicts: (currentRegisters bitAnd: targetRegisters) with: fixup mergeSimStack to: fixup simStackPtr. self assert: (self conflictsResolvedBetweenSimStackAnd: mergeSimStack). (self pushForMergeWith: mergeSimStack) ifTrue: [0 to: simStackPtr do: [:i| spillOffset := i > methodOrBlockNumTemps ifTrue: [self frameOffsetOfTemporary: i - 1] ifFalse: [0]. ((current := self simStack: simStack at: i) reconcileWith: (target := self simStack: mergeSimStack at: i) spillOffset: spillOffset onSpillOrUnspill: [:targetReg| self deny: current spilled. self assert: spillOffset ~= 0. current ensureSpilledAt: spillOffset from: FPReg. simSpillBase <= i ifTrue: [simSpillBase := i + 1]]) ifTrue: [| targetReg | (i > methodOrBlockNumTemps and: [(targetReg := target registerOrNone) ~= NoReg]) ifTrue: [self deassignRegister: targetReg in: simStack. self deassignRegister: targetReg in: mergeSimStack. self deny: (self register: targetReg isInMask: self liveRegistersInSelfAndTemps)]]]] ifFalse: [simStackPtr to: 0 by: -1 do: [:i| spillOffset := i > methodOrBlockNumTemps ifTrue: [self frameOffsetOfTemporary: i - 1] ifFalse: [0]. ((current := self simStack: simStack at: i) reconcileWith: (target := self simStack: mergeSimStack at: i) spillOffset: spillOffset onSpillOrUnspill: [:targetReg| self assert: current spilled. self assert: spillOffset ~= 0. targetReg ~= NoReg ifTrue: [self PopR: targetReg] ifFalse: [self AddCq: objectRepresentation wordSize R: SPReg]. current spilled: false. simSpillBase > i ifTrue: [simSpillBase := i]]) ifTrue: [| targetReg | (i > methodOrBlockNumTemps and: [(targetReg := target registerOrNone) ~= NoReg]) ifTrue: [self deassignRegister: targetReg in: simStack. self deassignRegister: targetReg in: mergeSimStack. self deny: (self register: targetReg isInMask: self liveRegistersInSelfAndTemps)]]]]. self updateSimSpillBase! Item was changed: ----- Method: RegisterAllocatingCogit>>mergeWithFixupIfRequired: (in category 'simulation stack') ----- mergeWithFixupIfRequired: fixup "If this bytecode has a fixup, some kind of merge needs to be done. There are 4 cases: 1) the bytecode has no fixup (fixup isNotAFixup) do nothing 2) the bytecode has a non merge fixup the fixup has needsNonMergeFixup. The code generating non merge fixup (currently only special selector code) is responsible for the merge so no need to do it. We set deadCode to false as the instruction can be reached from jumps. 3) the bytecode has a merge fixup, but execution flow *cannot* fall through to the merge point. the fixup has needsMergeFixup and deadCode = true. ignores the current simStack as it does not mean anything restores the simStack to the state the jumps to the merge point expects it to be. 4) the bytecode has a merge fixup and execution flow *can* fall through to the merge point. the fixup has needsMergeFixup and deadCode = false. Merge the state into the fixup's state via mergeCurrentSimStackWith:forwards:. In addition, if this is a backjump merge point, we patch the fixup to hold the current simStackPtr for later assertions. self printSimStack: fixup mergeSimStack" <var: #fixup type: #'BytecodeFixup *'> deadCode ifFalse: [self assertCorrectSimStackPtr]. "case 1" fixup notAFixup ifTrue: [^0]. "case 2" fixup isNonMergeFixup ifTrue: [deadCode ifTrue: [self deny: fixup simStackPtr isNil. simStackPtr := fixup simStackPtr. self restoreSimStackAtMergePoint: fixup. deadCode := false. self assertCorrectSimStackPtr] ifFalse: [self flushRegistersOnlyLiveOnFallThrough: fixup]. ^0]. "cases 3 and 4" self assert: fixup isMergeFixup. self traceMerge: fixup. deadCode ifTrue: "case 3" + [(fixup isBackwardBranchFixup and: [fixup mergeSimStack isNil]) "e.g. a loop within false ifTrue: []" + ifTrue: [self assert: fixup simStackPtr isNil] + ifFalse: + [simStackPtr := fixup simStackPtr. + self restoreSimStackAtMergePoint: fixup. + deadCode := false]] - [simStackPtr := fixup simStackPtr. - self restoreSimStackAtMergePoint: fixup. - deadCode := false] ifFalse: "case 4" [(fixup isBackwardBranchFixup and: [compilationPass > 1]) ifTrue: [fixup simStackPtr: simStackPtr. self mergeCurrentSimStackWith: fixup. self copySimStackToFixup: fixup] ifFalse: [self mergeCurrentSimStackWith: fixup]]. "cases 3 and 4" fixup isBackwardBranchFixup ifTrue: [fixup mergeSimStack ifNil: [self assert: compilationPass = 1. self setMergeSimStackOf: fixup]]. fixup targetInstruction: self Label. self assertCorrectSimStackPtr. self assert: (self simStackMergeCompatibleWith: fixup). "self simStackPrintString, fixup simStackPrintString" ^0! Item was added: + ----- Method: RegisterAllocatingCogit>>putSelfInReceiverResultReg (in category 'bytecode generator support') ----- + putSelfInReceiverResultReg + "Override to force copying the register to duplicates on stack." + <inline: true> + | simSelfHasRegister | + simSelfHasRegister := self simSelf liveRegister ~= NoReg. + super putSelfInReceiverResultReg. + simSelfHasRegister ifTrue: + [self simSelf liveRegister: ReceiverResultReg. + self copyLiveRegisterToCopiesOf: self simSelf]! Item was changed: ----- Method: RegisterAllocatingCogit>>resolveConflicts:with:to: (in category 'bytecode generator support') ----- resolveConflicts: registersInCommon with: mergeSimStack to: simStackPtr "registersInCommon is the register mask of registers in use in both the current simStack and the target mergeSimStack. Swap any and all conflicting register uses in registersInCommon, until register uses in simStack agree with mergeSimStack." + | registerExchanges registerLocations agreements visited initialIndex | - | registerLocations visited | "registerLocations records where a register has moved to during an exchange. This allows a single pass of the stack to rename registers, instead of 1/2 N^2; max stack ~ 56" + <var: 'registerExchanges' declareC: 'int registerExchanges[NumRegisters]'> <var: 'registerLocations' declareC: 'int registerLocations[NumRegisters]'> + self deny: self duplicateRegisterAssignmentsInTemporaries. registersInCommon = (self registerMaskFor: FPReg) ifTrue: + [self assert: (self conflictsResolvedBetweenSimStackAnd: mergeSimStack). + ^self]. - [^self]. self cCode: '' inSmalltalk: + [registerExchanges := CArrayAccessor on: (Array new: NumRegisters). + registerLocations := CArrayAccessor on: (Array new: NumRegisters)]. - [registerLocations := CArrayAccessor on: (Array new: NumRegisters)]. 0 to: NumRegisters - 1 do: + [:i| registerExchanges at: i put: i]. + initialIndex := opcodeIndex. "for debugging" + agreements := visited := 0. - [:i| registerLocations at: i put: i]. - visited := 0. 0 to: simStackPtr do: [:i| | currentReg targetReg | currentReg := (self simStackAt: i) registerOrNone. targetReg := (self simStack: mergeSimStack at: i) registerOrNone. (currentReg ~= NoReg and: [targetReg ~= NoReg]) ifTrue: + [currentReg := registerExchanges at: currentReg. + currentReg = targetReg + ifTrue: + [(self register: currentReg isInMask: visited) ifFalse: + [visited := visited bitOr: (self registerMaskFor: currentReg). + agreements := agreements bitOr: (self registerMaskFor: currentReg)]] + ifFalse: + [((self register: currentReg isInMask: registersInCommon) + and: [(self register: currentReg isNotInMask: visited) + or: [self register: targetReg isNotInMask: visited]]) ifTrue: + [| this that | + visited := visited bitOr: (self registerMaskFor: currentReg and: targetReg). + self SwapR: targetReg R: currentReg Scratch: RISCTempReg. + this := registerExchanges at: currentReg. + that := registerExchanges at: targetReg. + registerExchanges + at: currentReg put: that; + at: targetReg put: this]]]]. + (visited := visited bitClear: agreements) = 0 ifTrue: + [self assert: (self conflictsResolvedBetweenSimStackAnd: mergeSimStack). + ^self]. + 0 to: NumRegisters - 1 do: + [:i| registerLocations at: (registerExchanges at: i) put: i]. - [currentReg := registerLocations at: currentReg. - (currentReg ~= targetReg - and: [(self register: currentReg isInMask: registersInCommon) - and: [(self register: currentReg isNotInMask: visited)]]) ifTrue: - [visited := visited + (self registerMaskFor: currentReg). - self SwapR: targetReg R: currentReg Scratch: RISCTempReg. - registerLocations - at: currentReg put: targetReg; - at: targetReg put: currentReg]]]. - visited = 0 ifTrue: - [^self]. 0 to: simStackPtr do: [:i| | ssEntry reg | ssEntry := self simStackAt: i. reg := ssEntry registerOrNone. (reg ~= NoReg and: [(self register: reg isInMask: registersInCommon) and: [reg ~= (self simStack: mergeSimStack at: i) registerOrNone]]) ifTrue: [ssEntry type = SSRegister ifTrue: [ssEntry register: (registerLocations at: reg)] + ifFalse: [ssEntry liveRegister: (registerLocations at: reg)]]]. + self deny: self duplicateRegisterAssignmentsInTemporaries. + self assert: (self conflictsResolvedBetweenSimStackAnd: mergeSimStack) + "(initialIndex to: opcodeIndex - 1) collect: [:x| abstractOpcodes at: x]"! - ifFalse: [ssEntry liveRegister: (registerLocations at: reg)]]]! Item was added: + ----- Method: RegisterAllocatingCogit>>ssStorePopNoAssign:toReg: (in category 'simulation stack') ----- + ssStorePopNoAssign: popBoolean toReg: reg + "Store or pop the top simulated stack entry to a register. + Do /not/ assign reg to ssTop. + N.B.: popToReg: and storeToReg: does not generate anything if + it moves a register to the same register." + popBoolean + ifTrue: [self ssTop popToRegNoAssign: reg. + self ssPop: 1] + ifFalse: [self ssTop storeToRegNoAssign: reg].! Item was changed: ----- Method: StackInterpreterSimulator>>openAsMorph (in category 'UI') ----- openAsMorph "Open a morphic view on this simulation." | localImageName borderWidth window | localImageName := imageName ifNotNil: [FileDirectory default localNameFor: imageName] ifNil: [' synthetic image']. window := (SystemWindow labelled: 'Simulation of ', localImageName) model: self. window paneColor: self windowColorToUse. window addMorph: (displayView := SimulatorImageMorph new image: displayForm) frame: (0@0 corner: 1(a)0.8). displayView activeHand addEventListener: self. eventTransformer := SimulatorEventTransformer new. transcript := TranscriptStream on: (String new: 10000). window addMorph: (PluggableTextMorph on: transcript text: nil accept: nil readSelection: nil menu: #codePaneMenu:shifted:) frame: (0(a)0.8 corner: 0.7@1). window addMorph: (PluggableTextMorph on: self text: #byteCountText accept: nil readSelection: nil menu: #utilitiesMenu:) hideScrollBarsIndefinitely frame: (0.7(a)0.8 corner: 1@1). borderWidth := [SystemWindow borderWidth] "Squeak 4.1" on: MessageNotUnderstood do: [:ex| 0]. "3.8" borderWidth := borderWidth + window borderWidth. window openInWorldExtent: (self desiredDisplayExtent + + (2 * borderWidth@borderWidth) - + (2 * borderWidth) + (0@window labelHeight) * (1(a)(1/0.8))) rounded. ^window! Item was changed: ----- Method: StackInterpreterSimulator>>openAsMorphNoTranscript (in category 'UI') ----- openAsMorphNoTranscript "Open a morphic view on this simulation." | localImageName borderWidth window | localImageName := imageName ifNotNil: [FileDirectory default localNameFor: imageName] ifNil: [' synthetic image']. window := (SystemWindow labelled: 'Simulation of ', localImageName) model: self. window paneColor: self windowColorToUse. window addMorph: (displayView := SimulatorImageMorph new image: displayForm) frame: (0@0 corner: 1(a)0.95). displayView activeHand addEventListener: self. eventTransformer := SimulatorEventTransformer new. window addMorph: (PluggableTextMorph on: self text: #byteCountText accept: nil readSelection: nil menu: #utilitiesMenu:) hideScrollBarsIndefinitely frame: (0(a)0.95 corner: 1@1). borderWidth := [SystemWindow borderWidth] "Squeak 4.1" on: MessageNotUnderstood do: [:ex| 0]. "3.8" borderWidth := borderWidth + window borderWidth. window openInWorldExtent: (self desiredDisplayExtent + + (2 * borderWidth@borderWidth) - + (2 * borderWidth) + (0@window labelHeight) * (1(a)(1/0.95))) rounded! Item was added: + ----- Method: VMMaker class>>generateSqueakSpurCog64MTVM (in category 'configurations') ----- + generateSqueakSpurCog64MTVM + "No primitives since we can use those for the Cog VM" + ^VMMaker + generate: CoInterpreterMT + and: StackToRegisterMappingCogit + with: #(COGMTVM true + ObjectMemory Spur64BitCoMemoryManager + MULTIPLEBYTECODESETS true + bytecodeTableInitializer initializeBytecodeTableForSqueakV3PlusClosuresSistaV1Hybrid) + to: (FileDirectory default pathFromURI: self sourceTree, '/spur64src') + platformDir: (FileDirectory default pathFromURI: self sourceTree, '/platforms') + including:#()! Item was added: + ----- Method: VMMaker class>>generateSqueakSpurCogMTVM (in category 'configurations') ----- + generateSqueakSpurCogMTVM + "No primitives since we can use those for the Cog VM" + ^VMMaker + generate: CoInterpreterMT + and: StackToRegisterMappingCogit + with: #(COGMTVM true + ObjectMemory Spur32BitCoMemoryManager + MULTIPLEBYTECODESETS true + bytecodeTableInitializer initializeBytecodeTableForSqueakV3PlusClosuresSistaV1Hybrid) + to: (FileDirectory default pathFromURI: self sourceTree, '/spursrc') + platformDir: (FileDirectory default pathFromURI: self sourceTree, '/platforms') + including:#()!

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WIN32, _WIN32 and option: pragma
by Alistair Grant 18 Feb '18

18 Feb '18

Hi Everyone, Would someone mind clarifying how I should be using the windows platform macros. My understanding is: - WIN32 is defined by the VM build scripts on Windows 32 bit only - WIN64 is defined by the VM build scripts on Windows 64 bit only - _WIN32 is defined by the compiler on Windows 32 and 64 bit. - _WIN64 is defined by the compiler on Windows 64 bit only. If my understanding is incorrect, please correct me. If I want code that only runs on Windows (32 or 64 bit), I should check if _WIN32 is defined. The FileAttributesPlugin has a method with "<option: #WIN32>", which causes it to only be compiled on Windows 32 bit, while I also need it on Windows 64 bit. "<option: #_WIN32>" isn't recognised, so the code is never generated, and I couldn't figure out how to have #WIN32 OR #WIN64. What's the correct solution? Thanks! Alistair

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[OpenSmalltalk/opensmalltalk-vm] fda969: Update filter-exec.sh for Pharo
by GitHub 17 Feb '18

17 Feb '18

Branch: refs/heads/Cog Home: https://github.com/OpenSmalltalk/opensmalltalk-vm Commit: fda969cfc99c86f528862dfd92df5ec78143d6e3 https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/fda969cfc99c86f528… Author: Fabio Niephaus <code(a)fniephaus.com> Date: 2018-02-17 (Sat, 17 Feb 2018) Changed paths: M deploy/pharo/filter-exec.sh Log Message: ----------- Update filter-exec.sh for Pharo Copy of deploy/filter-exec.sh plus check if $FLAVOR includes 'pharo'. This ensures PRs are not being uploaded to Pharo servers.

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[OpenSmalltalk/opensmalltalk-vm] 21234-Add-FileAttributesPlugin-to-win64x64 (#212)
by akgrant43 17 Feb '18

17 Feb '18

Add FileAttributesPlugin to build.win64x64/pharo.cog.spur/plugins.ext All pharo.cog.spur platforms are now compiling FileAttributesPlugin. You can view, comment on, or merge this pull request online at: https://github.com/OpenSmalltalk/opensmalltalk-vm/pull/212 -- Commit Summary -- * 21234-Add-FileAttributesPlugin-to-win64x64 -- File Changes -- M build.win64x64/pharo.cog.spur/plugins.ext (3) -- Patch Links -- https://github.com/OpenSmalltalk/opensmalltalk-vm/pull/212.patch https://github.com/OpenSmalltalk/opensmalltalk-vm/pull/212.diff -- You are receiving this because you are subscribed to this thread. Reply to this email directly or view it on GitHub: https://github.com/OpenSmalltalk/opensmalltalk-vm/pull/212

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[OpenSmalltalk/opensmalltalk-vm] a09d03: 21234-Add-FileAttributesPlugin-to-win64x64
by GitHub 17 Feb '18

17 Feb '18

Branch: refs/heads/Cog Home: https://github.com/OpenSmalltalk/opensmalltalk-vm Commit: a09d0303d33b997b2553cc85810c42510da089b1 https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/a09d0303d33b997b25… Author: AlistairGrant <akgrant0710(a)gmail.com> Date: 2018-02-05 (Mon, 05 Feb 2018) Changed paths: M build.win64x64/pharo.cog.spur/plugins.ext Log Message: ----------- 21234-Add-FileAttributesPlugin-to-win64x64 Add FileAttributesPlugin to build.win64x64/pharo.cog.spur/plugins.ext All pharo.cog.spur platforms are now compiling FileAttributesPlugin. Commit: b19d2e26f14a5bcf71cecf9c822024b334d74fde https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/b19d2e26f14a5bcf71… Author: AlistairGrant <akgrant0710(a)gmail.com> Date: 2018-02-16 (Fri, 16 Feb 2018) Changed paths: M src/plugins/FileAttributesPlugin/FileAttributesPlugin.c Log Message: ----------- Use _WIN32 (not WIN32) to check for Windows platform. WIN32 is only defined for Windows 32 bit, while _WIN32 should be defined for both Windows 32 bit and 64 bit. Changed the slang code to not use the option: pragma in offsetStatBufTimesForWIN32 as it currently doesn't understand _WIN32. Commit: bd3ff1ac56911b1ecf3ff88d921a9cb6f602946f https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/bd3ff1ac56911b1ecf… Author: Fabio Niephaus <code(a)fniephaus.com> Date: 2018-02-17 (Sat, 17 Feb 2018) Changed paths: M build.win64x64/pharo.cog.spur/plugins.ext M src/plugins/FileAttributesPlugin/FileAttributesPlugin.c Log Message: ----------- Merge pull request #212 from akgrant43/21234-Add-FileAttributesPlugin-to-win64x64 21234-Add-FileAttributesPlugin-to-win64x64 Compare: https://github.com/OpenSmalltalk/opensmalltalk-vm/compare/436a9a17d237...bd…

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VM Maker: VMMaker.oscog-eem.2334.mcz
by commits＠source.squeak.org 16 Feb '18

16 Feb '18

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.2334.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.2334 Author: eem Time: 16 February 2018, 2:50:22.335464 pm UUID: 990d0df3-ea2b-44de-b02c-485f7169840b Ancestors: VMMaker.oscog-eem.2333 Expand the set of names defined at compile time (e.g. for the option: pragma). Perhaps we should invert this and define the closed set of names defined at translation time. =============== Diff against VMMaker.oscog-eem.2333 =============== Item was changed: ----- Method: VMBasicConstants class>>namesDefinedAtCompileTime (in category 'C translation') ----- namesDefinedAtCompileTime "Answer the set of names for variables that should be defined at compile time. Some of these get default values during simulation, and hence get defaulted in the various initializeMiscConstants methods. But that they have values should /not/ cause the code generator to do dead code elimination based on their + default values. In particular, methods marked with <option: ANameDefinedAtCompileTime> + will be emitted within #if defined(ANameDefinedAtCompileTime)...#endif." - default values." ^#( VMBIGENDIAN IMMUTABILITY STACKVM COGVM COGMTVM SPURVM PharoVM "Pharo vs Squeak" TerfVM "Terf vs Squeak" EnforceAccessControl "Newspeak" CheckRememberedInTrampoline "IMMUTABILITY" LLDB "As of lldb-370.0.42 Swift-3.1, passing funciton parameters to printOopsSuchThat fails with Internal error [IRForTarget]: Couldn't rewrite one of the arguments of a function call. Turning off link time optimization with -fno-lto has no effect. hence we define some debugging functions as being <option: LLDB>" + + "processor related" + __ARM_ARCH__ __arm__ __arm32__ ARM32 __arm64__ ARM64 + _M_I386 _X86_ i386 i486 i586 i686 __i386__ __386__ X86 I386 + x86_64 __amd64 __x86_64 __amd64__ __x86_64__ _M_AMD64 _M_X64 + + "os related" + ACORN + __GNUC__ + __linux__ + __MINGW32__ + __OpenBSD__ + __osf__ + UNIX + WIN32 _WIN32 _WIN32_WCE + WIN64 _WIN64 _WIN64_WCE)! - WIN32)!

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Vm-dev February 2018