Hello, at the moment I'm fleshing out the ARM Compiler. Last week in my mentor meeting, we decided that it would be ok to ask any questions I have here. These questions might not be of much interest for anybody but Eliot, because they are quite specific about the internals of Cog.
When trying to fill in genSaveRegisters, I noticed that there is no genLoadRegisters. Where are the registers saved in that method loaded again? Also, I don't know what trampolines are. The term has too many meanings to find anything useful using google. And cog-related, there is only the article "An Arranged Marriage". In that, an understanding seems required. Do you have any more sources where I can read about trampolines? Or can point to the paragraph where they are explained?
We last week talked about the Call-Opcode and that some Instructions require that after a Call, the first item on the stack is the jump back address. On ARM, there is no Call which pushes the PC, but rather an BL-opcode, which loads the next pc into the LR-register. If I want to save LR, I need to do it as preamble of the next function. Where would be the place to prepend this pushing of LR ( and other callee-safe registers ) onto the stack?
I also looked over the conditional Jumping codes and added them. But there seems to be some ambiguity on ARM. Especially about 'unordered' and 'less than'. The 'less than' condition also is also true in case the VFP generated an unordered. For the non-fp codes, I found a list what they mean for the processor flags on x86, thus being able to map them onto the 15 ARM conditional codes. Does anybody have (a link to) a list of the flag-interpretation for FP-state (as used in IA32 and probably in cog)?
Thank you, Lars
P.S.: My development process is starting the CogVMSimulator on an Trunk43 image and filling in all the methods missing with best guesses (and they are legion). The snippet for starting the simulator (provided by Eliot) is: | cos opts | CoInterpreter initializeWithOptions: (opts := Dictionary newFromPairs: #(#ISA #ARMV5)). CogVMSimulator chooseAndInitCogitClassWithOpts: opts. cos := CogVMSimulator new. cos desiredNumStackPages: 8. cos openOn: 'CogTrunk43.image'. ^ cos openAsMorph; halt; run
Hi Lars:
On 25 Jul 2012, at 00:16, Lars wrote:
at the moment I'm fleshing out the ARM Compiler. Last week in my mentor meeting, we decided that it would be ok to ask any questions I have here. These questions might not be of much interest for anybody but Eliot, because they are quite specific about the internals of Cog.
Well, I find it interesting as well :)
When trying to fill in genSaveRegisters, I noticed that there is no genLoadRegisters. Where are the registers saved in that method loaded again? Also, I don't know what trampolines are. The term has too many meanings to find anything useful using google. And cog-related, there is only the article "An Arranged Marriage". In that, an understanding seems required. Do you have any more sources where I can read about trampolines? Or can point to the paragraph where they are explained?
Normally, I would assume Eliot refers to Lisp style trampolines. See http://stackoverflow.com/a/489860/916546 for some explanation.
Best regards Stefan
On 25.07.2012 00:16, Lars wrote:
I also looked over the conditional Jumping codes and added them. But there seems to be some ambiguity on ARM. Especially about 'unordered' and 'less than'. The 'less than' condition also is also true in case the VFP generated an unordered. For the non-fp codes, I found a list what they mean for the processor flags on x86, thus being able to map them onto the 15 ARM conditional codes. Does anybody have (a link to) a list of the flag-interpretation for FP-state (as used in IA32 and probably in cog)?
Thank you, Lars
http://www.intel.com/content/www/us/en/processors/architectures-software-dev... The relevant info is in Volume 1, Figure 8-4 describes the FP state registers layout, and Table 8-1 how different floating point operations effect the condition codes.
(Per the instruction reference in Volume 2, in the FCOM category, C3 is set if equal, C0 if less than. Both are set if unordered).
Also, note FCOMI & friends set EFLAGS directly, not quite sure which set of ops Cog is using.
Cheers, Henry
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