Lars Wassermann uploaded a new version of Cog to project VM Maker: http://source.squeak.org/VMMaker/Cog-lw.58.mcz
==================== Summary ====================
Name: Cog-lw.58 Author: lw Time: 30 January 2013, 9:34:28.956 am UUID: c6b730fe-47ba-da41-ab07-5de7090d4064 Ancestors: Cog-lw.56, Cog-IgorStasenko.57
changed the disassemble string generated by the plugin (added address) and subsequently had to change back decoration and some tests
added some abi information, e.g. cResultReg
=============== Diff against Cog-IgorStasenko.57 ===============
Item was added: + ----- Method: CogProcessorAlien>>cResultRegister (in category 'accessing-abstract') ----- + cResultRegister + ^self subclassResponsibility!
Item was added: + ----- Method: CogProcessorAlien>>cResultRegister: (in category 'accessing-abstract') ----- + cResultRegister: aValue + ^self subclassResponsibility!
Item was changed: ----- Method: CogProcessorAlien>>disassembleNextInstructionIn:for: (in category 'disassembly') ----- disassembleNextInstructionIn: memory for: aSymbolManager "<Cogit|nil>" | string | + string := self pc < memory size + ifTrue: [(self primitiveDisassembleAt: self pc inMemory: memory) last.] + ifFalse: ['Invalid address (', (self pc hex allButFirst: 3), ')']. - string := (self primitiveDisassembleAt: self pc inMemory: memory) last. ^aSymbolManager ifNil: [string] ifNotNil: [self decorateDisassembly: string for: aSymbolManager]!
Item was added: + ----- Method: CogProcessorAlien>>registerStatePCIndex (in category 'accessing-abstract') ----- + registerStatePCIndex + "Return the index of the PC register among all register, assuming they are copied into a Smalltalk array." + ^self subclassResponsibility!
Item was added: + ----- Method: GdbARMAlien>>cResultRegister (in category 'accessing-abstract') ----- + cResultRegister + self r0!
Item was added: + ----- Method: GdbARMAlien>>cResultRegister: (in category 'accessing-abstract') ----- + cResultRegister: aValue + self r0: aValue!
Item was changed: ----- Method: GdbARMAlien>>decorateDisassembly:for:fromAddress: (in category 'disassembly') ----- decorateDisassembly: anInstructionString for: aSymbolManager "<Cogit>" fromAddress: address + (anInstructionString endsWith: 'mov r1, r1') + ifTrue: [^super decorateDisassembly: 'nop' for: aSymbolManager]. + ^super decorateDisassembly: anInstructionString for: aSymbolManager! - "Prepend the address to the decoration string." - | addressPrefix | - addressPrefix := ((address storeStringBase: 16 length: 9 padded: true) allButFirst: 3), ' ', String tab. - anInstructionString = 'mov r1, r1' - ifTrue: [^super decorateDisassembly: addressPrefix, 'nop' for: aSymbolManager]. - ^super decorateDisassembly: addressPrefix, anInstructionString for: aSymbolManager!
Item was changed: ----- Method: GdbARMAlien>>printRegisterState:on: (in category 'printing') ----- printRegisterState: registerStateVector on: aStream | rsvs fields| aStream ensureCr. rsvs := registerStateVector readStream. + fields := #( r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 sp lr pc eflags cr). - fields := #( r0 r1 r2 r3 r4 r5 r6 cr r7 r8 r9 r10 r11 r12 cr sp lr pc eflags cr). fields withIndexDo: [:sym :index| | val | sym = #cr ifTrue: [aStream cr] ifFalse: [(val := rsvs next) isNil ifTrue: [^self]. aStream nextPutAll: sym; nextPut: $:; space. val printOn: aStream base: 16 length: 8 padded: true. #eflags == sym ifTrue: [aStream space. "'FIVCZN'"'--VCZN' withIndexDo: [:flag :bitIndex| flag ~= $- ifTrue: [aStream nextPut: flag; nextPutAll: 'F='; print: (val bitAnd: 1 << (bitIndex - 1)) >> (bitIndex - 1); space]]] ifFalse: [val > 16 ifTrue: [aStream space; nextPut: $(. val printOn: aStream base: 10 length: 1 padded: false. aStream nextPut: $)]]. (fields at: index + 1) ~~ #cr ifTrue: [aStream tab]]]!
Item was added: + ----- Method: GdbARMAlien>>registerStatePCIndex (in category 'accessing-abstract') ----- + registerStatePCIndex + ^16!
Item was changed: ----- Method: GdbARMAlien>>smashRegisterAccessors (in category 'accessing-abstract') ----- smashRegisterAccessors + ^#(r0: r1: r2: r3: r4: r5: r6: r7: r8: r9: r10:)! - ^#(r0: r1: r2: r3: r4: r5: r6: r7: r8:)!
Item was changed: ----- Method: GdbARMAlienTests>>testCallTrap (in category 'tests') ----- testCallTrap "Call a function that is out-of-range. Ensure the call is trapped." "self new testCallTrap" | memory | memory := Bitmap new: 256 withAll: self processor nopOpcode. + memory longAt: 5 put: (self processor branchAndLinkOpcodeWithOffset: 1020) bigEndian: false. - memory longAt: 1 put: (self processor branchAndLinkOpcodeWithOffset: 1024) bigEndian: false. memory := memory asByteArray. self processor + pc: 4; - pc: 0; sp: (memory size - 4); "Room for return address" singleStepIn: memory. "We have to step twice, because the first step only changes the pc, but does not fetch anything from the address it points to." self should: [self processor singleStepIn: memory] + raise: ProcessorSimulationTrap - raise: Error withExceptionDo: [:pst| self assert: self processor pc = 1024. + self assert: self processor lr = 8. + self assert: pst pc = 4. + self assert: pst nextpc = 8. - self assert: self processor lr = 4. - self assert: pst pc = 0. - self assert: pst nextpc = 4. self assert: pst address = 1024. self assert: pst type = #call].!
Item was changed: ----- Method: GdbARMAlienTests>>testDisassembling (in category 'tests') ----- testDisassembling
| memory result | memory := WordArray new: 2. memory at: 1 put: 16rEF200000. result := self processor disassembleInstructionAt: 0 In: memory into: [:str :len | self assert: len = 4; + assert: str = '0x00000000: svc 0x00200000'].! - assert: str = 'svc 0x00200000'].!
Item was changed: ----- Method: GdbARMAlienTests>>testFlags (in category 'tests') ----- testFlags "self new testFlags" | memory | memory := Bitmap new: 3. memory longAt: 1 put: 16rE3A03001 bigEndian: false. "MOV r3, #1" memory longAt: 5 put: 16rE3530001 bigEndian: false. "CMP r3, #1" memory := memory asByteArray. self processor disassembleInstructionAt: 0 In: memory into: [:str :len | self assert: len = 4; + assert: str equals: '0x00000000: mov r3, #1']. - assert: str = 'mov r3, #1']. self processor disassembleInstructionAt: 4 In: memory into: [:str :len | self assert: len = 4; + assert: str equals: '0x00000004: cmp r3, #1']. - assert: str = 'cmp r3, #1']. self processor pc: 0; singleStepIn: memory; singleStepIn: memory. self assert: self processor pc = 16r8; assert: self processor r3 = 1; assert: self processor zflag = 1; assert: self processor cflag = 1; assert: self processor vflag = 0; assert: self processor nflag = 0. self processor reset. self assert: self processor eflags = 3. "IFFlags are both set."!
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