Vm-dev July 2022

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[OpenSmalltalk/opensmalltalk-vm] 643bf1: CogVM source as per VMMaker.oscog-eem.3220
by Eliot Miranda 25 Jul '22

25 Jul '22

Branch: refs/heads/Cog Home: https://github.com/OpenSmalltalk/opensmalltalk-vm Commit: 643bf157d88187567b34ac79bbf319770e0bbc1f https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/643bf157d88187567b… Author: Eliot Miranda <eliot.miranda(a)gmail.com> Date: 2022-07-25 (Mon, 25 Jul 2022) Changed paths: M src/plugins/AsynchFilePlugin/AsynchFilePlugin.c M src/plugins/B2DPlugin/B2DPlugin.c M src/plugins/B3DAcceleratorPlugin/B3DAcceleratorPlugin.c M src/plugins/BochsIA32Plugin/BochsIA32Plugin.c M src/plugins/BochsX64Plugin/BochsX64Plugin.c M src/plugins/ClipboardExtendedPlugin/ClipboardExtendedPlugin.c M src/plugins/FileCopyPlugin/FileCopyPlugin.c M src/plugins/GdbARMPlugin/GdbARMPlugin.c M src/plugins/GdbARMv8Plugin/GdbARMv8Plugin.c M src/plugins/HostWindowPlugin/HostWindowPlugin.c M src/plugins/InternetConfigPlugin/InternetConfigPlugin.c M src/plugins/JPEGReadWriter2Plugin/JPEGReadWriter2Plugin.c M src/plugins/MIDIPlugin/MIDIPlugin.c M src/plugins/MacMenubarPlugin/MacMenubarPlugin.c M src/plugins/Mpeg3Plugin/Mpeg3Plugin.c M src/plugins/SerialPlugin/SerialPlugin.c M src/plugins/SocketPlugin/SocketPlugin.c M src/plugins/SoundPlugin/SoundPlugin.c M src/plugins/SqueakFFIPrims/RiscV64FFIPlugin.c Log Message: ----------- CogVM source as per VMMaker.oscog-eem.3220 Fix accessor depth calculation for SmartSyntaxInterpreterPlugins. The scheme still doesn't follow at: chains thropugh derived pointers starting with firstIndexableField: but it's good enough, and a big step up from assuming the accessor depths of primitives in all such plugins is 0. Implement what I think Ken wants for ThreadedRiscV64FFIPlugin>>ffiCalloutTo:SpecOnStack:in:, i.e. to treat float & double differently from the array of float/double.

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VM Maker: VMMaker.oscog-eem.3220.mcz
by commits＠source.squeak.org 25 Jul '22

25 Jul '22

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.3220.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.3220 Author: eem Time: 25 July 2022, 2:12:30.892022 pm UUID: 1a04ca73-fe89-4ffe-8a60-d00f9b55dc14 Ancestors: VMMaker.oscog-eem.3219 Oops; BitBltSimulation is an outlier, not uniformly a SmartSyntaxInterpreterPlugin. =============== Diff against VMMaker.oscog-eem.3219 =============== Item was changed: ----- Method: SmartSyntaxPluginCodeGenerator>>actualsForMethod: (in category 'spur primitive compilation') ----- actualsForMethod: aTMethod "Normal primitives have no arguments, but translated primitives do. Override to answer actuals for translated primitives." | formalParameterNames actuals | + aTMethod fullArgs ifNil: + [^super actualsForMethod: aTMethod]. formalParameterNames := Set withAll: aTMethod fullArgs. aTMethod receiver ifNotNil: [:rcvr| formalParameterNames add: rcvr]. actuals := OrderedCollection new. "they're all at the top level..." aTMethod parseTree statements do: [:node| (node isAssignment and: [formalParameterNames includes: node variable name]) ifTrue: [formalParameterNames remove: node variable name. actuals add: node expression]]. ^actuals!

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VM Maker: VMMaker.oscog-eem.3220.mcz
by commits＠source.squeak.org 25 Jul '22

25 Jul '22

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.3220.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.3220 Author: eem Time: 25 July 2022, 1:58:35.079817 pm UUID: 6c2f6c22-9604-4328-b694-85f7b54fbfaa Ancestors: VMMaker.oscog-eem.3219 Oops; SmartSyntaxPluginCodeGenerator>>actualsForMethod: should not exist. =============== Diff against VMMaker.oscog-eem.3219 =============== Item was removed: - ----- Method: SmartSyntaxPluginCodeGenerator>>actualsForMethod: (in category 'spur primitive compilation') ----- - actualsForMethod: aTMethod - "Normal primitives have no arguments, but translated primitives do. - Override to answer actuals for translated primitives." - | formalParameterNames actuals | - formalParameterNames := Set withAll: aTMethod fullArgs. - aTMethod receiver ifNotNil: - [:rcvr| formalParameterNames add: rcvr]. - actuals := OrderedCollection new. - "they're all at the top level..." - aTMethod parseTree statements do: - [:node| - (node isAssignment - and: [formalParameterNames includes: node variable name]) ifTrue: - [formalParameterNames remove: node variable name. - actuals add: node expression]]. - ^actuals!

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VM Maker: VMMaker.oscog-eem.3219.mcz
by commits＠source.squeak.org 25 Jul '22

25 Jul '22

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.3219.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.3219 Author: eem Time: 25 July 2022, 1:44:22.899662 pm UUID: e81f0074-fa4b-408c-b554-79542c7ff944 Ancestors: VMMaker.oscog-eem.3218 Fix accessor depth calculation for SmartSyntaxInterpreterPlugins. The scheme still doesn't follow at: chains thropugh derived pointers starting with firstIndexableField: biut it's good enough, and a big step up form assuming the accessor depths of primitives in all such plugins is 0. =============== Diff against VMMaker.oscog-eem.3218 =============== Item was changed: ----- Method: CCodeGenerator>>accessorsAndAssignmentsForMethod:actuals:depth:interpreterClass:into: (in category 'spur primitive compilation') ----- accessorsAndAssignmentsForMethod: method actuals: actualParameters depth: depth interpreterClass: interpreterClass into: aTrinaryBlock "Evaluate aTrinaryBlock with the root accessor sends, accessor sends and assignments in the method." | accessors assignments roots | accessors := Set new. assignments := Set new. roots := Set new. + actualParameters with: method argsForAccessorChainComputation do: - actualParameters with: method args do: [:actual :argName| (actual isVariable or: [actual isSend]) ifTrue: [(actual isSend and: [self isStackAccessor: actual selector given: interpreterClass]) ifTrue: [roots add: actual]. assignments add: (TAssignmentNode new setVariable: (TVariableNode new setName: argName) expression: actual)]]. method parseTree nodesDo: [:node| node isSend ifTrue: [(self isStackAccessor: node selector given: interpreterClass) ifTrue: [roots add: node]. (self isObjectAccessor: node selector given: interpreterClass) ifTrue: [accessors add: node]. (self accessorDepthDeterminationFollowsSelfSends and: [node receiver isVariable and: [node receiver name = 'self' and: [roots isEmpty or: [node args anySatisfy: [:arg| (roots includes: arg) or: [(accessors includes: arg) or: [assignments anySatisfy: [:assignment| assignment variable isSameAs: arg]]]]]]]]) ifTrue: [self accessorsAndAssignmentsForSubMethodNamed: node selector actuals: node args depth: depth + 1 interpreterClass: interpreterClass into: [:subRoots :subAccessors :subAssignments| (subRoots isEmpty and: [subAccessors isEmpty and: [subAssignments isEmpty]]) ifFalse: [roots addAll: subRoots. accessors add: node. accessors addAll: subAccessors. assignments addAll: subAssignments]]]]. (node isAssignment and: [(node expression isSend and: [SpurMemoryManager isTerminalObjectAccessor: node expression selector]) not and: [(roots includes: node expression) or: [(accessors includes: node expression) or: [node expression isVariable and: [node expression name ~= 'nil']]]]]) ifTrue: [assignments add: node]]. ^aTrinaryBlock value: roots value: accessors value: assignments! Item was changed: ----- Method: CCodeGenerator>>depthOfAccessor:for: (in category 'spur primitive compilation') ----- depthOfAccessor: accessor for: chainVariableOrNil "Compute the accessor depth for a send. This is potentially greater than one for a nested access such as self fetchPointer: i ofObject: (self fetchPointer: j ofObject: (self fetchPointer: k ofObject: var)). If chainVariableOrNil is not nil then an access is only meaningful if it is an access of chainVariableOrNil." | keywords accessIndex objectAccessed | accessor isSend ifFalse: [^0]. (StackInterpreter isStackAccessor: accessor selector) ifTrue: [^1]. + #firstIndexableField: == accessor selector ifTrue: + [^1 + (self depthOfAccessor: accessor args first for: chainVariableOrNil)]. + (#(cCoerceSimple:to: cCoerce:to:) includes: accessor selector) ifTrue: + [^self depthOfAccessor: accessor args first for: chainVariableOrNil]. keywords := accessor selector keywords. accessIndex := keywords indexOf: 'ofObject:' ifAbsent: [^(accessor args inject: ((StackInterpreter isObjectAccessor: accessor selector) ifTrue: [1] ifFalse: [0]) into: [:best :node| node isSend ifTrue: [best max: (self depthOfAccessor: node for: chainVariableOrNil)] ifFalse: [best]])]. objectAccessed := accessor args at: accessIndex. chainVariableOrNil ifNil: [^1 + (self depthOfAccessor: objectAccessed for: chainVariableOrNil)]. objectAccessed isSend ifFalse: [^(objectAccessed isSameAs: chainVariableOrNil) ifTrue: [1] ifFalse: [0]]. (objectAccessed anySatisfy: [:node| node isSameAs: chainVariableOrNil]) ifFalse: [^0]. ^1 + (self depthOfAccessor: objectAccessed for: chainVariableOrNil)! Item was added: + ----- Method: InterpreterPlugin class>>isStackAccessor: (in category 'spur primitive compilation') ----- + isStackAccessor: selector + ^(selector beginsWith: 'stack') and: [selector endsWith: 'Value:']! Item was added: + ----- Method: SmartSyntaxPluginCodeGenerator>>actualsForMethod: (in category 'spur primitive compilation') ----- + actualsForMethod: aTMethod + "Normal primitives have no arguments, but translated primitives do. + Override to answer actuals for translated primitives." + | formalParameterNames actuals | + formalParameterNames := Set withAll: aTMethod fullArgs. + aTMethod receiver ifNotNil: + [:rcvr| formalParameterNames add: rcvr]. + actuals := OrderedCollection new. + "they're all at the top level..." + aTMethod parseTree statements do: + [:node| + (node isAssignment + and: [formalParameterNames includes: node variable name]) ifTrue: + [formalParameterNames remove: node variable name. + actuals add: node expression]]. + ^actuals! Item was added: + ----- Method: SmartSyntaxPluginTMethod>>argsForAccessorChainComputation (in category 'accessing') ----- + argsForAccessorChainComputation + | argsForAccessorChainComputation | + (receiver isNil and: [parmSpecs isNil]) ifTrue: + [^super argsForAccessorChainComputation]. + + argsForAccessorChainComputation := OrderedCollection new. + receiver ifNotNil: + [argsForAccessorChainComputation addLast: receiver]. + argsForAccessorChainComputation addAllLast: fullArgs. + ^argsForAccessorChainComputation! Item was added: + ----- Method: TMethod>>argsForAccessorChainComputation (in category 'accessing') ----- + argsForAccessorChainComputation + "The arguments of this method." + + ^self args! Item was added: + ----- Method: VMPluginCodeGenerator>>isStackAccessor:given: (in category 'spur primitive compilation') ----- + isStackAccessor: selector given: interpreterClass + ^(interpreterClass isStackAccessor: selector) + or: [pluginClass isStackAccessor: selector] + !

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VM Maker: VMMaker.oscog-eem.3218.mcz
by commits＠source.squeak.org 24 Jul '22

24 Jul '22

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.3218.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.3218 Author: eem Time: 23 July 2022, 7:19:39.045502 pm UUID: 7674c9a8-b612-4cd3-b49c-96fc53f0f0c6 Ancestors: VMMaker.oscog-eem.3217 Merge VMMaker.oscog-KenD.3218. Implement what I think Ken wants for ThreadedRiscV64FFIPlugin>>ffiCalloutTo:SpecOnStack:in:, i.e. to treat float & double differently from the array of float/double. =============== Diff against VMMaker.oscog-eem.3217 =============== Item was added: + ----- Method: ThreadedRiscV64FFIPlugin>>ffiCalloutTo:SpecOnStack:in: (in category 'callout support') ----- + ffiCalloutTo: procAddr SpecOnStack: specOnStack in: calloutState + <var: #procAddr type: #'void *'> + <var: #calloutState type: #'CalloutState *'> + <var: #loadFloatRegs declareC: 'extern void loadFloatRegs(double, double, double, double, double, double, double, double)'> + "Go out, call this guy and create the return value. This *must* be inlined because of + the alloca of the outgoing stack frame in ffiCall:WithFlags:NumArgs:Args:AndTypes:" + | myThreadIndex atomicType floatRet intRet structRet specSize | + <var: #doubleRet type: #double> + <var: #floatRet type: 'union { struct { float floats[8]; } f; struct dprr { double doubles[4]; } d; }'> + <var: #structRet type: #SixteenByteReturnII> + <var: #intRet type: #usqLong> + <inline: #always> + self cCode: [] inSmalltalk: [floatRet := ByteArray new: 32]. "Just a hack to placate the Smalltalk compiler; these should be proper struct types..." + myThreadIndex := interpreterProxy disownVM: (self disownFlagsFor: calloutState). + + calloutState floatRegisterIndex > 0 ifTrue: + [self loadFloatRegs: + (calloutState floatRegisters at: 0) + _: (calloutState floatRegisters at: 1) + _: (calloutState floatRegisters at: 2) + _: (calloutState floatRegisters at: 3) + _: (calloutState floatRegisters at: 4) + _: (calloutState floatRegisters at: 5) + _: (calloutState floatRegisters at: 6) + _: (calloutState floatRegisters at: 7)]. + + (self allocaLiesSoSetSpBeforeCall or: [self mustAlignStack]) ifTrue: + [self setsp: calloutState argVector]. + + "float or double returns" + atomicType := self atomicTypeOf: calloutState ffiRetHeader. + (atomicType >> 1) = (FFITypeSingleFloat >> 1) ifTrue: + [| doubleRet | + atomicType = FFITypeDoubleFloat ifTrue: + [doubleRet := (self + dispatchFunctionPointer: (self cCoerceSimple: procAddr to: 'double (*)(sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t)') + with: (calloutState integerRegisters at: 0) + with: (calloutState integerRegisters at: 1) + with: (calloutState integerRegisters at: 2) + with: (calloutState integerRegisters at: 3) + with: (calloutState integerRegisters at: 4) + with: (calloutState integerRegisters at: 5) + with: (calloutState integerRegisters at: 6) + with: (calloutState integerRegisters at: 7))] + ifFalse: + [doubleRet := (self + dispatchFunctionPointer: (self cCoerceSimple: procAddr to: 'float (*)(sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t)') + with: (calloutState integerRegisters at: 0) + with: (calloutState integerRegisters at: 1) + with: (calloutState integerRegisters at: 2) + with: (calloutState integerRegisters at: 3) + with: (calloutState integerRegisters at: 4) + with: (calloutState integerRegisters at: 5) + with: (calloutState integerRegisters at: 6) + with: (calloutState integerRegisters at: 7))]. + "undo any callee argument pops because it may confuse stack management with the alloca." + (self isCalleePopsConvention: calloutState callFlags) ifTrue: + [self setsp: calloutState argVector]. + interpreterProxy ownVM: myThreadIndex. + ^self floatObjectOf: doubleRet]. + + "homogenous array of float/double returns" + ((calloutState ffiRetHeader bitAnd: FFIFlagPointer+FFIFlagStructure) = FFIFlagStructure + and: [self structIsHomogenousFloatArrayOfSize: (calloutState ffiRetHeader bitAnd: FFIStructSizeMask) + typeSpec: (self cCoerce: (interpreterProxy firstIndexableField: calloutState ffiRetSpec) to: #'unsigned int *') + ofLength: (specSize := interpreterProxy byteSizeOf: calloutState ffiRetSpec) / (self sizeof: #'unsigned int')]) ifTrue: + [floatRet d: (self + dispatchFunctionPointer: (self cCoerceSimple: procAddr to: 'struct dprr (*)(sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t)') + with: (calloutState integerRegisters at: 0) + with: (calloutState integerRegisters at: 1) + with: (calloutState integerRegisters at: 2) + with: (calloutState integerRegisters at: 3) + with: (calloutState integerRegisters at: 4) + with: (calloutState integerRegisters at: 5) + with: (calloutState integerRegisters at: 6) + with: (calloutState integerRegisters at: 7)). + + "undo any callee argument pops because it may confuse stack management with the alloca." + (self isCalleePopsConvention: calloutState callFlags) ifTrue: + [self setsp: calloutState argVector]. + interpreterProxy ownVM: myThreadIndex. + + "If the struct is a vector of floats then move float[2] to float[1], float[4] to float[2] and float[6] to float[3], + to pack the float data in the double fields. We can tell if the struct is composed of floats if its size is less + than the spec size, since the spec size is (1 + n fields) * 4 bytes, and the struct size is n fields * 4 bytes + for floats and n fields * 8 bytes for doubles. We can't access the spec post call because it may have moved." + specSize > calloutState structReturnSize ifTrue: + [floatRet f floats at: 1 put: (floatRet f floats at: 2). + floatRet f floats at: 2 put: (floatRet f floats at: 4). + floatRet f floats at: 3 put: (floatRet f floats at: 6)]. + ^self ffiReturnStruct: (self addressOf: floatRet) ofType: (self ffiReturnType: specOnStack) in: calloutState]. + + "Integer and Structure returns..." + (self mustReturnStructOnStack: calloutState structReturnSize) + ifTrue: + [intRet := 0. + self setReturnRegister: (self cCoerceSimple: calloutState limit to: #sqLong) "stack alloca'd struct" + andCall: (self cCoerceSimple: procAddr to: #sqLong) + withArgsArray: (self cCoerceSimple: (self addressOf: calloutState integerRegisters) to: #sqLong)] + ifFalse: + [structRet := self + dispatchFunctionPointer: (self cCoerceSimple: procAddr to: 'SixteenByteReturnII (*)(sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t, sqIntptr_t)') + with: (calloutState integerRegisters at: 0) + with: (calloutState integerRegisters at: 1) + with: (calloutState integerRegisters at: 2) + with: (calloutState integerRegisters at: 3) + with: (calloutState integerRegisters at: 4) + with: (calloutState integerRegisters at: 5) + with: (calloutState integerRegisters at: 6) + with: (calloutState integerRegisters at: 7). + intRet := structRet a]. "X1" + + "undo any callee argument pops because it may confuse stack management with the alloca." + (self isCalleePopsConvention: calloutState callFlags) ifTrue: + [self setsp: calloutState argVector]. + interpreterProxy ownVM: myThreadIndex. + + (calloutState ffiRetHeader anyMask: FFIFlagPointer+FFIFlagStructure) ifTrue: + ["Note: Order is important here since FFIFlagPointer + FFIFlagStructure is used to represent + 'typedef void* VoidPointer' and VoidPointer must be returned as pointer *not* as struct." + (calloutState ffiRetHeader anyMask: FFIFlagPointer) ifTrue: + [^self ffiReturnPointer: intRet ofType: (self ffiReturnType: specOnStack) in: calloutState]. + ^self ffiReturnStruct: (((self returnStructInRegisters: calloutState) + ifTrue: [self cCoerceSimple: (self addressOf: structRet) to: #'char *'] + ifFalse: [calloutState limit])) + ofType: (self ffiReturnType: specOnStack) + in: calloutState]. + + ^self ffiCreateIntegralResultOop: intRet ofAtomicType: atomicType in: calloutState! Item was changed: ----- Method: ThreadedRiscV64FFIPlugin>>ffiPushFloat32:in: (in category 'marshalling') ----- ffiPushFloat32: value in: calloutState <var: #value type: #float> <var: #calloutState type: #'CalloutState *'> <inline: #always> "N.B. the RISCV ABI states that unused part should be -1, [RISC-V Instruction Set Manual - Volume I: User Level ISA, 12.2 NaN Boxing of Narrower Value" calloutState floatRegisterIndex < NumFloatRegArgs ifTrue: "Note: this is a 'memcopy', so size is preserved. Casting to #double changes the size" [(self cCoerceSimple: (self addressOf: (calloutState floatRegisters at: calloutState floatRegisterIndex)) to: #'long *') at: 0 put: -1. (self cCoerceSimple: (self addressOf: (calloutState floatRegisters at: calloutState floatRegisterIndex)) to: #'float *') at: 0 put: value. + calloutState floatRegisterIndex: calloutState floatRegisterIndex + 1 + ] + ifFalse: "Use integer register if available" + [ (calloutState integerRegisterIndex < NumIntRegArgs) + ifTrue: + [calloutState integerRegisters + at: calloutState integerRegisterIndex + put: -1. + self storeSingleFloatAtPointer: (self addressOf: (calloutState integerRegisters at: calloutState integerRegisterIndex)) + from: value. + calloutState integerRegisterIndex: calloutState integerRegisterIndex + 1 + ] + ifFalse: + [calloutState currentArg + self wordSize > calloutState limit ifTrue: [^FFIErrorCallFrameTooBig]. + interpreterProxy longAt: calloutState currentArg put: value. + calloutState currentArg: calloutState currentArg + self wordSize + ]. + ]. - calloutState floatRegisterIndex: calloutState floatRegisterIndex + 1] - ifFalse: - [calloutState currentArg + self wordSize > calloutState limit ifTrue: - [^FFIErrorCallFrameTooBig]. - interpreterProxy - longAt: calloutState currentArg put: -1; - storeSingleFloatAtPointer: calloutState currentArg from: value. - calloutState currentArg: calloutState currentArg + self wordSize]. ^0! Item was added: + ----- Method: ThreadedRiscV64FFIPlugin>>ffiPushFloat64:in: (in category 'marshalling') ----- + ffiPushFloat64: value in: calloutState + <var: #value type: #double> + <var: #calloutState type: #'CalloutState *'> + <inline: #always> + + calloutState floatRegisterIndex < NumFloatRegArgs + ifTrue: + [calloutState floatRegisters + at: calloutState floatRegisterIndex + put: value. + calloutState floatRegisterIndex: calloutState floatRegisterIndex + 1 + ] + ifFalse: "Use integer register if available" + [(calloutState integerRegisterIndex < NumIntRegArgs) + ifTrue: [ + self storeFloatAtPointer: (self addressOf: (calloutState integerRegisters at: calloutState integerRegisterIndex)) + from: value. + calloutState integerRegisterIndex: calloutState integerRegisterIndex + 1 + ] + ifFalse: [ + calloutState currentArg + self wordSize > calloutState limit ifTrue: [^FFIErrorCallFrameTooBig]. + interpreterProxy longAt: calloutState currentArg put: value. + calloutState currentArg: calloutState currentArg + self wordSize + ] + ]. + ^0!

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VM Maker Inbox: VMMaker.oscog-KenD.3218.mcz
by commits＠source.squeak.org 24 Jul '22

24 Jul '22

A new version of VMMaker was added to project VM Maker Inbox: http://source.squeak.org/VMMakerInbox/VMMaker.oscog-KenD.3218.mcz ==================== Summary ==================== Name: VMMaker.oscog-KenD.3218 Author: KenD Time: 23 July 2022, 5:57:39.531648 pm UUID: 76a9d964-998d-4192-9b1b-f69265cdd95f Ancestors: VMMaker.oscog-eem.3217 Port to RiscV64/RV64gcv Note: ThreadedARM64FFIPlugin currently requires after-codegen float/double flow split =============== Diff against VMMaker.oscog-eem.3217 =============== Item was changed: CogAbstractInstruction subclass: #CogARMv8Compiler instanceVariableNames: '' + classVariableNames: 'AL ArithmeticAdd ArithmeticAddS ArithmeticSub ArithmeticSubS CASAL CArg0Reg CArg1Reg CArg2Reg CArg3Reg CArg4Reg CArg5Reg CArg6Reg CBNZ CBZ CC CCMPNE CLREX CS CSET D0 D1 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D2 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D3 D30 D31 D4 D5 D6 D7 D8 D9 DC DC_CISW DC_CIVAC DC_CSW DC_CVAC DC_CVAU DC_ISW DC_IVAC DC_ZVA DMB DSB DSB_ALL DSB_ALLSY DSB_ISH DSB_NSH DSB_OSH DSB_READS DSB_SY DSB_WRITES DivRRR EQ FP GE GT HI IC IC_IALLU IC_IALLUIS IC_IVAU ISB LDAXR LE LR LS LT LogicalAnd LogicalAndS LogicalOr LogicalXor MI MRS_CTR_EL0 MRS_ID_AA64ISAR0_EL1 MSubRRR MoveAwRR MoveRRAw MulOverflowRRR MulRRR NE NativePopRR NativePushRR PJWPNChange PJWPNClear PJWPNSet PJWPNState PL R0 R1 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R2 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29 R3 R30 R31 R4 R5 R6 R7 R8 R9 SMULHRRR SP STLR STLXR SXTB SXTH SXTW SXTX UXTB UXTH UXTW UXTX VC VS XZR' - classVariableNames: 'AL ArithmeticAdd ArithmeticAddS ArithmeticSub ArithmeticSubS CASAL CArg0Reg CArg1Reg CArg2Reg CArg3Reg CArg4Reg CArg5Reg CArg6Reg CBNZ CBZ CC CCMPNE CLREX CS CSET D0 D1 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D2 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D3 D30 D31 D4 D5 D6 D7 D8 D9 DC DC_CISW DC_CIVAC DC_CSW DC_CVAC DC_CVAU DC_ISW DC_IVAC DC_ZVA DMB DSB DSB_ALL DSB_ALLSY DSB_ISH DSB_NSH DSB_OSH DSB_READS DSB_SY DSB_WRITES DataCacheFlushRequired DataCacheLineLength DivRRR EQ FP GE GT HI HasAtomicInstructions IC IC_IALLU IC_IALLUIS IC_IVAU ISB InstructionCacheFlushRequired InstructionCacheLineLength LDAXR LE LR LS LT LogicalAnd LogicalAndS LogicalOr LogicalXor MI MRS_CTR_EL0 MRS_ID_AA64ISAR0_EL1 MSubRRR MoveAwRR MoveRRAw MulOverflowRRR MulRRR NE NativePopRR NativePushRR PJWPNChange PJWPNClear PJWPNSet PJWPNState PL R0 R1 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R2 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29 R3 R30 R31 R4 R5 R6 R7 R8 R9 SMULHRRR SP STLR STLXR SXTB SXTH SXTW SXTX UXTB UXTH UXTW UXTX VC VS XZR' poolDictionaries: 'ARMv8A64Opcodes' category: 'VMMaker-JIT'! !CogARMv8Compiler commentStamp: 'eem 1/7/2021 23:01' prior: 0! I generate ARMv8 machine code instructions from CogAbstractInstructions with CogRTLOpcodes. Here in "Arm ARM" refers to Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-ma… Some things to know about ARMv8 instructions: Whether 31 in a register field implies the zero register or the SP register(s) depends on the specific instruction. C3.2.1 Load/Store register If a Load instruction specifies writeback and the register being loaded is also the base register, then behavior is CONSTRAINED UNPREDICTABLE and one of the following behaviors must occur: - The instruction is treated as UNDEFINED. - The instruction is treated as a NOP. - The instruction performs the load using the specified addressing mode and the base register becomes UNKNOWN. In addition, if an exception occurs during the execution of such an instruction, the base address might be corrupted so that the instruction cannot be repeated. If a Store instruction performs a writeback and the register that is stored is also the base register, then behavior is CONSTRAINED UNPREDICTABLE and one of the following behaviors must occur: - The instruction is treated as UNDEFINED. - The instruction is treated as a NOP. - The instruction performs the store to the designated register using the specified addressing mode, but the value stored is UNKNOWN.! Item was changed: ----- Method: CogSistaMethodSurrogate32>>counters: (in category 'accessing generated') ----- counters: aValue | index delta | index := address + 20 + baseHeaderSize. (delta := cogit getCodeToDataDelta) > 0 ifTrue: [self assert: (cogit addressIsInCodeZone: address - delta). objectMemory long32At: index - delta + put: aValue]. - put: ((aValue ifNotNil: [aValue asUnsignedInteger] ifNil: [0]))]. ^objectMemory long32At: index + put: aValue! - put: ((aValue ifNotNil: [aValue asUnsignedInteger] ifNil: [0]))! Item was changed: ----- Method: CogSistaMethodSurrogate64>>counters: (in category 'accessing generated') ----- counters: aValue | index delta | index := address + 32 + baseHeaderSize. (delta := cogit getCodeToDataDelta) > 0 ifTrue: [self assert: (cogit addressIsInCodeZone: address - delta). objectMemory long64At: index - delta + put: aValue]. - put: ((aValue ifNotNil: [aValue asUnsignedInteger] ifNil: [0]))]. ^objectMemory long64At: index + put: aValue! - put: ((aValue ifNotNil: [aValue asUnsignedInteger] ifNil: [0]))! Item was changed: ----- Method: ThreadedRiscV64FFIPlugin>>ffiPushFloat32:in: (in category 'marshalling') ----- ffiPushFloat32: value in: calloutState <var: #value type: #float> <var: #calloutState type: #'CalloutState *'> <inline: #always> "N.B. the RISCV ABI states that unused part should be -1, [RISC-V Instruction Set Manual - Volume I: User Level ISA, 12.2 NaN Boxing of Narrower Value" calloutState floatRegisterIndex < NumFloatRegArgs ifTrue: "Note: this is a 'memcopy', so size is preserved. Casting to #double changes the size" [(self cCoerceSimple: (self addressOf: (calloutState floatRegisters at: calloutState floatRegisterIndex)) to: #'long *') at: 0 put: -1. (self cCoerceSimple: (self addressOf: (calloutState floatRegisters at: calloutState floatRegisterIndex)) to: #'float *') at: 0 put: value. + calloutState floatRegisterIndex: calloutState floatRegisterIndex + 1 + ] + ifFalse: "Use integer register if available" + [ (calloutState integerRegisterIndex < NumIntRegArgs) + ifTrue: + [calloutState integerRegisters + at: calloutState integerRegisterIndex + put: -1. + self storeSingleFloatAtPointer: (self addressOf: (calloutState integerRegisters at: calloutState integerRegisterIndex)) + from: value. + calloutState integerRegisterIndex: calloutState integerRegisterIndex + 1 + ] + ifFalse: + [calloutState currentArg + self wordSize > calloutState limit ifTrue: [^FFIErrorCallFrameTooBig]. + interpreterProxy longAt: calloutState currentArg put: value. + calloutState currentArg: calloutState currentArg + self wordSize + ]. + ]. - calloutState floatRegisterIndex: calloutState floatRegisterIndex + 1] - ifFalse: - [calloutState currentArg + self wordSize > calloutState limit ifTrue: - [^FFIErrorCallFrameTooBig]. - interpreterProxy - longAt: calloutState currentArg put: -1; - storeSingleFloatAtPointer: calloutState currentArg from: value. - calloutState currentArg: calloutState currentArg + self wordSize]. ^0! Item was added: + ----- Method: ThreadedRiscV64FFIPlugin>>ffiPushFloat64:in: (in category 'marshalling') ----- + ffiPushFloat64: value in: calloutState + <var: #value type: #double> + <var: #calloutState type: #'CalloutState *'> + <inline: #always> + + calloutState floatRegisterIndex < NumFloatRegArgs + ifTrue: + [calloutState floatRegisters + at: calloutState floatRegisterIndex + put: value. + calloutState floatRegisterIndex: calloutState floatRegisterIndex + 1 + ] + ifFalse: "Use integer register if available" + [(calloutState integerRegisterIndex < NumIntRegArgs) + ifTrue: [ + self storeFloatAtPointer: (self addressOf: (calloutState integerRegisters at: calloutState integerRegisterIndex)) + from: value. + calloutState integerRegisterIndex: calloutState integerRegisterIndex + 1 + ] + ifFalse: [ + calloutState currentArg + self wordSize > calloutState limit ifTrue: [^FFIErrorCallFrameTooBig]. + interpreterProxy longAt: calloutState currentArg put: value. + calloutState currentArg: calloutState currentArg + self wordSize + ] + ]. + ^0! Item was added: + ----- Method: ThreadedRiscV64FFIPlugin>>numFloatRegArgs (in category 'accessing') ----- + numFloatRegArgs + + ^NumFloatRegArgs! Item was added: + ----- Method: ThreadedRiscV64FFIPlugin>>numIntRegArgs (in category 'accessing') ----- + numIntRegArgs + + ^NumIntRegArgs!

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[OpenSmalltalk/opensmalltalk-vm] 0e2502: Revert the build scripts to the old syntax. This w...
by Eliot Miranda 23 Jul '22

23 Jul '22

Branch: refs/heads/Cog Home: https://github.com/OpenSmalltalk/opensmalltalk-vm Commit: 0e25028de88a660ae9e517be2086a3c7eac4f34c https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/0e25028de88a660ae9… Author: Eliot Miranda <eliot.miranda(a)gmail.com> Date: 2022-07-22 (Fri, 22 Jul 2022) Changed paths: M image/buildsistareader64image.sh M image/buildsistareaderimage.sh M image/buildspurtrunk64image.sh M image/buildspurtrunkreader64image.sh M image/buildspurtrunkreaderimage.sh M image/buildspurtrunkvmmaker64image.sh M image/buildspurtrunkvmmakerimage.sh M image/getGoodSpur64VM.sh M image/getlatesttrunk64image.sh M image/getlatesttrunkimage.sh M image/updatespur64SistaV1image.sh M image/updatespur64image.sh M image/updatespurimage.sh M image/updatevmmakerimage.sh Log Message: ----------- Revert the build scripts to the old syntax. This works again. Alas in Squeak6 every launch of an image with a script on MacOS creates a Note stating that a second instance can't be created. No idea where this is coming from. But I fear it may be my fault trying to support Virtend launch events.

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[OpenSmalltalk/opensmalltalk-vm] Fix to RiscV64 mvm slip (1 line deletion) (PR #645)
by Ken Dickey 22 Jul '22

22 Jul '22

Current opensmalltalk-vm builds & tested fine on RiscV64 with the 1 line elision in /building/linux64riscv/squeak.stack.spur/build/mvm Sorry about the slip. You can view, comment on, or merge this pull request online at: https://github.com/OpenSmalltalk/opensmalltalk-vm/pull/645 -- Commit Summary -- * corrected slip * Merge branch 'OpenSmalltalk:Cog' into Cog -- File Changes -- M building/linux64riscv/squeak.stack.spur/build/mvm (1) -- Patch Links -- https://github.com/OpenSmalltalk/opensmalltalk-vm/pull/645.patch https://github.com/OpenSmalltalk/opensmalltalk-vm/pull/645.diff -- Reply to this email directly or view it on GitHub: https://github.com/OpenSmalltalk/opensmalltalk-vm/pull/645 You are receiving this because you are subscribed to this thread. Message ID: <OpenSmalltalk/opensmalltalk-vm/pull/645(a)github.com>

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[OpenSmalltalk/opensmalltalk-vm] 616a6f: re-merge riscv w current
by Eliot Miranda 22 Jul '22

22 Jul '22

Branch: refs/heads/Cog Home: https://github.com/OpenSmalltalk/opensmalltalk-vm Commit: 616a6fdc681834485d1b07f7ffdbf2cbfd4b4b0b https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/616a6fdc681834485d… Author: KenDickey <Ken.Dickey(a)Whidbey.COM> Date: 2022-07-21 (Thu, 21 Jul 2022) Changed paths: A building/linux64riscv/LicheePiHow2.txt A building/linux64riscv/RiscV64ForVMMaker.tgz A building/linux64riscv/squeak.stack.spur/build.assert/mvm A building/linux64riscv/squeak.stack.spur/build.debug/mvm A building/linux64riscv/squeak.stack.spur/build/mvm A building/linux64riscv/squeak.stack.spur/plugins.ext A building/linux64riscv/squeak.stack.spur/plugins.int A platforms/Cross/plugins/IA32ABI/riscv64abicc.c M platforms/Cross/plugins/IA32ABI/xabicc.c M platforms/Cross/vm/sqCogStackAlignment.h M src/plugins/SqueakFFIPrims/RiscV64FFIPlugin.c Log Message: ----------- re-merge riscv w current Commit: f1657060f7fe34ed30de5dca52dbfbcdc9a20382 https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/f1657060f7fe34ed30… Author: KenDickey <Ken.Dickey(a)Whidbey.COM> Date: 2022-07-21 (Thu, 21 Jul 2022) Changed paths: M building/linux64riscv/squeak.stack.spur/build/mvm M platforms/Cross/plugins/IA32ABI/ia32abi.h M platforms/Cross/plugins/IA32ABI/riscv64abicc.c M platforms/unix/config/configure M platforms/unix/vm/include_ucontext.h M platforms/unix/vm/sqUnixHeartbeat.c M platforms/unix/vm/sqUnixITimerHeartbeat.c M platforms/unix/vm/sqUnixITimerTickerHeartbeat.c Log Message: ----------- re-integrate w main Commit: 5218e4f6d2c6b501a967085e223143f76f43ab4a https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/5218e4f6d2c6b501a9… Author: Eliot Miranda <eliot.miranda(a)gmail.com> Date: 2022-07-22 (Fri, 22 Jul 2022) Changed paths: A building/linux64riscv/LicheePiHow2.txt A building/linux64riscv/RiscV64ForVMMaker.tgz A building/linux64riscv/squeak.stack.spur/build.assert/mvm A building/linux64riscv/squeak.stack.spur/build.debug/mvm A building/linux64riscv/squeak.stack.spur/build/mvm A building/linux64riscv/squeak.stack.spur/plugins.ext A building/linux64riscv/squeak.stack.spur/plugins.int M platforms/Cross/plugins/IA32ABI/ia32abi.h A platforms/Cross/plugins/IA32ABI/riscv64abicc.c M platforms/Cross/plugins/IA32ABI/xabicc.c M platforms/Cross/vm/sqCogStackAlignment.h M platforms/unix/config/configure M platforms/unix/vm/include_ucontext.h M platforms/unix/vm/sqUnixHeartbeat.c M platforms/unix/vm/sqUnixITimerHeartbeat.c M platforms/unix/vm/sqUnixITimerTickerHeartbeat.c M src/plugins/SqueakFFIPrims/RiscV64FFIPlugin.c Log Message: ----------- Merge pull request #644 from KenDickey/Cog Riscv64/rv64gcv Compare: https://github.com/OpenSmalltalk/opensmalltalk-vm/compare/e57b40e769d9...52…

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[OpenSmalltalk/opensmalltalk-vm] Riscv64/rv64gcv (PR #644)
by Ken Dickey 22 Jul '22

22 Jul '22

Both X11 and Framebuffer displays work with Cuis and Squeak images on Debian Linux. Cuis FFI and BaseImage unit tests all green. Good time to integrate w current before things get out of sync due to high commit rate to opensmalltalk-vm git base. Notes: - LicheeRV Dock HW notes and VMMaker delta St files in /building/linux64riscv - Generated /src/plugins/SqueakFFIPrims/RiscV64FFIPlugin.c has been hand altered from VMMaker generated code to split float & double return callouts as I lack the deep knowledge to setup the code generation for ffiCallArgArrayOrNilNumArgs(). Code runs fine as altered. - While base images run fine, including Vector Graphics, there is a CRC error when reading PNG files which is under investigation. On balance, I would prefer to integrate now and handle this separately. You can view, comment on, or merge this pull request online at: https://github.com/OpenSmalltalk/opensmalltalk-vm/pull/644 -- Commit Summary -- * re-merge riscv w current * re-integrate w main -- File Changes -- A building/linux64riscv/LicheePiHow2.txt (152) A building/linux64riscv/RiscV64ForVMMaker.tgz (0) A building/linux64riscv/squeak.stack.spur/build.assert/mvm (32) A building/linux64riscv/squeak.stack.spur/build.debug/mvm (35) A building/linux64riscv/squeak.stack.spur/build/mvm (33) A building/linux64riscv/squeak.stack.spur/plugins.ext (20) A building/linux64riscv/squeak.stack.spur/plugins.int (37) M platforms/Cross/plugins/IA32ABI/ia32abi.h (7) A platforms/Cross/plugins/IA32ABI/riscv64abicc.c (373) M platforms/Cross/plugins/IA32ABI/xabicc.c (2) M platforms/Cross/vm/sqCogStackAlignment.h (10) M platforms/unix/config/configure (4) M platforms/unix/vm/include_ucontext.h (4) M platforms/unix/vm/sqUnixHeartbeat.c (2) M platforms/unix/vm/sqUnixITimerHeartbeat.c (2) M platforms/unix/vm/sqUnixITimerTickerHeartbeat.c (2) M src/plugins/SqueakFFIPrims/RiscV64FFIPlugin.c (180) -- Patch Links -- https://github.com/OpenSmalltalk/opensmalltalk-vm/pull/644.patch https://github.com/OpenSmalltalk/opensmalltalk-vm/pull/644.diff -- Reply to this email directly or view it on GitHub: https://github.com/OpenSmalltalk/opensmalltalk-vm/pull/644 You are receiving this because you are subscribed to this thread. Message ID: <OpenSmalltalk/opensmalltalk-vm/pull/644(a)github.com>

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Vm-dev July 2022