Vm-dev July 2012

vm-dev@lists.squeakfoundation.org

20 participants
62 discussions

Pharo 1.4 "Summer" released!
by Esteban Lorenzano 19 Jul '12

19 Jul '12

We are proud to announce the summer release of Pharo 1.4! You can find information about Pharo at: http://www.pharo-project.org About this release. We integrated 30 fixes (the rounded number is completely casual) and integrated some tools that users feedback showed as necessary, specially the inclusion of OmniBrowser as part of the core for 1.4. As a result of all this changes and fixes, the stability of this version is a lot better and we are really happy with it. Structural changes to the image: - Backport configurations browser from 2.0. This will easy the loading of packages for everybody, specially newcomers. - Integrated ProfStef. Again, useful for newcomers. - Integrated Spotlight. Easy to find classes and methods. - Integrated OmniBrowser. Nautilus will wait to 2.0 to be core, but it is still loadable. - Integrated Keymapping. This is in fact a sub-product of the inclusion of Spotlight, but the framework is powerful and it deserves its inclusion too :) - Updated Zinc to latest version. Complete list of bugs fixed: - 5665: bug on new ecompletion/ocompletion, http://code.google.com/p/pharo/issues/detail?id=5665 - 5773: Have access to the original event in PLuggableButtonMorph, http://code.google.com/p/pharo/issues/detail?id=5773 - 5584: File Browser not recognizing cs and st if filename has more than one point, http://code.google.com/p/pharo/issues/detail?id=5584 - 5667: Renaming a file just deletes it due to missing #fileNameFromFormattedItem:, http://code.google.com/p/pharo/issues/detail?id=5667 - 5445: Broken command-line arguments in 1.4, http://code.google.com/p/pharo/issues/detail?id=5445 - 5679: Removing a trait does not remove trait methods from class, http://code.google.com/p/pharo/issues/detail?id=5679 - 5722: Be able to remove traits from class definition, http://code.google.com/p/pharo/issues/detail?id=5722 - 5858: DateAndTime >>#hash, http://code.google.com/p/pharo/issues/detail?id=5858 - 5833: More robust allSuperclassesIncluding:, http://code.google.com/p/pharo/issues/detail?id=5833 - 5966: DropListMorph do not pop the list when the text field is clicked, http://code.google.com/p/pharo/issues/detail?id=5966 - 5627: "MessageNotUnderstood: receiver of "displayWorld" is nil" on clicking the red Menu-Halo., http://code.google.com/p/pharo/issues/detail?id=5627 - 5742: BallonMorph shows flyover help using an extra line, http://code.google.com/p/pharo/issues/detail?id=5742 - 6150: During snapshot: Send cr after Transcript message for 1.4, http://code.google.com/p/pharo/issues/detail?id=6150 - 6147: Code completion in all tools for 1.4, http://code.google.com/p/pharo/issues/detail?id=6147 - 6189: [BUG]: Port to Pharo 1.4 - stdin hangs until EOF, http://code.google.com/p/pharo/issues/detail?id=6189 - 6143: MIME decoding and Unicode not working, http://code.google.com/p/pharo/issues/detail?id=6143 - 6188: [BUG]: (1.4) Put back the correct order in #asert:equals:, http://code.google.com/p/pharo/issues/detail?id=6188 - 6187: [Bug]: (1.4) Mouse down events are being processed twice, http://code.google.com/p/pharo/issues/detail?id=6187 - 6117: SimplifiedChineseEnvironment should implement leadingChar, http://code.google.com/p/pharo/issues/detail?id=6117 - 6082: Missed translated selector for the dialog title in the ColorChooserMorph, http://code.google.com/p/pharo/issues/detail?id=6082 - 6231: FileList revert, http://code.google.com/p/pharo/issues/detail?id=6231 - 6303: [BUG]: Completion DNU in Inspector/Object Explorer for 1.4, http://code.google.com/p/pharo/issues/detail?id=6303 - 6305: StartupPreferences "run once" broken, http://code.google.com/p/pharo/issues/detail?id=6305 - 6324: For Pharo 1.4 disable StartupPreferences only for Windows, http://code.google.com/p/pharo/issues/detail?id=6324 - 6313: failing test: MorphicTests.Event.EventHandlerTest.testKeyStrokeFromMorph, http://code.google.com/p/pharo/issues/detail?id=6313 - 6352: StartupPreferences loads non-st files in 1.4, http://code.google.com/p/pharo/issues/detail?id=6352, , - 6373: Add #version to OSPlatform, http://code.google.com/p/pharo/issues/detail?id=6373 - 6366: [Bug]: In 1.4, Finder UI DNU guessTypeByName:, http://code.google.com/p/pharo/issues/detail?id=6366 - 6343: move Windows on screen should take in account the task bar, http://code.google.com/p/pharo/issues/detail?id=6343 - 6386: [BUG]: [1.4]: New ProcessSpecificVariables & Running Processes, http://code.google.com/p/pharo/issues/detail?id=6386 Not bad, isn't? Thanks a lot to all who contributed with fixes, reports and suggestions. The Pharo Team

3 2

Request: VM support for opening browser
by Torsten Bergmann 19 Jul '12

19 Jul '12

In the days of web based applications and Smalltalk web frameworks etc. it is often very usefull to open a browser/URL from within Smalltalk. Currently one has to load FFI and ExternalWebBrowser package. Why not add support into the VM for that. This would allow us: - provide a link to the homepage of Squeak and Pharo in the about box so people can easy access it right from the image - to give Seaside/Pier/Iliad/Aida served images a button that opens the browser to the served sites - server an html based "Help system" from the image and by choosing "Help" from the menu open it - ... On Windows it is just a ShellExecute API call - dont know about the other platforms. Is it possible that VM developers agree on a common protocol and provide it in the next VM release cycle? Any comments? Thx T.

5 9

VM Maker: VMMaker.oscog-eem.187.mcz
by commits＠source.squeak.org 19 Jul '12

19 Jul '12

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.187.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.187 Author: eem Time: 18 July 2012, 5:34:45.179 pm UUID: c8ef3fdf-8bac-484b-95c4-7234902bc88f Ancestors: VMMaker.oscog-eem.186 Allow the opts dictionary to select the CogAbstractCompiler class. Use cCode:inSmalltalk: to collapse the integerObjectOf: & isIntegerValue: implementations down to a few. =============== Diff against VMMaker.oscog-eem.186 =============== Item was changed: ----- Method: CogAbstractInstruction class>>instVarNamesAndTypesForTranslationDo: (in category 'translation') ----- instVarNamesAndTypesForTranslationDo: aBinaryBlock "enumerate aBinaryBlock with the names and C type strings for the inst vars to include in an AbstractInstruction struct." "CogIA32Compiler printTypedefOn: Transcript" "CogARMCompiler printTypedefOn: Transcript" + | machineCodeBytes | + machineCodeBytes := self == CogAbstractInstruction + ifTrue: [0] + ifFalse: [Cogit cogCompilerClass basicNew machineCodeBytes]. self filteredInstVarNames do: [:ivn| ivn ~= 'bcpc' ifTrue: [aBinaryBlock value: ivn value: (ivn caseOf: { ['address'] -> ['unsigned long']. + ['machineCode'] -> [{'unsigned char'. '[', machineCodeBytes printString, ']'}]. - ['machineCode'] -> [{'unsigned char'. '[', self basicNew machineCodeBytes printString, ']'}]. ['operands'] -> [#('unsigned long' '[3]')]. ['dependent'] -> ['struct _AbstractInstruction *']} otherwise: [#char])]]! Item was changed: ----- Method: CogVMSimulator class>>chooseAndInitCogitClassWithOpts: (in category 'instance creation') ----- chooseAndInitCogitClassWithOpts: opts + | classOrSymbol | + classOrSymbol := opts at: #Cogit ifAbsent: [Cogit chooseCogitClass]. + classOrSymbol isSymbol ifTrue: + [classOrSymbol := Smalltalk classNamed: classOrSymbol]. + (CoInterpreter classPool at: #CogitClass put: (classOrSymbol)) initializeWithOptions: opts! - (CoInterpreter classPool - at: #CogitClass - put: Cogit chooseCogitClass) - initializeWithOptions: opts! Item was removed: - ----- Method: CogVMSimulator>>integerObjectOf: (in category 'memory access') ----- - integerObjectOf: value - "The simulator works with strictly positive bit patterns" - value < 0 - ifTrue: [^ ((16r80000000 + value) << 1) + 1] - ifFalse: [^ (value << 1) + 1]! Item was removed: - ----- Method: CogVMSimulator>>isIntegerValue: (in category 'interpreter shell') ----- - isIntegerValue: valueWord - ^ valueWord >= 16r-40000000 and: [valueWord <= 16r3FFFFFFF]! Item was added: + ----- Method: Cogit class>>cogCompilerClass (in category 'accessing') ----- + cogCompilerClass + "Answer the concrete subclass of CogAbstractCompiler in current use." + ^ProcessorClass basicNew abstractInstructionCompilerClass! Item was removed: - ----- Method: InterpreterSimulator>>integerObjectOf: (in category 'memory access') ----- - integerObjectOf: value - "The simulator works with strictly positive bit patterns" - value < 0 - ifTrue: [^ ((16r80000000 + value) << 1) + 1] - ifFalse: [^ (value << 1) + 1]! Item was removed: - ----- Method: InterpreterSimulator>>isIntegerValue: (in category 'interpreter shell') ----- - isIntegerValue: valueWord - ^ valueWord >= 16r-40000000 and: [valueWord <= 16r3FFFFFFF]! Item was removed: - ----- Method: NewCoObjectMemorySimulator>>integerObjectOf: (in category 'memory access') ----- - integerObjectOf: value - "The simulator works with strictly positive bit patterns" - ^((value < 0 - ifTrue: [16r80000000 + value] - ifFalse: [value]) - bitShift: 1) + 1! Item was removed: - ----- Method: NewCoObjectMemorySimulator>>isIntegerValue: (in category 'interpreter shell') ----- - isIntegerValue: valueWord - ^ valueWord >= 16r-40000000 and: [valueWord <= 16r3FFFFFFF]! Item was removed: - ----- Method: NewObjectMemorySimulator>>integerObjectOf: (in category 'memory access') ----- - integerObjectOf: value - "The simulator works with strictly positive bit patterns" - ^((value < 0 - ifTrue: [16r80000000 + value] - ifFalse: [value]) - bitShift: 1) + 1! Item was removed: - ----- Method: NewObjectMemorySimulator>>isIntegerValue: (in category 'interpreter shell') ----- - isIntegerValue: valueWord - ^ valueWord >= 16r-40000000 and: [valueWord <= 16r3FFFFFFF]! Item was removed: - ----- Method: NewspeakInterpreterSimulator>>integerObjectOf: (in category 'memory access') ----- - integerObjectOf: value - "The simulator works with strictly positive bit patterns" - value < 0 - ifTrue: [^ ((16r80000000 + value) << 1) + 1] - ifFalse: [^ (value << 1) + 1]! Item was removed: - ----- Method: NewspeakInterpreterSimulator>>isIntegerValue: (in category 'interpreter shell') ----- - isIntegerValue: valueWord - ^ valueWord >= 16r-40000000 and: [valueWord <= 16r3FFFFFFF]! Item was changed: ----- Method: ObjectMemory>>integerObjectOf: (in category 'interpreter access') ----- integerObjectOf: value + "Convert the integer value, assumed to be in SmallInteger range, into a tagged SmallInteger object. + In C, use a shift and an add to set the tag bit. + In Smalltalk we have to work harder because thesimulator works with strictly positive bit patterns." + ^self + cCode: [(value << 1) + 1] + inSmalltalk: [value >= 0 + ifTrue: [(value << 1) + 1] + ifFalse: [((16r80000000 + value) << 1) + 1]]! - ^(value << 1) + 1! Item was changed: ----- Method: ObjectMemory>>isIntegerValue: (in category 'interpreter access') ----- isIntegerValue: intValue + "Answer if the given value can be represented as a Smalltalk integer value. + In C, use a shift and XOR to set the sign bit if and only if the top two bits of the given + value are the same, then test the sign bit. Note that the top two bits are equal for + exactly those integers in the range that can be represented in 31-bits or 63-bits." - "Return true if the given value can be represented as a Smalltalk integer value." - "Use a shift and XOR to set the sign bit if and only if the top two bits of the given value are the same, then test the sign bit. Note that the top two bits are equal for exactly those integers in the range that can be represented in 31-bits or 63-bits." + ^self + cCode: [(intValue bitXor: (intValue << 1)) >= 0] + inSmalltalk: [intValue >= 16r-40000000 and: [intValue <= 16r3FFFFFFF]]! - ^ (intValue bitXor: (intValue << 1)) >= 0! Item was removed: - ----- Method: StackInterpreterSimulator>>integerObjectOf: (in category 'memory access') ----- - integerObjectOf: value - "The simulator works with strictly positive bit patterns" - value < 0 - ifTrue: [^ ((16r80000000 + value) << 1) + 1] - ifFalse: [^ (value << 1) + 1]! Item was removed: - ----- Method: StackInterpreterSimulator>>isIntegerValue: (in category 'interpreter shell') ----- - isIntegerValue: valueWord - ^ valueWord >= 16r-40000000 and: [valueWord <= 16r3FFFFFFF]! Item was removed: - ----- Method: StackInterpreterSimulator>>moveFramesIn:through:toPage: (in category 'debugging traps') ----- - moveFramesIn: thePage through: frameAbove toPage: newPage - "| thisPage | - (self checkIsStillMarriedContext: 22189568 currentFP: framePointer) ifTrue: - [thisPage := stackPages stackPageFor: (self frameOfMarriedContext: 22189568). - (thePage == thisPage or: [newPage == thisPage]) ifTrue: - [self halt]]." - ^super moveFramesIn: thePage through: frameAbove toPage: newPage! Item was changed: ----- Method: TMethod>>statementsListsForInlining (in category 'inlining') ----- statementsListsForInlining "Answer a collection of statement list nodes that are candidates for inlining. Currently, we cannot inline into the argument blocks of and: and or: messages. + We do not want to inline code strings within cCode:inSmalltalk: blocks (those with a + proper block for the cCode: argument are inlined in MessageNode>>asTranslatorNodeIn:). + We do not want to inline code within assert: sends (because we want the assert to read nicely)." - We do not want to inline code within cCode:inSmalltalk: blocks. - We do not want to inline code within assert: sends" | stmtLists | stmtLists := OrderedCollection new: 10. parseTree nodesDo: [ :node | node isStmtList ifTrue: [ stmtLists add: node ]] unless: [ :node | node isSend and: [#(cCode:inSmalltalk: assert:) includes: node selector]]. parseTree nodesDo: [ :node | node isSend ifTrue: [node selector = #cCode:inSmalltalk: ifTrue: [node nodesDo: [:inStNode| stmtLists remove: inStNode ifAbsent: []]]. node selector = #cppIf:ifTrue:ifFalse: ifTrue: [node args first nodesDo: [:inCondNode| stmtLists remove: inCondNode ifAbsent: []]]. ((node selector = #and:) or: [node selector = #or:]) ifTrue: "Note: the PP 2.3 compiler produces two arg nodes for these selectors" [stmtLists remove: node args first ifAbsent: []. stmtLists remove: node args last ifAbsent: []]. (#( #ifTrue: #ifFalse: #ifTrue:ifFalse: #ifFalse:ifTrue: #ifNil: #ifNotNil: #ifNil:ifNotNil: #ifNotNil:ifNil: ) includes: node selector) ifTrue: [stmtLists remove: node receiver ifAbsent: []]. (#(whileTrue whileTrue: whilefalse whileFalse:) includes: node selector) ifTrue: "Allow inlining if it is a [...] whileTrue/whileFalse. This is identified by having more than one statement in the receiver block in which case the C code wouldn't work anyways" [node receiver statements size = 1 ifTrue: [stmtLists remove: node receiver ifAbsent: []]]. (node selector = #to:do:) ifTrue: [stmtLists remove: node receiver ifAbsent: []. stmtLists remove: node args first ifAbsent: []]. (node selector = #to:by:do:) ifTrue: [stmtLists remove: node receiver ifAbsent: []. stmtLists remove: node args first ifAbsent: []. stmtLists remove: node args second ifAbsent: []]]. node isCaseStmt ifTrue: "don't inline cases" [node cases do: [: case | stmtLists remove: case ifAbsent: []]]]. ^stmtLists!

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Re: [Pharo-project] New VMs at http://www.mirandabanda.org/files/Cog/VM/VM.r2559/
by Eliot Miranda 18 Jul '12

18 Jul '12

On Wed, Jul 18, 2012 at 2:03 AM, Camillo Bruni <camillobruni(a)gmail.com>wrote: > I assume they don't include the FilePlugin changes? > Because then they will only work under Pharo 1.4 and before! > Which specific changes Camilo? If they're not in I'll integrate them asap. > > On 2012-07-18, at 04:21, Sean P. DeNigris wrote: > > Eliot Miranda-2 wrote > >> > >> Add -blockonerror flag to Unix & Mac VMs to allow attaching gdb on > >> error/segv. > >> > > > > Cool!! Thanks, Eliot > > > > -- > > View this message in context: > http://forum.world.st/New-VMs-at-http-www-mirandabanda-org-files-Cog-VM-VM-… > > Sent from the Pharo Smalltalk mailing list archive at Nabble.com. > > > > > -- best, Eliot

2 1

VM Maker: CMakeVMMaker-golubovsky.147.mcz
by commits＠source.squeak.org 18 Jul '12

18 Jul '12

Dmitry Golubovsky uploaded a new version of CMakeVMMaker to project VM Maker: http://source.squeak.org/VMMaker/CMakeVMMaker-golubovsky.147.mcz ==================== Summary ==================== Name: CMakeVMMaker-golubovsky.147 Author: golubovsky Time: 17 July 2012, 11:57:31 pm UUID: 4f268ebc-6578-4726-9abe-d7fec8e6e1cf Ancestors: CMakeVMMaker-golubovsky.146 Added FT2Plugin as internal plugin. =============== Diff against CMakeVMMaker-golubovsky.144 =============== Item was added: + ----- Method: StackEvtAndroidConfig>>configureFT2Plugin: (in category 'plugin extra rules') ----- + configureFT2Plugin: maker + "extra rules for Freetype plugin. + a custom rule to build freetype library" + + maker addPlatformSources: #( + 'src/base/ftbbox.c' + 'src/base/ftbitmap.c' + 'src/base/ftfstype.c' + 'src/base/ftglyph.c' + 'src/base/ftlcdfil.c' + 'src/base/ftstroke.c' + 'src/base/fttype1.c' + 'src/base/ftxf86.c' + 'src/base/ftbase.c' + 'src/base/ftsystem.c' + 'src/base/ftinit.c' + 'src/base/ftgasp.c' + 'src/raster/raster.c' + 'src/sfnt/sfnt.c' + 'src/smooth/smooth.c' + 'src/autofit/autofit.c' + 'src/truetype/truetype.c' + 'src/cff/cff.c' + 'src/psnames/psnames.c' + 'src/pshinter/pshinter.c' + ). + + " + maker addPlatformSources: #( + 'src/psnames/pspic.c' + 'src/psnames/psmodule.c' + 'src/psnames/psnames.c' + 'src/raster/raster.c' + 'src/raster/ftraster.c' + 'src/raster/rastpic.c' + 'src/raster/ftrend1.c' + 'src/base/ftfstype.c' + 'src/base/ftbase.c' + 'src/base/ftbitmap.c' + 'src/base/fttype1.c' + 'src/base/ftgloadr.c' + 'src/base/ftxf86.c' + 'src/base/ftgasp.c' + 'src/base/ftobjs.c' + 'src/base/basepic.c' + 'src/base/ftsynth.c' + 'src/base/ftbbox.c' + 'src/base/ftsystem.c' + 'src/base/ftrfork.c' + 'src/base/ftpatent.c' + 'src/base/ftoutln.c' + 'src/base/ftsnames.c' + 'src/base/ftutil.c' + 'src/base/ftdbgmem.c' + 'src/base/fttrigon.c' + 'src/base/ftinit.c' + 'src/base/ftapi.c' + 'src/base/ftstroke.c' + 'src/base/ftcalc.c' + 'src/base/ftglyph.c' + 'src/base/ftstream.c' + 'src/base/ftlcdfil.c' + 'src/base/ftdebug.c' + 'src/base/ftpic.c' + 'src/base/ftadvanc.c' + 'src/base/ftmm.c' + 'src/base/ftwinfnt.c' + 'src/psaux/psaux.c' + 'src/psaux/afmparse.c' + 'src/psaux/psconv.c' + 'src/psaux/t1cmap.c' + 'src/psaux/psauxmod.c' + 'src/psaux/psobjs.c' + 'src/psaux/t1decode.c' + 'src/truetype/ttinterp.c' + 'src/truetype/ttgxvar.c' + 'src/truetype/ttobjs.c' + 'src/truetype/ttdriver.c' + 'src/truetype/ttpload.c' + 'src/truetype/ttgload.c' + 'src/truetype/truetype.c' + 'src/truetype/ttpic.c' + 'src/sfnt/ttmtx.c' + 'src/sfnt/ttpost.c' + 'src/sfnt/ttsbit.c' + 'src/sfnt/ttcmap.c' + 'src/sfnt/ttkern.c' + 'src/sfnt/ttbdf.c' + 'src/sfnt/sfnt.c' + 'src/sfnt/sfntpic.c' + 'src/sfnt/ttsbit0.c' + 'src/sfnt/ttload.c' + 'src/sfnt/sfobjs.c' + 'src/sfnt/sfdriver.c' + 'src/smooth/ftsmooth.c' + 'src/smooth/ftspic.c' + 'src/smooth/ftgrays.c' + 'src/smooth/smooth.c' + 'src/pshinter/pshrec.c' + 'src/pshinter/pshinter.c' + 'src/pshinter/pshmod.c' + 'src/pshinter/pshalgo.c' + 'src/pshinter/pshglob.c' + 'src/pshinter/pshpic.c' + 'src/cff/cff.c' + 'src/cff/cffpic.c' + 'src/cff/cffload.c' + 'src/cff/cffgload.c' + 'src/cff/cffparse.c' + 'src/cff/cffdrivr.c' + 'src/cff/cffcmap.c' + 'src/cff/cffobjs.c' + 'src/autofit/afloader.c' + 'src/autofit/afangles.c' + 'src/autofit/afindic.c' + 'src/autofit/aflatin2.c' + 'src/autofit/aflatin.c' + 'src/autofit/afwarp.c' + 'src/autofit/afglobal.c' + 'src/autofit/autofit.c' + 'src/autofit/afpic.c' + 'src/autofit/afmodule.c' + 'src/autofit/afcjk.c' + 'src/autofit/afdummy.c' + 'src/autofit/afhints.c' + ). + + " + maker includeDirectories: '-I$(pluginPlatform)/include'. + ! Item was changed: ----- Method: StackEvtAndroidConfig>>configureFileCopyPlugin: (in category 'plugin extra rules') ----- configureFileCopyPlugin: maker + "extra rules for FileCopyPlugin" - "extra rules for DropPlugin" maker addPlatformSources: #( 'sqAndroidFileCopyPlugin.c') ! Item was changed: ----- Method: StackEvtAndroidConfig>>defaultInternalPlugins (in category 'plugins') ----- defaultInternalPlugins " took from unixbuild/bld/plugins.int" ^ #( AndroidPlugin BitBltSimulation "BitBltPlugin" BalloonEnginePlugin "B2DPlugin" BMPReadWriterPlugin CroquetPlugin DSAPlugin "DSAPrims" FFTPlugin + FT2Plugin "FreeType" FileCopyPlugin FilePlugin FloatArrayPlugin FloatMathPlugin JoystickTabletPlugin JPEGReaderPlugin LargeIntegersPlugin "LargeIntegers" Matrix2x3Plugin LocalePlugin RePlugin SecurityPlugin JPEGReadWriter2Plugin SocketPlugin MiscPrimitivePlugin DeflatePlugin "ZipPlugin" )!

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New VMs at http://www.mirandabanda.org/files/Cog/VM/VM.r2559/
by Eliot Miranda 18 Jul '12

18 Jul '12

http://www.mirandabanda.org/files/Cog/VM/VM.r2559/ CogVM binaries as per VMMaker.oscog-eem.163/r2559. Make wakeHighestPriority filter-out zombie processes; fixes Newspeak/Glue crash. Add -blockonerror flag to Unix & Mac VMs to allow attaching gdb on error/segv. Make the sigsegv handler catch SIGILL and SIGBUS on Unix and Mac. Add 64-bit file support to linux builds. Fix sqUnixX11.c ClipChildren to ClipByChildren. -- best, Eliot

1 1

[commit] r2562 - Make the sqGnu.h machinery support the multiple bytecode sets scheme.
by commits＠squeakvm.org 18 Jul '12

18 Jul '12

Author: eliot Date: 2012-07-17 17:35:02 -0700 (Tue, 17 Jul 2012) New Revision: 2562 Modified: branches/Cog/cygwinbuild/HowToBuild branches/Cog/macbuild/HowToBuild branches/Cog/nsbuild/cygwinbuild/HowToBuild branches/Cog/nscogbuild/cygwinbuild/HowToBuild branches/Cog/nscogbuild/unixbuild/HowToBuild branches/Cog/nscogbuild/unixbuild/bld/mvm branches/Cog/platforms/Cross/vm/dispdbg.h branches/Cog/platforms/Cross/vm/sqSCCSVersion.h branches/Cog/platforms/Mac OS/vm/Developer/sqGnu.h branches/Cog/platforms/unix/vm/sqGnu.h branches/Cog/platforms/unix/vm/sqUnixITimerHeartbeat.c branches/Cog/platforms/unix/vm/sqUnixITimerTickerHeartbeat.c branches/Cog/platforms/win32/vm/sqGnu.h branches/Cog/stackbuild/cygwinbuild/HowToBuild branches/Cog/unixbuild/HowToBuild branches/Cog/unixbuild/bld/mvm branches/Cog/unixbuild/mtbld/mvm Log: Make the sqGnu.h machinery support the multiple bytecode sets scheme. Add a trace facility to dispdbg.h for multiple bytecode sets. Update the HowToBuilds with more accurate info on building the Bochs plugin. Add an ioDisableHeartbeat to the itimer heartbeats for debugging. Make the unix build scripts nuke everything by default. Modified: branches/Cog/cygwinbuild/HowToBuild =================================================================== --- branches/Cog/cygwinbuild/HowToBuild 2012-06-25 23:53:39 UTC (rev 2561) +++ branches/Cog/cygwinbuild/HowToBuild 2012-07-18 00:35:02 UTC (rev 2562) @@ -66,9 +66,10 @@ Win32. You are on your own but your efforts will be warmly welcomed. First check-out the processor simulator source tree containing Bochs: svn co http://www.squeakvm.org/svn/squeak/branches/Cog/processors -Then build (on the Mac the following works) - $ cd ROOT/processors/IA32/bochs +Then build the libraries winbochs/{cpu/libcpu.a,disasm/libdisasm.a,fpu/libfpu.a} + $ cd ROOT/processors/IA32/winbochs $ ./conf.COG $ ./makeem - $ cd ROOT/macbuild/BochsIA32Plugin - $ xcodebuild +and build the plugin either via make (for the entire VM) or just + $ cd ROOT/cygwinbuild + $ make build/vm/BochsIA32Plugin.dll Modified: branches/Cog/macbuild/HowToBuild =================================================================== --- branches/Cog/macbuild/HowToBuild 2012-06-25 23:53:39 UTC (rev 2561) +++ branches/Cog/macbuild/HowToBuild 2012-07-18 00:35:02 UTC (rev 2562) @@ -28,10 +28,11 @@ need to first build bochs. First check-out the processor simulator source tree containing Bochs: svn co http://www.squeakvm.org/svn/squeak/branches/Cog/processors -Then build using - $ cd ROOT/processors/IA32/bochs +Then build the libraries macbochs/{cpu/libcpu.a,disasm/libdisasm.a,fpu/libfpu.a} + $ cd ROOT/processors/IA32/macbochs $ ./conf.COG $ ./makeem +Then build the plugin: $ cd ROOT/macbuild/BochsIA32Plugin $ xcodebuild Modified: branches/Cog/nsbuild/cygwinbuild/HowToBuild =================================================================== --- branches/Cog/nsbuild/cygwinbuild/HowToBuild 2012-06-25 23:53:39 UTC (rev 2561) +++ branches/Cog/nsbuild/cygwinbuild/HowToBuild 2012-07-18 00:35:02 UTC (rev 2562) @@ -66,9 +66,10 @@ Win32. You are on your own but your efforts will be warmly welcomed. First check-out the processor simulator source tree containing Bochs: svn co http://www.squeakvm.org/svn/squeak/branches/Cog/processors -Then build (on the Mac the following works) - $ cd ROOT/processors/IA32/bochs +Then build the libraries winbochs/{cpu/libcpu.a,disasm/libdisasm.a,fpu/libfpu.a} + $ cd ROOT/processors/IA32/winbochs $ ./conf.COG $ ./makeem - $ cd ROOT/macbuild/BochsIA32Plugin - $ xcodebuild +and build the plugin either via make (for the entire VM) or just + $ cd ROOT/nsbuild/cygwinbuild + $ make build/vm/BochsIA32Plugin.dll Modified: branches/Cog/nscogbuild/cygwinbuild/HowToBuild =================================================================== --- branches/Cog/nscogbuild/cygwinbuild/HowToBuild 2012-06-25 23:53:39 UTC (rev 2561) +++ branches/Cog/nscogbuild/cygwinbuild/HowToBuild 2012-07-18 00:35:02 UTC (rev 2562) @@ -67,9 +67,10 @@ Win32. You are on your own but your efforts will be warmly welcomed. First check-out the processor simulator source tree containing Bochs: svn co http://www.squeakvm.org/svn/squeak/branches/Cog/processors -Then build (on the Mac the following works) - $ cd ROOT/processors/IA32/bochs +Then build the libraries winbochs/{cpu/libcpu.a,disasm/libdisasm.a,fpu/libfpu.a} + $ cd ROOT/processors/IA32/winbochs $ ./conf.COG $ ./makeem - $ cd ROOT/macbuild/BochsIA32Plugin - $ xcodebuild +and build the plugin either via make (for the entire VM) or just + $ cd ROOT/nscogbuild/cygwinbuild + $ make build/vm/BochsIA32Plugin.dll Modified: branches/Cog/nscogbuild/unixbuild/HowToBuild =================================================================== --- branches/Cog/nscogbuild/unixbuild/HowToBuild 2012-06-25 23:53:39 UTC (rev 2561) +++ branches/Cog/nscogbuild/unixbuild/HowToBuild 2012-07-18 00:35:02 UTC (rev 2562) @@ -15,7 +15,7 @@ reading this in unixbuild its likely you've already got the sources) svn co http://www.squeakvm.org/svn/squeak/branches/Cog/platforms svn co http://www.squeakvm.org/svn/squeak/branches/Cog/src - svn co http://www.squeakvm.org/svn/squeak/branches/Cog/nsbuild + svn co http://www.squeakvm.org/svn/squeak/branches/Cog/nscogbuild 3. Open a shell, cd into the unixbuild/bld directory and execute ../../../platforms/unix/config/configure --with-src=nscogsrc CFLAGS="-g -O2 -msse2 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -DNDEBUG -DITIMER_HEARTBEAT=1 -DNO_VM_PROFILE=1 -DDEBUGVM=0" LIBS="-lpthread -luuid" make install prefix=WhereYouWantTheVmToGo Modified: branches/Cog/nscogbuild/unixbuild/bld/mvm =================================================================== --- branches/Cog/nscogbuild/unixbuild/bld/mvm 2012-06-25 23:53:39 UTC (rev 2561) +++ branches/Cog/nscogbuild/unixbuild/bld/mvm 2012-07-18 00:35:02 UTC (rev 2562) @@ -5,6 +5,12 @@ *) OPT=-O2;; esac +echo -n "clean? " +read a +case $a in +n|no|N|NO) echo "ok but this isn't safe!!";; +*) make reallyclean +esac test -f config.h || ../../../platforms/unix/config/configure --with-src=nscogsrc --without-vm-display-fbdev --without-npsqueak CFLAGS="-g $OPT -msse2 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -DNDEBUG -DITIMER_HEARTBEAT=1 -DNO_VM_PROFILE=1 -DDEBUGVM=0" LIBS="-lpthread -luuid" ../../../scripts/nukeversion rm -rf ../../../nsvmlinux Modified: branches/Cog/platforms/Cross/vm/dispdbg.h =================================================================== --- branches/Cog/platforms/Cross/vm/dispdbg.h 2012-06-25 23:53:39 UTC (rev 2561) +++ branches/Cog/platforms/Cross/vm/dispdbg.h 2012-07-18 00:35:02 UTC (rev 2562) @@ -134,6 +134,28 @@ warning("invalidInstructionPointerinMethod"); \ if (sendTrace > 1) printCallStack(); \ } while (0) +#elif MULTIPLEBYTECODESETS /* maintain byteCount & check for valid instruction pointer */ +# if defined(SQ_USE_GLOBAL_STRUCT) /* define only in interpreter */ +static FILE *bct = 0; +void openBytecodeTraceFile(char *fn) +{ if (!(bct = fopen(fn,"r"))) perror("fopen"); } +void closeBytecodeTraceFile() { if (bct) { fclose(bct); bct = 0; } } +# endif +# define bytecodeDispatchDebugHook() do { char line[64], expected[64]; \ + /* print byteCount pc byteCode(hex) stackPtr */ \ + sprintf(expected, "%ld: %d %d(%x) %d %s\n", \ + ++GIV(byteCount), localIP-GIV(method)-3, currentBytecode, currentBytecode, \ + (localFP-localSP)/sizeof(sqInt)-5, bytecodeNameTable[currentBytecode]); \ + printf(expected); \ + if (bct) { \ + fgets(line, sizeof(line) - 1, bct); \ + if (strcmp(line,expected)) \ + warning("bytecode trace mismatch"); \ + } \ + if (0) printFrameWithSP(localFP,localSP); \ + if (!ValidInstructionPointerCheck()) \ + warning("invalidInstructionPointerinMethod"); \ + } while (0) #elif 0 /* print current frame & instruction pointer on every bytecode. */ # define bytecodeDispatchDebugHook() do { \ printFrameWithSP(localFP,localSP); \ Property changes on: branches/Cog/platforms/Cross/vm/sqSCCSVersion.h ___________________________________________________________________ Modified: checkindate - Thu Jun 21 14:21:32 PDT 2012 + Tue Jul 17 17:32:43 PDT 2012 Modified: branches/Cog/platforms/Mac OS/vm/Developer/sqGnu.h =================================================================== --- branches/Cog/platforms/Mac OS/vm/Developer/sqGnu.h 2012-06-25 23:53:39 UTC (rev 2561) +++ branches/Cog/platforms/Mac OS/vm/Developer/sqGnu.h 2012-07-18 00:35:02 UTC (rev 2562) @@ -54,7 +54,65 @@ #define PPC_REG_JUMP #endif #define PRIM_DISPATCH goto *jumpTable[GIV(primitiveIndex)] -#define JUMP_TABLE \ + +#if MULTIPLEBYTECODESETS +# define JUMP_TABLE \ + static void *jumpTable[512]= { \ + &&_0, &&_1, &&_2, &&_3, &&_4, &&_5, &&_6, &&_7, &&_8, &&_9, \ + &&_10, &&_11, &&_12, &&_13, &&_14, &&_15, &&_16, &&_17, &&_18, &&_19, \ + &&_20, &&_21, &&_22, &&_23, &&_24, &&_25, &&_26, &&_27, &&_28, &&_29, \ + &&_30, &&_31, &&_32, &&_33, &&_34, &&_35, &&_36, &&_37, &&_38, &&_39, \ + &&_40, &&_41, &&_42, &&_43, &&_44, &&_45, &&_46, &&_47, &&_48, &&_49, \ + &&_50, &&_51, &&_52, &&_53, &&_54, &&_55, &&_56, &&_57, &&_58, &&_59, \ + &&_60, &&_61, &&_62, &&_63, &&_64, &&_65, &&_66, &&_67, &&_68, &&_69, \ + &&_70, &&_71, &&_72, &&_73, &&_74, &&_75, &&_76, &&_77, &&_78, &&_79, \ + &&_80, &&_81, &&_82, &&_83, &&_84, &&_85, &&_86, &&_87, &&_88, &&_89, \ + &&_90, &&_91, &&_92, &&_93, &&_94, &&_95, &&_96, &&_97, &&_98, &&_99, \ + &&_100, &&_101, &&_102, &&_103, &&_104, &&_105, &&_106, &&_107, &&_108, &&_109, \ + &&_110, &&_111, &&_112, &&_113, &&_114, &&_115, &&_116, &&_117, &&_118, &&_119, \ + &&_120, &&_121, &&_122, &&_123, &&_124, &&_125, &&_126, &&_127, &&_128, &&_129, \ + &&_130, &&_131, &&_132, &&_133, &&_134, &&_135, &&_136, &&_137, &&_138, &&_139, \ + &&_140, &&_141, &&_142, &&_143, &&_144, &&_145, &&_146, &&_147, &&_148, &&_149, \ + &&_150, &&_151, &&_152, &&_153, &&_154, &&_155, &&_156, &&_157, &&_158, &&_159, \ + &&_160, &&_161, &&_162, &&_163, &&_164, &&_165, &&_166, &&_167, &&_168, &&_169, \ + &&_170, &&_171, &&_172, &&_173, &&_174, &&_175, &&_176, &&_177, &&_178, &&_179, \ + &&_180, &&_181, &&_182, &&_183, &&_184, &&_185, &&_186, &&_187, &&_188, &&_189, \ + &&_190, &&_191, &&_192, &&_193, &&_194, &&_195, &&_196, &&_197, &&_198, &&_199, \ + &&_200, &&_201, &&_202, &&_203, &&_204, &&_205, &&_206, &&_207, &&_208, &&_209, \ + &&_210, &&_211, &&_212, &&_213, &&_214, &&_215, &&_216, &&_217, &&_218, &&_219, \ + &&_220, &&_221, &&_222, &&_223, &&_224, &&_225, &&_226, &&_227, &&_228, &&_229, \ + &&_230, &&_231, &&_232, &&_233, &&_234, &&_235, &&_236, &&_237, &&_238, &&_239, \ + &&_240, &&_241, &&_242, &&_243, &&_244, &&_245, &&_246, &&_247, &&_248, &&_249, \ + &&_250, &&_251, &&_252, &&_253, &&_254, &&_255, &&_256, &&_257, &&_258, &&_259, \ + &&_260, &&_261, &&_262, &&_263, &&_264, &&_265, &&_266, &&_267, &&_268, &&_269, \ + &&_270, &&_271, &&_272, &&_273, &&_274, &&_275, &&_276, &&_277, &&_278, &&_279, \ + &&_280, &&_281, &&_282, &&_283, &&_284, &&_285, &&_286, &&_287, &&_288, &&_289, \ + &&_290, &&_291, &&_292, &&_293, &&_294, &&_295, &&_296, &&_297, &&_298, &&_299, \ + &&_300, &&_301, &&_302, &&_303, &&_304, &&_305, &&_306, &&_307, &&_308, &&_309, \ + &&_310, &&_311, &&_312, &&_313, &&_314, &&_315, &&_316, &&_317, &&_318, &&_319, \ + &&_320, &&_321, &&_322, &&_323, &&_324, &&_325, &&_326, &&_327, &&_328, &&_329, \ + &&_330, &&_331, &&_332, &&_333, &&_334, &&_335, &&_336, &&_337, &&_338, &&_339, \ + &&_340, &&_341, &&_342, &&_343, &&_344, &&_345, &&_346, &&_347, &&_348, &&_349, \ + &&_350, &&_351, &&_352, &&_353, &&_354, &&_355, &&_356, &&_357, &&_358, &&_359, \ + &&_360, &&_361, &&_362, &&_363, &&_364, &&_365, &&_366, &&_367, &&_368, &&_369, \ + &&_370, &&_371, &&_372, &&_373, &&_374, &&_375, &&_376, &&_377, &&_378, &&_379, \ + &&_380, &&_381, &&_382, &&_383, &&_384, &&_385, &&_386, &&_387, &&_388, &&_389, \ + &&_390, &&_391, &&_392, &&_393, &&_394, &&_395, &&_396, &&_397, &&_398, &&_399, \ + &&_400, &&_401, &&_402, &&_403, &&_404, &&_405, &&_406, &&_407, &&_408, &&_409, \ + &&_410, &&_411, &&_412, &&_413, &&_414, &&_415, &&_416, &&_417, &&_418, &&_419, \ + &&_420, &&_421, &&_422, &&_423, &&_424, &&_425, &&_426, &&_427, &&_428, &&_429, \ + &&_430, &&_431, &&_432, &&_433, &&_434, &&_435, &&_436, &&_437, &&_438, &&_439, \ + &&_440, &&_441, &&_442, &&_443, &&_444, &&_445, &&_446, &&_447, &&_448, &&_449, \ + &&_450, &&_451, &&_452, &&_453, &&_454, &&_455, &&_456, &&_457, &&_458, &&_459, \ + &&_460, &&_461, &&_462, &&_463, &&_464, &&_465, &&_466, &&_467, &&_468, &&_469, \ + &&_470, &&_471, &&_472, &&_473, &&_474, &&_475, &&_476, &&_477, &&_478, &&_479, \ + &&_480, &&_481, &&_482, &&_483, &&_484, &&_485, &&_486, &&_487, &&_488, &&_489, \ + &&_490, &&_491, &&_492, &&_493, &&_494, &&_495, &&_496, &&_497, &&_498, &&_499, \ + &&_500, &&_501, &&_502, &&_503, &&_504, &&_505, &&_506, &&_507, &&_508, &&_509, \ + &&_510, &&_511 \ + } PPC_REG_JUMP; +#else /* MULTIPLEBYTECODESETS */ +# define JUMP_TABLE \ void *jumpTable[256]= { \ &&_0, &&_1, &&_2, &&_3, &&_4, &&_5, &&_6, &&_7, &&_8, &&_9, \ &&_10, &&_11, &&_12, &&_13, &&_14, &&_15, &&_16, &&_17, &&_18, &&_19, \ @@ -83,6 +141,7 @@ &&_240, &&_241, &&_242, &&_243, &&_244, &&_245, &&_246, &&_247, &&_248, &&_249, \ &&_250, &&_251, &&_252, &&_253, &&_254, &&_255 \ } PPC_REG_JUMP; +#endif /* MULTIPLEBYTECODESETS */ #define PRIM_TABLE \ static void *jumpTable[700]= { \ &&_0, &&_1, &&_2, &&_3, &&_4, &&_5, &&_6, &&_7, &&_8, &&_9, \ Modified: branches/Cog/platforms/unix/vm/sqGnu.h =================================================================== --- branches/Cog/platforms/unix/vm/sqGnu.h 2012-06-25 23:53:39 UTC (rev 2561) +++ branches/Cog/platforms/unix/vm/sqGnu.h 2012-07-18 00:35:02 UTC (rev 2562) @@ -52,7 +52,64 @@ # define PRIM_DISPATCH goto *jumpTable[primitiveIndex] #endif -#define JUMP_TABLE \ +#if MULTIPLEBYTECODESETS +# define JUMP_TABLE \ + static void *jumpTable[512]= { \ + &&_0, &&_1, &&_2, &&_3, &&_4, &&_5, &&_6, &&_7, &&_8, &&_9, \ + &&_10, &&_11, &&_12, &&_13, &&_14, &&_15, &&_16, &&_17, &&_18, &&_19, \ + &&_20, &&_21, &&_22, &&_23, &&_24, &&_25, &&_26, &&_27, &&_28, &&_29, \ + &&_30, &&_31, &&_32, &&_33, &&_34, &&_35, &&_36, &&_37, &&_38, &&_39, \ + &&_40, &&_41, &&_42, &&_43, &&_44, &&_45, &&_46, &&_47, &&_48, &&_49, \ + &&_50, &&_51, &&_52, &&_53, &&_54, &&_55, &&_56, &&_57, &&_58, &&_59, \ + &&_60, &&_61, &&_62, &&_63, &&_64, &&_65, &&_66, &&_67, &&_68, &&_69, \ + &&_70, &&_71, &&_72, &&_73, &&_74, &&_75, &&_76, &&_77, &&_78, &&_79, \ + &&_80, &&_81, &&_82, &&_83, &&_84, &&_85, &&_86, &&_87, &&_88, &&_89, \ + &&_90, &&_91, &&_92, &&_93, &&_94, &&_95, &&_96, &&_97, &&_98, &&_99, \ + &&_100, &&_101, &&_102, &&_103, &&_104, &&_105, &&_106, &&_107, &&_108, &&_109, \ + &&_110, &&_111, &&_112, &&_113, &&_114, &&_115, &&_116, &&_117, &&_118, &&_119, \ + &&_120, &&_121, &&_122, &&_123, &&_124, &&_125, &&_126, &&_127, &&_128, &&_129, \ + &&_130, &&_131, &&_132, &&_133, &&_134, &&_135, &&_136, &&_137, &&_138, &&_139, \ + &&_140, &&_141, &&_142, &&_143, &&_144, &&_145, &&_146, &&_147, &&_148, &&_149, \ + &&_150, &&_151, &&_152, &&_153, &&_154, &&_155, &&_156, &&_157, &&_158, &&_159, \ + &&_160, &&_161, &&_162, &&_163, &&_164, &&_165, &&_166, &&_167, &&_168, &&_169, \ + &&_170, &&_171, &&_172, &&_173, &&_174, &&_175, &&_176, &&_177, &&_178, &&_179, \ + &&_180, &&_181, &&_182, &&_183, &&_184, &&_185, &&_186, &&_187, &&_188, &&_189, \ + &&_190, &&_191, &&_192, &&_193, &&_194, &&_195, &&_196, &&_197, &&_198, &&_199, \ + &&_200, &&_201, &&_202, &&_203, &&_204, &&_205, &&_206, &&_207, &&_208, &&_209, \ + &&_210, &&_211, &&_212, &&_213, &&_214, &&_215, &&_216, &&_217, &&_218, &&_219, \ + &&_220, &&_221, &&_222, &&_223, &&_224, &&_225, &&_226, &&_227, &&_228, &&_229, \ + &&_230, &&_231, &&_232, &&_233, &&_234, &&_235, &&_236, &&_237, &&_238, &&_239, \ + &&_240, &&_241, &&_242, &&_243, &&_244, &&_245, &&_246, &&_247, &&_248, &&_249, \ + &&_250, &&_251, &&_252, &&_253, &&_254, &&_255, &&_256, &&_257, &&_258, &&_259, \ + &&_260, &&_261, &&_262, &&_263, &&_264, &&_265, &&_266, &&_267, &&_268, &&_269, \ + &&_270, &&_271, &&_272, &&_273, &&_274, &&_275, &&_276, &&_277, &&_278, &&_279, \ + &&_280, &&_281, &&_282, &&_283, &&_284, &&_285, &&_286, &&_287, &&_288, &&_289, \ + &&_290, &&_291, &&_292, &&_293, &&_294, &&_295, &&_296, &&_297, &&_298, &&_299, \ + &&_300, &&_301, &&_302, &&_303, &&_304, &&_305, &&_306, &&_307, &&_308, &&_309, \ + &&_310, &&_311, &&_312, &&_313, &&_314, &&_315, &&_316, &&_317, &&_318, &&_319, \ + &&_320, &&_321, &&_322, &&_323, &&_324, &&_325, &&_326, &&_327, &&_328, &&_329, \ + &&_330, &&_331, &&_332, &&_333, &&_334, &&_335, &&_336, &&_337, &&_338, &&_339, \ + &&_340, &&_341, &&_342, &&_343, &&_344, &&_345, &&_346, &&_347, &&_348, &&_349, \ + &&_350, &&_351, &&_352, &&_353, &&_354, &&_355, &&_356, &&_357, &&_358, &&_359, \ + &&_360, &&_361, &&_362, &&_363, &&_364, &&_365, &&_366, &&_367, &&_368, &&_369, \ + &&_370, &&_371, &&_372, &&_373, &&_374, &&_375, &&_376, &&_377, &&_378, &&_379, \ + &&_380, &&_381, &&_382, &&_383, &&_384, &&_385, &&_386, &&_387, &&_388, &&_389, \ + &&_390, &&_391, &&_392, &&_393, &&_394, &&_395, &&_396, &&_397, &&_398, &&_399, \ + &&_400, &&_401, &&_402, &&_403, &&_404, &&_405, &&_406, &&_407, &&_408, &&_409, \ + &&_410, &&_411, &&_412, &&_413, &&_414, &&_415, &&_416, &&_417, &&_418, &&_419, \ + &&_420, &&_421, &&_422, &&_423, &&_424, &&_425, &&_426, &&_427, &&_428, &&_429, \ + &&_430, &&_431, &&_432, &&_433, &&_434, &&_435, &&_436, &&_437, &&_438, &&_439, \ + &&_440, &&_441, &&_442, &&_443, &&_444, &&_445, &&_446, &&_447, &&_448, &&_449, \ + &&_450, &&_451, &&_452, &&_453, &&_454, &&_455, &&_456, &&_457, &&_458, &&_459, \ + &&_460, &&_461, &&_462, &&_463, &&_464, &&_465, &&_466, &&_467, &&_468, &&_469, \ + &&_470, &&_471, &&_472, &&_473, &&_474, &&_475, &&_476, &&_477, &&_478, &&_479, \ + &&_480, &&_481, &&_482, &&_483, &&_484, &&_485, &&_486, &&_487, &&_488, &&_489, \ + &&_490, &&_491, &&_492, &&_493, &&_494, &&_495, &&_496, &&_497, &&_498, &&_499, \ + &&_500, &&_501, &&_502, &&_503, &&_504, &&_505, &&_506, &&_507, &&_508, &&_509, \ + &&_510, &&_511 \ + } JUMP_TABLE_PTR +#else /* MULTIPLEBYTECODESETS */ +# define JUMP_TABLE \ static void *jumpTable[256]= { \ &&_0, &&_1, &&_2, &&_3, &&_4, &&_5, &&_6, &&_7, &&_8, &&_9, \ &&_10, &&_11, &&_12, &&_13, &&_14, &&_15, &&_16, &&_17, &&_18, &&_19, \ @@ -81,6 +138,7 @@ &&_240, &&_241, &&_242, &&_243, &&_244, &&_245, &&_246, &&_247, &&_248, &&_249, \ &&_250, &&_251, &&_252, &&_253, &&_254, &&_255 \ } JUMP_TABLE_PTR +#endif /* MULTIPLEBYTECODESETS */ #define PRIM_TABLE \ static void *jumpTable[700]= { \ Modified: branches/Cog/platforms/unix/vm/sqUnixITimerHeartbeat.c =================================================================== --- branches/Cog/platforms/unix/vm/sqUnixITimerHeartbeat.c 2012-06-25 23:53:39 UTC (rev 2561) +++ branches/Cog/platforms/unix/vm/sqUnixITimerHeartbeat.c 2012-07-18 00:35:02 UTC (rev 2562) @@ -393,16 +393,18 @@ if (suppressHeartbeatFlag) return; #if NEED_SIGALTSTACK - signal_stack.ss_flags = 0; - signal_stack.ss_size = SIGNAL_STACK_SIZE; - if (!(signal_stack.ss_sp = malloc(signal_stack.ss_size))) { - perror("ioInitHeartbeat malloc"); - exit(1); + if (!signal_stack.ss_size) { + signal_stack.ss_flags = 0; + signal_stack.ss_size = SIGNAL_STACK_SIZE; + if (!(signal_stack.ss_sp = malloc(signal_stack.ss_size))) { + perror("ioInitHeartbeat malloc"); + exit(1); + } + if (sigaltstack(&signal_stack, 0) < 0) { + perror("ioInitHeartbeat sigaltstack"); + exit(1); + } } - if (sigaltstack(&signal_stack, 0) < 0) { - perror("ioInitHeartbeat sigaltstack"); - exit(1); - } #endif /* NEED_SIGALTSTACK */ heartbeat_handler_action.sa_sigaction = heartbeat_handler; @@ -427,6 +429,20 @@ } void +ioDisableHeartbeat() /* for debugging */ +{ + struct itimerval expire; + + expire.it_interval.tv_sec = + expire.it_interval.tv_usec = 0; + expire.it_value = expire.it_interval; + if (setitimer(THE_ITIMER, &expire, 0)) { + perror("ioDisableHeartbeat setitimer"); + exit(1); + } +} + +void ioSetHeartbeatMilliseconds(int ms) { beatMilliseconds = ms; Modified: branches/Cog/platforms/unix/vm/sqUnixITimerTickerHeartbeat.c =================================================================== --- branches/Cog/platforms/unix/vm/sqUnixITimerTickerHeartbeat.c 2012-06-25 23:53:39 UTC (rev 2561) +++ branches/Cog/platforms/unix/vm/sqUnixITimerTickerHeartbeat.c 2012-07-18 00:35:02 UTC (rev 2562) @@ -524,16 +524,18 @@ if (suppressHeartbeatFlag) return; #if NEED_SIGALTSTACK - signal_stack.ss_flags = 0; - signal_stack.ss_size = SIGNAL_STACK_SIZE; - if (!(signal_stack.ss_sp = malloc(signal_stack.ss_size))) { - perror("ioInitHeartbeat malloc"); - exit(1); + if (!signal_stack.ss_size) { + signal_stack.ss_flags = 0; + signal_stack.ss_size = SIGNAL_STACK_SIZE; + if (!(signal_stack.ss_sp = malloc(signal_stack.ss_size))) { + perror("ioInitHeartbeat malloc"); + exit(1); + } + if (sigaltstack(&signal_stack, 0) < 0) { + perror("ioInitHeartbeat sigaltstack"); + exit(1); + } } - if (sigaltstack(&signal_stack, 0) < 0) { - perror("ioInitHeartbeat sigaltstack"); - exit(1); - } #endif /* NEED_SIGALTSTACK */ halfAMo.tv_sec = 0; @@ -583,6 +585,20 @@ } void +ioDisableHeartbeat() /* for debugging */ +{ + struct itimerval expire; + + expire.it_interval.tv_sec = + expire.it_interval.tv_usec = 0; + expire.it_value = expire.it_interval; + if (setitimer(THE_ITIMER, &expire, 0)) { + perror("ioDisableHeartbeat setitimer"); + exit(1); + } +} + +void ioSetHeartbeatMilliseconds(int ms) { beatMilliseconds = ms; Modified: branches/Cog/platforms/win32/vm/sqGnu.h =================================================================== --- branches/Cog/platforms/win32/vm/sqGnu.h 2012-06-25 23:53:39 UTC (rev 2561) +++ branches/Cog/platforms/win32/vm/sqGnu.h 2012-07-18 00:35:02 UTC (rev 2562) @@ -21,9 +21,66 @@ #endif #define PRIM_DISPATCH goto *jumpTable[primitiveIndex] -#define BC_JUMP_TABLE\ +#if MULTIPLEBYTECODESETS +# define BC_JUMP_TABLE\ + static void *jumpTable[512]= { \ + &&_0, &&_1, &&_2, &&_3, &&_4, &&_5, &&_6, &&_7, &&_8, &&_9, \ + &&_10, &&_11, &&_12, &&_13, &&_14, &&_15, &&_16, &&_17, &&_18, &&_19, \ + &&_20, &&_21, &&_22, &&_23, &&_24, &&_25, &&_26, &&_27, &&_28, &&_29, \ + &&_30, &&_31, &&_32, &&_33, &&_34, &&_35, &&_36, &&_37, &&_38, &&_39, \ + &&_40, &&_41, &&_42, &&_43, &&_44, &&_45, &&_46, &&_47, &&_48, &&_49, \ + &&_50, &&_51, &&_52, &&_53, &&_54, &&_55, &&_56, &&_57, &&_58, &&_59, \ + &&_60, &&_61, &&_62, &&_63, &&_64, &&_65, &&_66, &&_67, &&_68, &&_69, \ + &&_70, &&_71, &&_72, &&_73, &&_74, &&_75, &&_76, &&_77, &&_78, &&_79, \ + &&_80, &&_81, &&_82, &&_83, &&_84, &&_85, &&_86, &&_87, &&_88, &&_89, \ + &&_90, &&_91, &&_92, &&_93, &&_94, &&_95, &&_96, &&_97, &&_98, &&_99, \ + &&_100, &&_101, &&_102, &&_103, &&_104, &&_105, &&_106, &&_107, &&_108, &&_109, \ + &&_110, &&_111, &&_112, &&_113, &&_114, &&_115, &&_116, &&_117, &&_118, &&_119, \ + &&_120, &&_121, &&_122, &&_123, &&_124, &&_125, &&_126, &&_127, &&_128, &&_129, \ + &&_130, &&_131, &&_132, &&_133, &&_134, &&_135, &&_136, &&_137, &&_138, &&_139, \ + &&_140, &&_141, &&_142, &&_143, &&_144, &&_145, &&_146, &&_147, &&_148, &&_149, \ + &&_150, &&_151, &&_152, &&_153, &&_154, &&_155, &&_156, &&_157, &&_158, &&_159, \ + &&_160, &&_161, &&_162, &&_163, &&_164, &&_165, &&_166, &&_167, &&_168, &&_169, \ + &&_170, &&_171, &&_172, &&_173, &&_174, &&_175, &&_176, &&_177, &&_178, &&_179, \ + &&_180, &&_181, &&_182, &&_183, &&_184, &&_185, &&_186, &&_187, &&_188, &&_189, \ + &&_190, &&_191, &&_192, &&_193, &&_194, &&_195, &&_196, &&_197, &&_198, &&_199, \ + &&_200, &&_201, &&_202, &&_203, &&_204, &&_205, &&_206, &&_207, &&_208, &&_209, \ + &&_210, &&_211, &&_212, &&_213, &&_214, &&_215, &&_216, &&_217, &&_218, &&_219, \ + &&_220, &&_221, &&_222, &&_223, &&_224, &&_225, &&_226, &&_227, &&_228, &&_229, \ + &&_230, &&_231, &&_232, &&_233, &&_234, &&_235, &&_236, &&_237, &&_238, &&_239, \ + &&_240, &&_241, &&_242, &&_243, &&_244, &&_245, &&_246, &&_247, &&_248, &&_249, \ + &&_250, &&_251, &&_252, &&_253, &&_254, &&_255, &&_256, &&_257, &&_258, &&_259, \ + &&_260, &&_261, &&_262, &&_263, &&_264, &&_265, &&_266, &&_267, &&_268, &&_269, \ + &&_270, &&_271, &&_272, &&_273, &&_274, &&_275, &&_276, &&_277, &&_278, &&_279, \ + &&_280, &&_281, &&_282, &&_283, &&_284, &&_285, &&_286, &&_287, &&_288, &&_289, \ + &&_290, &&_291, &&_292, &&_293, &&_294, &&_295, &&_296, &&_297, &&_298, &&_299, \ + &&_300, &&_301, &&_302, &&_303, &&_304, &&_305, &&_306, &&_307, &&_308, &&_309, \ + &&_310, &&_311, &&_312, &&_313, &&_314, &&_315, &&_316, &&_317, &&_318, &&_319, \ + &&_320, &&_321, &&_322, &&_323, &&_324, &&_325, &&_326, &&_327, &&_328, &&_329, \ + &&_330, &&_331, &&_332, &&_333, &&_334, &&_335, &&_336, &&_337, &&_338, &&_339, \ + &&_340, &&_341, &&_342, &&_343, &&_344, &&_345, &&_346, &&_347, &&_348, &&_349, \ + &&_350, &&_351, &&_352, &&_353, &&_354, &&_355, &&_356, &&_357, &&_358, &&_359, \ + &&_360, &&_361, &&_362, &&_363, &&_364, &&_365, &&_366, &&_367, &&_368, &&_369, \ + &&_370, &&_371, &&_372, &&_373, &&_374, &&_375, &&_376, &&_377, &&_378, &&_379, \ + &&_380, &&_381, &&_382, &&_383, &&_384, &&_385, &&_386, &&_387, &&_388, &&_389, \ + &&_390, &&_391, &&_392, &&_393, &&_394, &&_395, &&_396, &&_397, &&_398, &&_399, \ + &&_400, &&_401, &&_402, &&_403, &&_404, &&_405, &&_406, &&_407, &&_408, &&_409, \ + &&_410, &&_411, &&_412, &&_413, &&_414, &&_415, &&_416, &&_417, &&_418, &&_419, \ + &&_420, &&_421, &&_422, &&_423, &&_424, &&_425, &&_426, &&_427, &&_428, &&_429, \ + &&_430, &&_431, &&_432, &&_433, &&_434, &&_435, &&_436, &&_437, &&_438, &&_439, \ + &&_440, &&_441, &&_442, &&_443, &&_444, &&_445, &&_446, &&_447, &&_448, &&_449, \ + &&_450, &&_451, &&_452, &&_453, &&_454, &&_455, &&_456, &&_457, &&_458, &&_459, \ + &&_460, &&_461, &&_462, &&_463, &&_464, &&_465, &&_466, &&_467, &&_468, &&_469, \ + &&_470, &&_471, &&_472, &&_473, &&_474, &&_475, &&_476, &&_477, &&_478, &&_479, \ + &&_480, &&_481, &&_482, &&_483, &&_484, &&_485, &&_486, &&_487, &&_488, &&_489, \ + &&_490, &&_491, &&_492, &&_493, &&_494, &&_495, &&_496, &&_497, &&_498, &&_499, \ + &&_500, &&_501, &&_502, &&_503, &&_504, &&_505, &&_506, &&_507, &&_508, &&_509, \ + &&_510, &&_511 \ + } JUMP_TABLE_PTR +#else /* MULTIPLEBYTECODESETS */ +# define BC_JUMP_TABLE\ static void *jumpTable[256] = {\ - &&_0, &&_1, &&_2, &&_3, &&_4, &&_5, &&_6, &&_7, &&_8, &&_9,\ + &&_0, &&_1, &&_2, &&_3, &&_4, &&_5, &&_6, &&_7, &&_8, &&_9,\ &&_10, &&_11, &&_12, &&_13, &&_14, &&_15, &&_16, &&_17, &&_18, &&_19,\ &&_20, &&_21, &&_22, &&_23, &&_24, &&_25, &&_26, &&_27, &&_28, &&_29,\ &&_30, &&_31, &&_32, &&_33, &&_34, &&_35, &&_36, &&_37, &&_38, &&_39,\ @@ -50,6 +107,7 @@ &&_240, &&_241, &&_242, &&_243, &&_244, &&_245, &&_246, &&_247, &&_248, &&_249,\ &&_250, &&_251, &&_252, &&_253, &&_254, &&_255\ }; +#endif /* MULTIPLEBYTECODESETS */ /* Compatibility between the old and the new names of the Gnuification macros */ #define JUMP_TABLE BC_JUMP_TABLE Modified: branches/Cog/stackbuild/cygwinbuild/HowToBuild =================================================================== --- branches/Cog/stackbuild/cygwinbuild/HowToBuild 2012-06-25 23:53:39 UTC (rev 2561) +++ branches/Cog/stackbuild/cygwinbuild/HowToBuild 2012-07-18 00:35:02 UTC (rev 2562) @@ -67,9 +67,10 @@ Win32. You are on your own but your efforts will be warmly welcomed. First check-out the processor simulator source tree containing Bochs: svn co http://www.squeakvm.org/svn/squeak/branches/Cog/processors -Then build (on the Mac the following works) - $ cd ROOT/processors/IA32/bochs +Then build the libraries winbochs/{cpu/libcpu.a,disasm/libdisasm.a,fpu/libfpu.a} + $ cd ROOT/processors/IA32/winbochs $ ./conf.COG $ ./makeem - $ cd ROOT/macbuild/BochsIA32Plugin - $ xcodebuild +and build the plugin either via make (for the entire VM) or just + $ cd ROOT/stackbuild/cygwinbuild + $ make build/vm/BochsIA32Plugin.dll Modified: branches/Cog/unixbuild/HowToBuild =================================================================== --- branches/Cog/unixbuild/HowToBuild 2012-06-25 23:53:39 UTC (rev 2561) +++ branches/Cog/unixbuild/HowToBuild 2012-07-18 00:35:02 UTC (rev 2562) @@ -63,13 +63,13 @@ need to first build bochs. First check-out the processor simulator source tree containing Bochs: svn co http://www.squeakvm.org/svn/squeak/branches/Cog/processors -Then build using the following, which works on Mac OS and is hence unlikely to -work entirely on linux (no xcodebuild): - $ cd ROOT/processors/IA32/bochs +Then build libraries linuxbochs/{cpu/libcpu.a,disasm/libdisasm.a,fpu/libfpu.a} + $ cd ROOT/processors/IA32/linuxbochs $ ./conf.COG $ ./makeem - $ cd ROOT/macbuild/BochsIA32Plugin - $ xcodebuild +and build the plugin via + $ cd ROOT/unixbuild/bld/BochsIA32Plugin + $ make 3e. If you're building the VM on a 64-bit OS, you'll need a compiler which can compile and link to 32-bit binaries. On most Linuxes the gcc-multilib package Modified: branches/Cog/unixbuild/bld/mvm =================================================================== --- branches/Cog/unixbuild/bld/mvm 2012-06-25 23:53:39 UTC (rev 2561) +++ branches/Cog/unixbuild/bld/mvm 2012-07-18 00:35:02 UTC (rev 2562) @@ -5,6 +5,12 @@ *) OPT=-O2;; esac +echo -n "clean? " +read a +case $a in +n|no|N|NO) echo "ok but this isn't safe!!";; +*) make reallyclean +esac test -f config.h || ../../platforms/unix/config/configure --without-npsqueak CFLAGS="-g $OPT -msse2 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -DNDEBUG -DITIMER_HEARTBEAT=1 -DNO_VM_PROFILE=1 -DCOGMTVM=0 -DDEBUGVM=0" LIBS=-lpthread ../../scripts/nukeversion rm -rf ../../coglinux Modified: branches/Cog/unixbuild/mtbld/mvm =================================================================== --- branches/Cog/unixbuild/mtbld/mvm 2012-06-25 23:53:39 UTC (rev 2561) +++ branches/Cog/unixbuild/mtbld/mvm 2012-07-18 00:35:02 UTC (rev 2562) @@ -5,6 +5,12 @@ *) OPT=-O2;; esac +echo -n "clean? " +read a +case $a in +n|no|N|NO) echo "ok but this isn't safe!!";; +*) make reallyclean +esac test -f config.h || ../../platforms/unix/config/configure INTERP=cointerpmt --without-npsqueak CFLAGS="-g $OPT -msse2 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -DNDEBUG -DCOGMTVM=1 -DDEBUGVM=0 -D_GNU_SOURCE -DITIMER_HEARTBEAT=1 -DNO_VM_PROFILE=1" LIBS=-lpthread ../../scripts/nukeversion rm -rf ../../cogmtlinux

1 0

VM Maker: VMMaker.oscog-eem.186.mcz
by commits＠source.squeak.org 18 Jul '12

18 Jul '12

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.186.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.186 Author: eem Time: 17 July 2012, 3:22:27.571 pm UUID: 39e5f171-8ca8-4a8b-9430-bd393687a156 Ancestors: VMMaker.oscog-lw.185 Replace CogAbstractInstruction's NumberOfRegisters and MachineCodeSize class vars with accessors. Provide commented subclass responsibilities for these and genSaveRegisters. Eliminate IA32-specifics from CogARMCompiler>>dispatchConcretize. Add a rump CogARMCompiler>>genSaveRegisters for Lars to implement. =============== Diff against VMMaker.oscog-lw.185 =============== Item was changed: ----- Method: CogARMCompiler class>>initialize (in category 'class initialization') ----- initialize super initialize. "Initialize various ARM instruction-related constants." "CogARMCompiler initialize" R0 := 0. R1 := 1. R2 := 2. R3 := 3. R4 := 4. R5 := 5. R6 := 6. R7 := 7. R8 := 8. R9 := 9. R10 := 10. R11 := 11. R12 := 12. SP := 13. LR := 14. + PC := 15! - PC := 15. - - MachineCodeSize := 16. "atm: MoveRAw" - NumberOfRegisters := 16.! Item was changed: ----- Method: CogARMCompiler>>concretizeAt: (in category 'generate machine code') ----- concretizeAt: actualAddress + "Generate concrete machine code for the instruction at actualAddress, + setting machineCodeSize, and answer the following address." - "Attempt to generate concrete machine code for the instruction at address. - If possible, generate the relevant machine code, setting machineCodeSize, - and answer the following address. Otherwise answer -1." self assert: actualAddress \\ 4 = 0. address := actualAddress. self dispatchConcretize. self assert: (maxSize = nil or: [maxSize >= machineCodeSize]). ^actualAddress + machineCodeSize! Item was changed: ----- Method: CogARMCompiler>>dispatchConcretize (in category 'generate machine code') ----- dispatchConcretize "Attempt to generate concrete machine code for the instruction at address. This is the inner dispatch of concretizeAt: actualAddress which exists only to get around the branch size limits in the SqueakV3 (blue book derived) bytecode set." opcode caseOf: { "Noops & Pseudo Ops" [Label] -> [^self concretizeLabel]. [AlignmentNops] -> [^self concretizeAlignmentNops]. [Fill16] -> [^self concretizeFill16]. [Fill32] -> [^self concretizeFill32]. [FillFromWord] -> [^self concretizeFillFromWord]. [Nop] -> [^self concretizeNop]. "Specific Control/Data Movement" + "[LDM] -> [^self concretizeLDM]. + [STM] -> [^self concretizeSTM]." - "[CDQ] -> [^self concretizeCDQ]. - [IDIVR] -> [^self concretizeIDIVR]. - [IMULRR] -> [^self concretizeMulRR]. - [CPUID] -> [^self concretizeCPUID]. - [CMPXCHGAwR] -> [^self concretizeCMPXCHGAwR]. - [CMPXCHGMwrR] -> [^self concretizeCMPXCHGMwrR]. - [LFENCE] -> [^self concretizeFENCE: 5]. - [MFENCE] -> [^self concretizeFENCE: 6]. - [SFENCE] -> [^self concretizeFENCE: 7]. - [LOCK] -> [^self concretizeLOCK]. - [XCHGAwR] -> [^self concretizeXCHGAwR]. - [XCHGMwrR] -> [^self concretizeXCHGMwrR]. - [XCHGRR] -> [^self concretizeXCHGRR]." "Control" + [Call] -> [^self concretizeCall]. + [JumpR] -> [^self concretizeJumpR]. + [JumpLong] -> [^self concretizeJumpLong]. + "[JumpLongZero] -> [^self concretizeConditionalJumpLong: 16r??]. + [JumpLongNonZero] -> [^self concretizeConditionalJumpLong: 16r??]." + [Jump] -> [^self concretizeJump]. + "[JumpZero] -> [^self concretizeConditionalJump: 16r??]. + [JumpNonZero] -> [^self concretizeConditionalJump: 16r??]. + [JumpNegative] -> [^self concretizeConditionalJump: 16r??]. + [JumpNonNegative] -> [^self concretizeConditionalJump: 16r??]. + [JumpOverflow] -> [^self concretizeConditionalJump: 16r??]. + [JumpNoOverflow] -> [^self concretizeConditionalJump: 16r??]. + [JumpCarry] -> [^self concretizeConditionalJump: 16r??]. + [JumpNoCarry] -> [^self concretizeConditionalJump: 16r??]. + [JumpLess] -> [^self concretizeConditionalJump: 16r??]. + [JumpGreaterOrEqual] -> [^self concretizeConditionalJump: 16r??]. + [JumpGreater] -> [^self concretizeConditionalJump: 16r??]. + [JumpLessOrEqual] -> [^self concretizeConditionalJump: 16r??]. + [JumpBelow] -> [^self concretizeConditionalJump: 16r??]. + [JumpAboveOrEqual] -> [^self concretizeConditionalJump: 16r??]. + [JumpAbove] -> [^self concretizeConditionalJump: 16r??]. + [JumpBelowOrEqual] -> [^self concretizeConditionalJump: 16r??]. + [JumpFPEqual] -> [^self concretizeConditionalJump: 16r??]. + [JumpFPNotEqual] -> [^self concretizeConditionalJump: 16r??]. + [JumpFPLess] -> [^self concretizeConditionalJump: 16r??]. + [JumpFPGreaterOrEqual] -> [^self concretizeConditionalJump: 16r??]. + [JumpFPGreater] -> [^self concretizeConditionalJump: 16r??]. + [JumpFPLessOrEqual] -> [^self concretizeConditionalJump: 16r??]. + [JumpFPOrdered] -> [^self concretizeConditionalJump: 16r??]. + [JumpFPUnordered] -> [^self concretizeConditionalJump: 16r??]." - [Call] -> [^self concretizeCall]. - [JumpR] -> [^self concretizeJumpR]. - [JumpLong] -> [^self concretizeJumpLong]. - [JumpLongZero] -> [^self concretizeConditionalJumpLong: 16r4]. - [JumpLongNonZero] -> [^self concretizeConditionalJumpLong: 16r5]. - [Jump] -> [^self concretizeJump]. - "Table B-1 Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture" - [JumpZero] -> [^self concretizeConditionalJump: 16r4]. - [JumpNonZero] -> [^self concretizeConditionalJump: 16r5]. - [JumpNegative] -> [^self concretizeConditionalJump: 16r8]. - [JumpNonNegative] -> [^self concretizeConditionalJump: 16r9]. - [JumpOverflow] -> [^self concretizeConditionalJump: 16r0]. - [JumpNoOverflow] -> [^self concretizeConditionalJump: 16r1]. - [JumpCarry] -> [^self concretizeConditionalJump: 16r2]. - [JumpNoCarry] -> [^self concretizeConditionalJump: 16r3]. - [JumpLess] -> [^self concretizeConditionalJump: 16rC]. - [JumpGreaterOrEqual] -> [^self concretizeConditionalJump: 16rD]. - [JumpGreater] -> [^self concretizeConditionalJump: 16rF]. - [JumpLessOrEqual] -> [^self concretizeConditionalJump: 16rE]. - [JumpBelow] -> [^self concretizeConditionalJump: 16r2]. - [JumpAboveOrEqual] -> [^self concretizeConditionalJump: 16r3]. - [JumpAbove] -> [^self concretizeConditionalJump: 16r7]. - [JumpBelowOrEqual] -> [^self concretizeConditionalJump: 16r6]. - [JumpFPEqual] -> [^self concretizeConditionalJump: 16r4]. - [JumpFPNotEqual] -> [^self concretizeConditionalJump: 16r5]. - [JumpFPLess] -> [^self concretizeConditionalJump: 16r2]. - [JumpFPGreaterOrEqual] -> [^self concretizeConditionalJump: 16r3]. - [JumpFPGreater] -> [^self concretizeConditionalJump: 16r7]. - [JumpFPLessOrEqual] -> [^self concretizeConditionalJump: 16r6]. - [JumpFPOrdered] -> [^self concretizeConditionalJump: 16rB]. - [JumpFPUnordered] -> [^self concretizeConditionalJump: 16rA]. [RetN] -> [^self concretizeRetN]. "Arithmetic" [AddCqR] -> [^self concretizeAddCqR]. [AddCwR] -> [^self concretizeAddCwR]. [AddRR] -> [^self concretizeAddRR]. + "[AddRdRd] -> [^self concretizeSEE2OpRdRd: 16r58]." - [AddRdRd] -> [^self concretizeSEE2OpRdRd: 16r58]. [AndCqR] -> [^self concretizeAndCqR]. [AndCwR] -> [^self concretizeAndCwR]. [AndRR] -> [^self concretizeAndRR]. [CmpCqR] -> [^self concretizeCmpCqR]. [CmpCwR] -> [^self concretizeCmpCwR]. [CmpRR] -> [^self concretizeCmpRR]. [CmpRdRd] -> [^self concretizeCmpRdRd]. + "[DivRdRd] -> [^self concretizeSEE2OpRdRd: 16r5E]. + [MulRdRd] -> [^self concretizeSEE2OpRdRd: 16r59]." - [DivRdRd] -> [^self concretizeSEE2OpRdRd: 16r5E]. - [MulRdRd] -> [^self concretizeSEE2OpRdRd: 16r59]. [OrCqR] -> [^self concretizeOrCqR]. [OrCwR] -> [^self concretizeOrCwR]. [OrRR] -> [^self concretizeOrRR]. [SubCqR] -> [^self concretizeSubCqR]. [SubCwR] -> [^self concretizeSubCwR]. [SubRR] -> [^self concretizeSubRR]. + "[SubRdRd] -> [^self concretizeSEE2OpRdRd: 16r5C]." - [SubRdRd] -> [^self concretizeSEE2OpRdRd: 16r5C]. [SqrtRd] -> [^self concretizeSqrtRd]. [XorCwR] -> [^self concretizeXorCwR]. [XorRR] -> [^self concretizeXorRR]. [NegateR] -> [^self concretizeNegateR]. [LoadEffectiveAddressMwrR] -> [^self concretizeLoadEffectiveAddressMwrR]. [ArithmeticShiftRightCqR] -> [^self concretizeArithmeticShiftRightCqR]. [LogicalShiftRightCqR] -> [^self concretizeLogicalShiftRightCqR]. [LogicalShiftLeftCqR] -> [^self concretizeLogicalShiftLeftCqR]. [ArithmeticShiftRightRR] -> [^self concretizeArithmeticShiftRightRR]. [LogicalShiftLeftRR] -> [^self concretizeLogicalShiftLeftRR]. "Data Movement" [MoveCqR] -> [^self concretizeMoveCqR]. [MoveCwR] -> [^self concretizeMoveCwR]. [MoveRR] -> [^self concretizeMoveRR]. [MoveAwR] -> [^self concretizeMoveAwR]. [MoveRAw] -> [^self concretizeMoveRAw]. [MoveMbrR] -> [^self concretizeMoveMbrR]. [MoveRMbr] -> [^self concretizeMoveRMbr]. [MoveM16rR] -> [^self concretizeMoveM16rR]. [MoveM64rRd] -> [^self concretizeMoveM64rRd]. [MoveMwrR] -> [^self concretizeMoveMwrR]. [MoveXbrRR] -> [^self concretizeMoveXbrRR]. [MoveXwrRR] -> [^self concretizeMoveXwrRR]. [MoveRXwrR] -> [^self concretizeMoveRXwrR]. [MoveRMwr] -> [^self concretizeMoveRMwr]. [MoveRdM64r] -> [^self concretizeMoveRdM64r]. [PopR] -> [^self concretizePopR]. [PushR] -> [^self concretizePushR]. [PushCw] -> [^self concretizePushCw]. [PrefetchAw] -> [^self concretizePrefetchAw]. "Conversion" [ConvertRRd] -> [^self concretizeConvertRRd] }! Item was removed: - ----- Method: CogARMCompiler>>genAlignCStackSavingRegisters:numArgs:wordAlignment: (in category 'abi') ----- - genAlignCStackSavingRegisters: saveRegs numArgs: numArgs wordAlignment: alignment - | wordsPushedModAlignment delta | - wordsPushedModAlignment := ((saveRegs ifTrue: [16] ifFalse: [0]) "number of registers saved by genSaveRegisters" - + numArgs) - \\ alignment. - wordsPushedModAlignment ~= 0 ifTrue: - [delta := alignment - wordsPushedModAlignment. - cogit SubCq: delta * 4 R: SPReg]. - ^0! Item was added: + ----- Method: CogARMCompiler>>genSaveRegisters (in category 'abi') ----- + genSaveRegisters + "Save the general purpose registers for a trampoline call." + "eliot => lars, this should probably save r0 through r12, since SP, LR and PC + have specific purposes and don't need to be saved. Save r0 through r11 if r12 + is being used as a frame pointer. This can use the store multiple instruction STM, + for which you'll need to add a class var to CogARMCompiler, because it is specific + to ARM. HTH" + self shouldBeImplemented! Item was added: + ----- Method: CogARMCompiler>>machineCodeBytes (in category 'generate machine code') ----- + machineCodeBytes + "Answer the maximum number of bytes of machine code generated for any abstract instruction. + e.g. MoveRAw => + mov R3, #<addressByte1>, 12 + orr R3, R3, #<addressByte2>, 8 + orr R3, R3, #<addressByte3>, 4 + STR srcReg, [R3, + addressByte0]" + ^16! Item was added: + ----- Method: CogARMCompiler>>numberOfSaveableRegisters (in category 'abi') ----- + numberOfSaveableRegisters + "Answer the number of registers to be saved in a trampoline call that saves registers. + R0 through R12, See genSaveRegisters." + <cmacro: '() 13'> + ^13! Item was changed: VMStructType subclass: #CogAbstractInstruction instanceVariableNames: 'opcode machineCodeSize maxSize machineCode operands address dependent cogit objectMemory bcpc' + classVariableNames: '' - classVariableNames: 'MachineCodeSize NumberOfRegisters' poolDictionaries: 'CogRTLOpcodes' category: 'VMMaker-JIT'! + !CogAbstractInstruction commentStamp: 'eem 7/17/2012 15:04' prior: 0! + I am an abstract instruction generated by the Cogit. I am subsequently concretized to machine code for the current processor. A sequence of concretized CogAbstractInstructions are concatenated to form the code for a CogMethod. I am an abstract class. My concrete subclasses concretize to the machine code of a specific processor.! - !CogAbstractInstruction commentStamp: '<historical>' prior: 0! - I am an abstract instruction generated by the Cogit. I am subsequently concretized to machine code for the current processor. A sequence of concretized CogAbstractInstructions are concatenated to form the code for a CogMethod.! Item was changed: ----- Method: CogAbstractInstruction class>>instVarNamesAndTypesForTranslationDo: (in category 'translation') ----- instVarNamesAndTypesForTranslationDo: aBinaryBlock "enumerate aBinaryBlock with the names and C type strings for the inst vars to include in an AbstractInstruction struct." + "CogIA32Compiler printTypedefOn: Transcript" + "CogARMCompiler printTypedefOn: Transcript" - "self printTypedefOn: Transcript" self filteredInstVarNames do: [:ivn| ivn ~= 'bcpc' ifTrue: [aBinaryBlock value: ivn value: (ivn caseOf: { ['address'] -> ['unsigned long']. + ['machineCode'] -> [{'unsigned char'. '[', self basicNew machineCodeBytes printString, ']'}]. - ['machineCode'] -> [{'unsigned char'. '[', MachineCodeSize printString, ']'}]. ['operands'] -> [#('unsigned long' '[3]')]. ['dependent'] -> ['struct _AbstractInstruction *']} otherwise: [#char])]]! Item was changed: ----- Method: CogAbstractInstruction>>concretizeAt: (in category 'generate machine code') ----- concretizeAt: actualAddress + "Generate concrete machine code for the instruction at actualAddress, + setting machineCodeSize, and answer the following address." - "Attempt to generate concrete machine code for the instruction at actualAddress. - If possible, generate the relevant machine code, setting machineCodeSize, - and answer the following address. Otherwise answer -1." self subclassResponsibility! Item was changed: ----- Method: CogAbstractInstruction>>genAlignCStackSavingRegisters:numArgs:wordAlignment: (in category 'abi') ----- genAlignCStackSavingRegisters: saveRegs numArgs: numArgs wordAlignment: alignment | wordsPushedModAlignment delta | + wordsPushedModAlignment := ((saveRegs ifTrue: [self numberOfSaveableRegisters] ifFalse: [0]) + + numArgs) + \\ alignment. - wordsPushedModAlignment := ((saveRegs ifTrue: [NumberOfRegisters] ifFalse: [0]) "number of registers saved by genSaveRegisters" - + numArgs) - \\ alignment. wordsPushedModAlignment ~= 0 ifTrue: [delta := alignment - wordsPushedModAlignment. cogit SubCq: delta * 4 R: SPReg]. ^0! Item was added: + ----- Method: CogAbstractInstruction>>genSaveRegisters (in category 'abi') ----- + genSaveRegisters + "Save the general purpose registers for a trampoline call." + self subclassResponsibility! Item was changed: ----- Method: CogAbstractInstruction>>initialize (in category 'initialization') ----- initialize "This method intializes the Smalltalk instance. The C instance is merely a struct and doesn't need initialization." <doNotGenerate> operands := CArrayAccessor on: (Array new: 3). + machineCode := CArrayAccessor on: (ByteArray new: self machineCodeBytes)! - machineCode := CArrayAccessor on: (ByteArray new: MachineCodeSize)! Item was added: + ----- Method: CogAbstractInstruction>>machineCodeBytes (in category 'generate machine code') ----- + machineCodeBytes + "Answer the maximum number of bytes of machine code generated for any abstract instruction." + self subclassResponsibility! Item was added: + ----- Method: CogAbstractInstruction>>numberOfSaveableRegisters (in category 'abi') ----- + numberOfSaveableRegisters + "Answer the number of registers to be saved in a trampoline call that saves registers. + See genSaveRegisters" + self subclassResponsibility! Item was changed: ----- Method: CogIA32Compiler class>>initialize (in category 'class initialization') ----- initialize "Initialize various IA32/x86 instruction-related constants. [1] IA-32 Intel® Architecture Software Developer's Manual Volume 2A: Instruction Set Reference, A-M" "CogIA32Compiler initialize" | specificOpcodes refs | self ~~ CogIA32Compiler ifTrue: [^self]. "N.B. EAX ECX and EDX are caller-save (scratch) registers. EBX ESI and EDI are callee-save; see concreteRegisterFor:" EAX := 0. ECX := 1. "Were they completely mad or simply sadistic?" EDX := 2. EBX := 3. ESP := 4. EBP := 5. ESI := 6. EDI := 7. XMM0L := 0. XMM1L := 2. XMM2L := 4. XMM3L := 6. XMM4L := 8. XMM5L := 10. XMM6L := 12. XMM7L := 14. XMM0H := 1. XMM1H := 3. XMM2H := 5. XMM3H := 7. XMM4H := 9. XMM5H := 11. XMM6H := 13. XMM7H := 15. "Mod R/M Mod fields. See [1] Sec 2.4, 2.5 & 2.6 & Table 2-2" ModRegInd := 0. ModRegIndSIB := 4. ModRegIndDisp32 := 5. ModRegRegDisp8 := 1. ModRegRegDisp32 := 2. ModReg := 3. "SIB Scaled Index modes. See [1] Sec 2.4, 2.5 & 2.6 & Table 2-3" SIB1 := 0. SIB2 := 1. SIB4 := 2. SIB8 := 3. "Specific instructions" LastRTLCode isNil ifTrue: [CogRTLOpcodes initialize]. specificOpcodes := #(CDQ IDIVR IMULRR CPUID LFENCE MFENCE SFENCE LOCK CMPXCHGAwR CMPXCHGMwrR XCHGAwR XCHGMwrR XCHGRR). refs := (thisContext method literals select: [:l| l isVariableBinding and: [classPool includesKey: l key]]) collect: [:ea| ea key]. (classPool keys reject: [:k| (specificOpcodes includes: k) or: [refs includes: k]]) do: [:k| Undeclared declare: k from: classPool]. specificOpcodes withIndexDo: [:classVarName :value| self classPool declare: classVarName from: Undeclared; + at: classVarName put: value + LastRTLCode - 1]! - at: classVarName put: value + LastRTLCode - 1]. - - MachineCodeSize := 10. "e.g. lock movsd 0x400(%esp),%xmm4 => f0 f2 0f 10 a4 24 00 04 00 00" - NumberOfRegisters := 6! Item was changed: ----- Method: CogIA32Compiler>>concretizeAt: (in category 'generate machine code') ----- concretizeAt: actualAddress + "Generate concrete machine code for the instruction at actualAddress, + setting machineCodeSize, and answer the following address." - "Attempt to generate concrete machine code for the instruction at address. - If possible, generate the relevant machine code, setting machineCodeSize, - and answer the following address. Otherwise answer -1." address := actualAddress. self dispatchConcretize. self assert: (maxSize = nil or: [maxSize >= machineCodeSize]). ^actualAddress + machineCodeSize! Item was changed: ----- Method: CogIA32Compiler>>genSaveRegisters (in category 'abi') ----- genSaveRegisters + "Save the general purpose registers for a trampoline call." cogit PushR: EDI; PushR: ESI; PushR: EDX; PushR: ECX; PushR: EBX; PushR: EAX. ^0! Item was added: + ----- Method: CogIA32Compiler>>machineCodeBytes (in category 'generate machine code') ----- + machineCodeBytes + "Answer the maximum number of bytes of machine code generated for any abstract instruction. + e.g. lock movsd 0x400(%esp),%xmm4 => f0 f2 0f 10 a4 24 00 04 00 00" + ^10! Item was added: + ----- Method: CogIA32Compiler>>numberOfSaveableRegisters (in category 'abi') ----- + numberOfSaveableRegisters + "Answer the number of registers to be saved in a trampoline call that saves registers. + See genSaveRegisters" + <cmacro: '() 6'> + ^6!

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VM Maker: VMMaker.oscog-lw.185.mcz
by commits＠source.squeak.org 17 Jul '12

17 Jul '12

Lars Wassermann uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-lw.185.mcz ==================== Summary ==================== Name: VMMaker.oscog-lw.185 Author: lw Time: 17 July 2012, 10:38:20.729 pm UUID: 6f27e321-2227-2540-8b08-0e6a2cea3a99 Ancestors: VMMaker.oscog-eem.184 Added multiple functions which are called when starting the simulator. The simulator still does require more methods. Pulled up genAlignCStackSavingRegisters:numArgs:wordAlignment:, because the ARMCompiler implementation would have been the same except for the constant. Added that constant as NumberOfRegisters to AbstractInstruction. =============== Diff against VMMaker.oscog-eem.184 =============== Item was added: + CogAbstractInstruction subclass: #CogARMCompiler + instanceVariableNames: '' + classVariableNames: 'LR PC R0 R1 R10 R11 R12 R2 R3 R4 R5 R6 R7 R8 R9 SP' + poolDictionaries: '' + category: 'VMMaker-JIT'! Item was added: + ----- Method: CogARMCompiler class>>initialize (in category 'class initialization') ----- + initialize + super initialize. + + "Initialize various ARM instruction-related constants." + "CogARMCompiler initialize" + + R0 := 0. R1 := 1. + R2 := 2. R3 := 3. + R4 := 4. R5 := 5. + R6 := 6. R7 := 7. + R8 := 8. R9 := 9. + R10 := 10. R11 := 11. + R12 := 12. + SP := 13. + LR := 14. + PC := 15. + + MachineCodeSize := 16. "atm: MoveRAw" + NumberOfRegisters := 16.! Item was added: + ----- Method: CogARMCompiler>>computeMaximumSize (in category 'generate machine code') ----- + computeMaximumSize + "Because we don't use Thumb, each instruction has a multiple of 4 bytes. Most have exactly 4, but some abstract opcodes need more than one instruction." + opcode + caseOf: { + [Label] -> [^maxSize := 0]. + [AlignmentNops] -> [^maxSize := (operands at: 0) - 1]. + [MoveRAw] -> [^maxSize := 16 "3 for loadAllButLSB"]. + [RetN] -> [^(operands at: 0) = 0 + ifTrue: [maxSize := 4] + ifFalse: [maxSize := 8]]} + otherwise: [^maxSize := 4]. + ^4 "to keep C compiler quiet" + ! Item was added: + ----- Method: CogARMCompiler>>concreteRegister: (in category 'encoding') ----- + concreteRegister: registerIndex + "Map a possibly abstract register into a concrete one. Abstract registers + (defined in CogAbstractOpcodes) are all negative. If registerIndex is + negative assume it is an abstract register." + + "N.B. According to BSABI, R0-R3 are caller-save, R4-R12 are callee save. + Note that R9 might be a special register for the implementation. In some slides it is refered to as sb. R10 contains the stack limit (sl), R11 the fp. R12 is an intra-procedure scratch instruction pointer for link purposes. + R3 is used as temporary inside a single abstract opcode implementation" + + ^registerIndex + caseOf: { + [TempReg] -> [R0]. + [ClassReg] -> [R1]. + [ReceiverResultReg] -> [R2]. + [SendNumArgsReg] -> [R6]. + [SPReg] -> [SP]. + [FPReg] -> [R11]. + [Arg0Reg] -> [R4]. + [Arg1Reg] -> [R5] } + otherwise: + [self assert: (registerIndex between: R0 and: PC). + registerIndex]! Item was added: + ----- Method: CogARMCompiler>>concretizeAt: (in category 'generate machine code') ----- + concretizeAt: actualAddress + "Attempt to generate concrete machine code for the instruction at address. + If possible, generate the relevant machine code, setting machineCodeSize, + and answer the following address. Otherwise answer -1." + + self assert: actualAddress \\ 4 = 0. + address := actualAddress. + self dispatchConcretize. + self assert: (maxSize = nil or: [maxSize >= machineCodeSize]). + ^actualAddress + machineCodeSize! Item was added: + ----- Method: CogARMCompiler>>concretizeMoveRAw (in category 'generate machine code - concretize') ----- + concretizeMoveRAw + "Will get inlined into concretizeAt: switch." + <inline: true> + | srcReg destAddr loadSize | + srcReg := self concreteRegister: (operands at: 0). + destAddr := operands at: 1. + "load the address into R3" + loadSize := self loadAllButLSBWord: destAddr. + machineCode + at: loadSize + 3 put: 16rE5; "STR srcReg, [R3, +LSB(addr)]" + at: loadSize + 2 put: 16r83; + at: loadSize + 1 put: (srcReg << 4); + at: loadSize put: (destAddr bitAnd: 16rFF). + ^machineCodeSize := loadSize + 4! Item was added: + ----- Method: CogARMCompiler>>concretizeMoveRR (in category 'generate machine code - concretize') ----- + concretizeMoveRR + "Will get inlined into concretizeAt: switch." + <inline: true> + | srcReg destReg | + srcReg := self concreteRegister: (operands at: 0). + destReg := self concreteRegister: (operands at: 1). + self machineCodeAt: 0 put: 16rE1A0F00F. + machineCode + at: 1 put: (16rF0 bitAnd: destReg << 4); + at: 0 put: (16r0F bitAnd: srcReg). + ^machineCodeSize := 4! Item was added: + ----- Method: CogARMCompiler>>concretizeRetN (in category 'generate machine code - concretize') ----- + concretizeRetN + "Will get inlined into concretizeAt: switch." + <inline: true> + | offset | + offset := operands at: 0. + offset = 0 ifTrue: + [self machineCodeAt: 0 put: 16rE8BD8000. "pop {pc}" + ^machineCodeSize := 4]. + self assert: offset < 32. "We have an 8 bit immediate. If needed, we could rotate it less than 30 bit." + self machineCodeAt: 0 put: 16rE28DDFFF. "add sp, sp, #n, 14" + machineCode + at: 0 put: offset. "no bit-mask needed, because of the assert" + self machineCodeAt: 4 put: 16rE8BD8000. "pop {pc}" + ^machineCodeSize := 8! Item was added: + ----- Method: CogARMCompiler>>dispatchConcretize (in category 'generate machine code') ----- + dispatchConcretize + "Attempt to generate concrete machine code for the instruction at address. + This is the inner dispatch of concretizeAt: actualAddress which exists only + to get around the branch size limits in the SqueakV3 (blue book derived) + bytecode set." + + opcode caseOf: { + "Noops & Pseudo Ops" + [Label] -> [^self concretizeLabel]. + [AlignmentNops] -> [^self concretizeAlignmentNops]. + [Fill16] -> [^self concretizeFill16]. + [Fill32] -> [^self concretizeFill32]. + [FillFromWord] -> [^self concretizeFillFromWord]. + [Nop] -> [^self concretizeNop]. + "Specific Control/Data Movement" + "[CDQ] -> [^self concretizeCDQ]. + [IDIVR] -> [^self concretizeIDIVR]. + [IMULRR] -> [^self concretizeMulRR]. + [CPUID] -> [^self concretizeCPUID]. + [CMPXCHGAwR] -> [^self concretizeCMPXCHGAwR]. + [CMPXCHGMwrR] -> [^self concretizeCMPXCHGMwrR]. + [LFENCE] -> [^self concretizeFENCE: 5]. + [MFENCE] -> [^self concretizeFENCE: 6]. + [SFENCE] -> [^self concretizeFENCE: 7]. + [LOCK] -> [^self concretizeLOCK]. + [XCHGAwR] -> [^self concretizeXCHGAwR]. + [XCHGMwrR] -> [^self concretizeXCHGMwrR]. + [XCHGRR] -> [^self concretizeXCHGRR]." + "Control" + [Call] -> [^self concretizeCall]. + [JumpR] -> [^self concretizeJumpR]. + [JumpLong] -> [^self concretizeJumpLong]. + [JumpLongZero] -> [^self concretizeConditionalJumpLong: 16r4]. + [JumpLongNonZero] -> [^self concretizeConditionalJumpLong: 16r5]. + [Jump] -> [^self concretizeJump]. + "Table B-1 Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture" + [JumpZero] -> [^self concretizeConditionalJump: 16r4]. + [JumpNonZero] -> [^self concretizeConditionalJump: 16r5]. + [JumpNegative] -> [^self concretizeConditionalJump: 16r8]. + [JumpNonNegative] -> [^self concretizeConditionalJump: 16r9]. + [JumpOverflow] -> [^self concretizeConditionalJump: 16r0]. + [JumpNoOverflow] -> [^self concretizeConditionalJump: 16r1]. + [JumpCarry] -> [^self concretizeConditionalJump: 16r2]. + [JumpNoCarry] -> [^self concretizeConditionalJump: 16r3]. + [JumpLess] -> [^self concretizeConditionalJump: 16rC]. + [JumpGreaterOrEqual] -> [^self concretizeConditionalJump: 16rD]. + [JumpGreater] -> [^self concretizeConditionalJump: 16rF]. + [JumpLessOrEqual] -> [^self concretizeConditionalJump: 16rE]. + [JumpBelow] -> [^self concretizeConditionalJump: 16r2]. + [JumpAboveOrEqual] -> [^self concretizeConditionalJump: 16r3]. + [JumpAbove] -> [^self concretizeConditionalJump: 16r7]. + [JumpBelowOrEqual] -> [^self concretizeConditionalJump: 16r6]. + [JumpFPEqual] -> [^self concretizeConditionalJump: 16r4]. + [JumpFPNotEqual] -> [^self concretizeConditionalJump: 16r5]. + [JumpFPLess] -> [^self concretizeConditionalJump: 16r2]. + [JumpFPGreaterOrEqual] -> [^self concretizeConditionalJump: 16r3]. + [JumpFPGreater] -> [^self concretizeConditionalJump: 16r7]. + [JumpFPLessOrEqual] -> [^self concretizeConditionalJump: 16r6]. + [JumpFPOrdered] -> [^self concretizeConditionalJump: 16rB]. + [JumpFPUnordered] -> [^self concretizeConditionalJump: 16rA]. + [RetN] -> [^self concretizeRetN]. + "Arithmetic" + [AddCqR] -> [^self concretizeAddCqR]. + [AddCwR] -> [^self concretizeAddCwR]. + [AddRR] -> [^self concretizeAddRR]. + [AddRdRd] -> [^self concretizeSEE2OpRdRd: 16r58]. + [AndCqR] -> [^self concretizeAndCqR]. + [AndCwR] -> [^self concretizeAndCwR]. + [AndRR] -> [^self concretizeAndRR]. + [CmpCqR] -> [^self concretizeCmpCqR]. + [CmpCwR] -> [^self concretizeCmpCwR]. + [CmpRR] -> [^self concretizeCmpRR]. + [CmpRdRd] -> [^self concretizeCmpRdRd]. + [DivRdRd] -> [^self concretizeSEE2OpRdRd: 16r5E]. + [MulRdRd] -> [^self concretizeSEE2OpRdRd: 16r59]. + [OrCqR] -> [^self concretizeOrCqR]. + [OrCwR] -> [^self concretizeOrCwR]. + [OrRR] -> [^self concretizeOrRR]. + [SubCqR] -> [^self concretizeSubCqR]. + [SubCwR] -> [^self concretizeSubCwR]. + [SubRR] -> [^self concretizeSubRR]. + [SubRdRd] -> [^self concretizeSEE2OpRdRd: 16r5C]. + [SqrtRd] -> [^self concretizeSqrtRd]. + [XorCwR] -> [^self concretizeXorCwR]. + [XorRR] -> [^self concretizeXorRR]. + [NegateR] -> [^self concretizeNegateR]. + [LoadEffectiveAddressMwrR] -> [^self concretizeLoadEffectiveAddressMwrR]. + [ArithmeticShiftRightCqR] -> [^self concretizeArithmeticShiftRightCqR]. + [LogicalShiftRightCqR] -> [^self concretizeLogicalShiftRightCqR]. + [LogicalShiftLeftCqR] -> [^self concretizeLogicalShiftLeftCqR]. + [ArithmeticShiftRightRR] -> [^self concretizeArithmeticShiftRightRR]. + [LogicalShiftLeftRR] -> [^self concretizeLogicalShiftLeftRR]. + "Data Movement" + [MoveCqR] -> [^self concretizeMoveCqR]. + [MoveCwR] -> [^self concretizeMoveCwR]. + [MoveRR] -> [^self concretizeMoveRR]. + [MoveAwR] -> [^self concretizeMoveAwR]. + [MoveRAw] -> [^self concretizeMoveRAw]. + [MoveMbrR] -> [^self concretizeMoveMbrR]. + [MoveRMbr] -> [^self concretizeMoveRMbr]. + [MoveM16rR] -> [^self concretizeMoveM16rR]. + [MoveM64rRd] -> [^self concretizeMoveM64rRd]. + [MoveMwrR] -> [^self concretizeMoveMwrR]. + [MoveXbrRR] -> [^self concretizeMoveXbrRR]. + [MoveXwrRR] -> [^self concretizeMoveXwrRR]. + [MoveRXwrR] -> [^self concretizeMoveRXwrR]. + [MoveRMwr] -> [^self concretizeMoveRMwr]. + [MoveRdM64r] -> [^self concretizeMoveRdM64r]. + [PopR] -> [^self concretizePopR]. + [PushR] -> [^self concretizePushR]. + [PushCw] -> [^self concretizePushCw]. + [PrefetchAw] -> [^self concretizePrefetchAw]. + "Conversion" + [ConvertRRd] -> [^self concretizeConvertRRd] }! Item was added: + ----- Method: CogARMCompiler>>genAlignCStackSavingRegisters:numArgs:wordAlignment: (in category 'abi') ----- + genAlignCStackSavingRegisters: saveRegs numArgs: numArgs wordAlignment: alignment + | wordsPushedModAlignment delta | + wordsPushedModAlignment := ((saveRegs ifTrue: [16] ifFalse: [0]) "number of registers saved by genSaveRegisters" + + numArgs) + \\ alignment. + wordsPushedModAlignment ~= 0 ifTrue: + [delta := alignment - wordsPushedModAlignment. + cogit SubCq: delta * 4 R: SPReg]. + ^0! Item was added: + ----- Method: CogARMCompiler>>genGetLeafCallStackPointerFunction (in category 'assertions') ----- + genGetLeafCallStackPointerFunction + cogit MoveR: SP R: R0. + cogit RetN: 0! Item was added: + ----- Method: CogARMCompiler>>isPCDependent (in category 'testing') ----- + isPCDependent + "Answer if the receiver is a pc-dependent instruction." + ^self isJump or: [opcode = AlignmentNops]! Item was added: + ----- Method: CogARMCompiler>>leafCallStackPointerDelta (in category 'abi') ----- + leafCallStackPointerDelta + "Answer the delta from the stack pointer after a call to the stack pointer + immediately prior to the call. This is used to compute the stack pointer + immediately prior to call from within a leaf routine, which in turn is used + to capture the c stack pointer to use in trampolines back into the C run-time." + "This might actually be false, since directly after a call, lr, fp and variable registers need be pushed onto the stack. It depends on the implementation of call." + ^0! Item was added: + ----- Method: CogARMCompiler>>loadAllButLSBWord: (in category 'generate machine code - concretize') ----- + loadAllButLSBWord: aWord + "This loads aWord into the inter-opcode temporary register. Because most ARM instruction enable using a (8-12bit) offset relative to a register, the LS Byte can be included in that instruction, saving one instruction." + "The temporary register within abstract opcodes is R3" + self + machineCodeAt: 0 put: 16rE3A03C00; "mov R3, #<second lowest byte>, 12" + machineCodeAt: 4 put: 16rE3833800; "orr R3, R3, #<third lowest byte>, 8" + machineCodeAt: 8 put: 16rE3833400. "orr R3, R3, #<most significant byte>, 4" + "fill in the bytes" + machineCode + at: 0 put: (aWord >> 8 bitAnd: 16rFF); + at: 4 put: (aWord >> 12 bitAnd: 16rFF); + at: 8 put: (aWord >> 24 bitAnd: 16rFF). + ^12! Item was added: + ----- Method: CogARMCompiler>>machineCodeAt:put: (in category 'accessing') ----- + machineCodeAt: anOffset put: aWord + "add aWord to machineCode, with little endian" + machineCode + at: anOffset + 3 put: (16rFF bitAnd: aWord >> 24); + at: anOffset + 2 put: (16rFF bitAnd: aWord >> 16); + at: anOffset + 1 put: (16rFF bitAnd: aWord >> 8); + at: anOffset"+ 0"put: (16rFF bitAnd: aWord">> 0")! Item was added: + ----- Method: CogARMCompiler>>nopsFrom:to: (in category 'generate machine code - concretize') ----- + nopsFrom: startAddr to: endAddr + self assert: endAddr - startAddr + 1 \\ 4 = 0. + startAddr to: endAddr by: 4 do: + [:p| objectMemory + byteAt: p put: 16r01; + byteAt: p+1 put: 16r10; + byteAt: p+2 put: 16rA0; + byteAt: p+3 put: 16rE1]! Item was added: + ----- Method: CogARMCompiler>>stackPageInterruptHeadroomBytes (in category 'accessing') ----- + stackPageInterruptHeadroomBytes + "Return a minimum amount of headroom for each stack page (in bytes). In a + JIT the stack has to have room for interrupt handlers which will run on the stack. + According to ARM architecture v5 reference manual chapter A2.6, the basic interrupt procedure does not push anything onto the stack. It uses SPSR_err and R14_err to preserve state. Afterwards, it calls an interrupt procedure. So leave some room." + ^128 "32 words"! Item was added: + CogARMCompiler subclass: #CogARMCompilerForTests + instanceVariableNames: '' + classVariableNames: '' + poolDictionaries: '' + category: 'VMMaker-Tests'! Item was added: + ----- Method: CogARMCompilerForTests class>>registers (in category 'test support') ----- + registers + ^{ R0. R1. R2. R3. R4. R5. R6. R7. R8. R9. R10. R11. R12. SP. LR. PC } "a.k.a. (0 to: 15)"! Item was added: + ----- Method: CogARMCompilerForTests class>>registersWithNamesDo: (in category 'test support') ----- + registersWithNamesDo: aBinaryBlock + self registers + with: #('r0' 'r1' 'r2' 'r3' 'r4' 'r5' 'r6' 'r7' 'r8' 'r9' 'r10' 'fp' 'r12' 'sp' 'lr' 'pc') + do: aBinaryBlock! Item was added: + AbstractInstructionTests subclass: #CogARMCompilerTests + instanceVariableNames: '' + classVariableNames: '' + poolDictionaries: '' + category: 'VMMaker-Tests'! Item was added: + ----- Method: CogARMCompilerTests>>concreteCompilerClass (in category 'accessing') ----- + concreteCompilerClass + ^CogARMCompilerForTests! Item was added: + ----- Method: CogARMCompilerTests>>processor (in category 'accessing') ----- + processor + processor ifNil: + [processor := GdbARMAlien new]. + ^processor! Item was added: + ----- Method: CogARMCompilerTests>>strip: (in category 'accessing') ----- + strip: aFancyDisassembledInstruction + "When havin an immediate > 15, the disassembler appends ' ; 0x\d\d'. That is stripped." + ^(aFancyDisassembledInstruction copyUpTo: $;) withBlanksTrimmed! Item was added: + ----- Method: CogARMCompilerTests>>testRetN (in category 'tests') ----- + testRetN + "self new testRetN" + + #(0) do: + [:n| | inst len | + inst := self gen: RetN operand: n. + len := inst concretizeAt: 0. + self processor + disassembleInstructionAt: 0 + In: inst machineCode object + into: [:str :sz| | plainJane herIntended | + "Convert e.g. '00000000: movl %eax, 0x2(%eax) : 89 40 02' to 'movl %eax, 0x2(%eax)'" + plainJane := self strip: str. + herIntended := 'pop {pc}'. + self assert: (plainJane match: herIntended). + self assert: len = sz]]. + + #(1 2 4 8 16 31) do: + [:n| | inst len | + inst := self gen: RetN operand: n. + len := inst concretizeAt: 0. + self processor + disassembleInstructionAt: 0 + In: inst machineCode object + into: [:str :sz| | plainJane herIntended | + "Convert e.g. '00000000: movl %eax, 0x2(%eax) : 89 40 02' to 'movl %eax, 0x2(%eax)'" + plainJane := self strip: str. + herIntended := 'add sp, sp, #', n asString,', 30'. + self assert: (plainJane match: herIntended). + self assert: len = 8]]! Item was changed: VMStructType subclass: #CogAbstractInstruction instanceVariableNames: 'opcode machineCodeSize maxSize machineCode operands address dependent cogit objectMemory bcpc' + classVariableNames: 'MachineCodeSize NumberOfRegisters' - classVariableNames: 'MachineCodeSize' poolDictionaries: 'CogRTLOpcodes' category: 'VMMaker-JIT'! !CogAbstractInstruction commentStamp: '<historical>' prior: 0! I am an abstract instruction generated by the Cogit. I am subsequently concretized to machine code for the current processor. A sequence of concretized CogAbstractInstructions are concatenated to form the code for a CogMethod.! Item was added: + ----- Method: CogAbstractInstruction>>genAlignCStackSavingRegisters:numArgs:wordAlignment: (in category 'abi') ----- + genAlignCStackSavingRegisters: saveRegs numArgs: numArgs wordAlignment: alignment + | wordsPushedModAlignment delta | + wordsPushedModAlignment := ((saveRegs ifTrue: [NumberOfRegisters] ifFalse: [0]) "number of registers saved by genSaveRegisters" + + numArgs) + \\ alignment. + wordsPushedModAlignment ~= 0 ifTrue: + [delta := alignment - wordsPushedModAlignment. + cogit SubCq: delta * 4 R: SPReg]. + ^0! Item was changed: ----- Method: CogIA32Compiler class>>initialize (in category 'class initialization') ----- initialize "Initialize various IA32/x86 instruction-related constants. [1] IA-32 Intel® Architecture Software Developer's Manual Volume 2A: Instruction Set Reference, A-M" "CogIA32Compiler initialize" | specificOpcodes refs | self ~~ CogIA32Compiler ifTrue: [^self]. "N.B. EAX ECX and EDX are caller-save (scratch) registers. EBX ESI and EDI are callee-save; see concreteRegisterFor:" EAX := 0. ECX := 1. "Were they completely mad or simply sadistic?" EDX := 2. EBX := 3. ESP := 4. EBP := 5. ESI := 6. EDI := 7. XMM0L := 0. XMM1L := 2. XMM2L := 4. XMM3L := 6. XMM4L := 8. XMM5L := 10. XMM6L := 12. XMM7L := 14. XMM0H := 1. XMM1H := 3. XMM2H := 5. XMM3H := 7. XMM4H := 9. XMM5H := 11. XMM6H := 13. XMM7H := 15. "Mod R/M Mod fields. See [1] Sec 2.4, 2.5 & 2.6 & Table 2-2" ModRegInd := 0. ModRegIndSIB := 4. ModRegIndDisp32 := 5. ModRegRegDisp8 := 1. ModRegRegDisp32 := 2. ModReg := 3. "SIB Scaled Index modes. See [1] Sec 2.4, 2.5 & 2.6 & Table 2-3" SIB1 := 0. SIB2 := 1. SIB4 := 2. SIB8 := 3. "Specific instructions" LastRTLCode isNil ifTrue: [CogRTLOpcodes initialize]. specificOpcodes := #(CDQ IDIVR IMULRR CPUID LFENCE MFENCE SFENCE LOCK CMPXCHGAwR CMPXCHGMwrR XCHGAwR XCHGMwrR XCHGRR). refs := (thisContext method literals select: [:l| l isVariableBinding and: [classPool includesKey: l key]]) collect: [:ea| ea key]. (classPool keys reject: [:k| (specificOpcodes includes: k) or: [refs includes: k]]) do: [:k| Undeclared declare: k from: classPool]. specificOpcodes withIndexDo: [:classVarName :value| self classPool declare: classVarName from: Undeclared; at: classVarName put: value + LastRTLCode - 1]. + MachineCodeSize := 10. "e.g. lock movsd 0x400(%esp),%xmm4 => f0 f2 0f 10 a4 24 00 04 00 00" + NumberOfRegisters := 6! - MachineCodeSize := 10 "e.g. lock movsd 0x400(%esp),%xmm4 => f0 f2 0f 10 a4 24 00 04 00 00"! Item was removed: - ----- Method: CogIA32Compiler>>genAlignCStackSavingRegisters:numArgs:wordAlignment: (in category 'abi') ----- - genAlignCStackSavingRegisters: saveRegs numArgs: numArgs wordAlignment: alignment - | wordsPushedModAlignment delta | - wordsPushedModAlignment := ((saveRegs ifTrue: [6] ifFalse: [0]) "number of registers saved by genSaveRegisters" - + numArgs) - \\ alignment. - wordsPushedModAlignment ~= 0 ifTrue: - [delta := alignment - wordsPushedModAlignment. - cogit SubCq: delta * 4 R: SPReg]. - ^0!

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VM Maker: Cog-lw.50.mcz
by commits＠source.squeak.org 17 Jul '12

17 Jul '12

Lars Wassermann uploaded a new version of Cog to project VM Maker: http://source.squeak.org/VMMaker/Cog-lw.50.mcz ==================== Summary ==================== Name: Cog-lw.50 Author: lw Time: 17 July 2012, 10:15:56.611 pm UUID: 00c1fd03-0c9a-fe46-8b5f-1d879ca17cd4 Ancestors: Cog-eem.49 - Removed the testMOVSD which was is not adaptable for ARM since there is no MOVSD-opcode. - Added some methods which are used by the simulator, namely setStackAlignmentDelta:, setFramePointer:stackPointer:, and endianness. - Switched Transcript logging of the Nfib1 test off. =============== Diff against Cog-eem.49 =============== Item was added: + ----- Method: CogProcessorAlien>>endianness (in category 'accessing-abstract') ----- + endianness + self subclassResponsibility! Item was added: + ----- Method: GdbARMAlien class>>initialize (in category 'class initialization') ----- + initialize + "GdbARMAlien initialize" + super initialize. + PostBuildStackDelta := 0.! Item was added: + ----- Method: GdbARMAlien class>>setStackAlignmentDelta: (in category 'accessing') ----- + setStackAlignmentDelta: stackAlignmentDelta + "copy of BochsIA32Alien>>#setStackAlignmentDelta:, because I don't know yet what it's effect is." + self assert: stackAlignmentDelta isPowerOfTwo. + PostBuildStackDelta := stackAlignmentDelta > 8 + ifTrue: [stackAlignmentDelta - 8] + ifFalse: [0]! Item was added: + ----- Method: GdbARMAlien>>endianness (in category 'accessing-abstract') ----- + endianness + ^#little! Item was added: + ----- Method: GdbARMAlien>>fp (in category 'accessing-abstract') ----- + fp + "According to the use in SVr4" + ^self r11! Item was added: + ----- Method: GdbARMAlien>>fp: (in category 'accessing-abstract') ----- + fp: aNumber + "According to SVr4, the frame pointer is stored in r11" + ^self r11: aNumber! Item was added: + ----- Method: GdbARMAlien>>setFramePointer:stackPointer: (in category 'accessing-abstract') ----- + setFramePointer: framePointer stackPointer: stackPointer + "Initialize the processor's frame and stack pointers" + self fp: framePointer. + self sp: stackPointer! Item was removed: - ----- Method: GdbARMAlienTests>>testMOVSD (in category 'tests') ----- - testMOVSD - "Test MOVSD indirecting through edx." - "self new testMOVSD" - self processor - edx: 0; - eip: 0; - singleStepIn: {16rF2. 16r0F. 16r10. 16r42. 16r04. 16r90. 16r01. 16r02. 16r03. 16r04. 16r05. 16r06} asByteArray "movsd %ds:0x4(%edx), %xmm0;nop;garbage". - self assert: self processor eip = 5. - self assert: self processor xmm0low = 16r0605040302019004! Item was changed: ----- Method: GdbARMAlienTests>>testNfib1 (in category 'tests') ----- testNfib1 "self new testNfib1" + self should: [self runNFib: 1 disassemble: false printRegisters: false] - self should: [self runNFib: 1 disassemble: false printRegisters: true] raise: Error withExceptionDo: [:err| self assert: err messageText = 'Error 0: Illegal Instruction fetch address (0x00001000).']. self deny: (self processor pc between: 0 and: self nfib size). self assert: self processor r0 = 1 benchFib!

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Vm-dev July 2012